| .text | |
| .am33 | |
| cmp_add 4,r1,r2,r3 | |
| cmp_add 4,r1,2,r3 | |
| cmp_sub 4,r1,r2,r3 | |
| cmp_sub 4,r1,2,r3 | |
| cmp_mov 4,r1,r2,r3 | |
| cmp_mov 4,r1,2,r3 | |
| cmp_asr 4,r1,r2,r3 | |
| cmp_asr 4,r1,2,r3 | |
| cmp_lsr 4,r1,r2,r3 | |
| cmp_lsr 4,r1,2,r3 | |
| cmp_asl 4,r1,r2,r3 | |
| cmp_asl 4,r1,2,r3 | |
| sub_add 4,r1,r2,r3 | |
| sub_add 4,r1,2,r3 | |
| sub_sub 4,r1,r2,r3 | |
| sub_sub 4,r1,2,r3 | |
| sub_cmp 4,r1,r2,r3 | |
| sub_cmp 4,r1,2,r3 | |
| sub_mov 4,r1,r2,r3 | |
| sub_mov 4,r1,2,r3 | |
| sub_asr 4,r1,r2,r3 | |
| sub_asr 4,r1,2,r3 | |
| sub_lsr 4,r1,r2,r3 | |
| sub_lsr 4,r1,2,r3 | |
| sub_asl 4,r1,r2,r3 | |
| sub_asl 4,r1,2,r3 | |
| mov_add 4,r1,r2,r3 | |
| mov_add 4,r1,2,r3 | |
| mov_sub 4,r1,r2,r3 | |
| mov_sub 4,r1,2,r3 | |
| mov_cmp 4,r1,r2,r3 | |
| mov_cmp 4,r1,2,r3 | |
| mov_mov 4,r1,r2,r3 | |
| mov_mov 4,r1,2,r3 | |
| mov_asr 4,r1,r2,r3 | |
| mov_asr 4,r1,2,r3 | |
| mov_lsr 4,r1,r2,r3 | |
| mov_lsr 4,r1,2,r3 | |
| mov_asl 4,r1,r2,r3 | |
| mov_asl 4,r1,2,r3 | |
| and_add r4,r1,r2,r3 | |
| and_add r4,r1,2,r3 | |
| and_sub r4,r1,r2,r3 | |
| and_sub r4,r1,2,r3 | |
| and_cmp r4,r1,r2,r3 | |
| and_cmp r4,r1,2,r3 | |
| and_mov r4,r1,r2,r3 | |
| and_mov r4,r1,2,r3 | |
| and_asr r4,r1,r2,r3 | |
| and_asr r4,r1,2,r3 | |
| and_lsr r4,r1,r2,r3 | |
| and_lsr r4,r1,2,r3 | |
| and_asl r4,r1,r2,r3 | |
| and_asl r4,r1,2,r3 | |
| dmach_add r4,r1,r2,r3 | |
| dmach_add r4,r1,2,r3 | |
| dmach_sub r4,r1,r2,r3 | |
| dmach_sub r4,r1,2,r3 | |
| dmach_cmp r4,r1,r2,r3 | |
| dmach_cmp r4,r1,2,r3 | |
| dmach_mov r4,r1,r2,r3 | |
| dmach_mov r4,r1,2,r3 | |
| dmach_asr r4,r1,r2,r3 | |
| dmach_asr r4,r1,2,r3 | |
| dmach_lsr r4,r1,r2,r3 | |
| dmach_lsr r4,r1,2,r3 | |
| dmach_asl r4,r1,r2,r3 | |
| dmach_asl r4,r1,2,r3 | |