blob: 06d1e93a0147aa198a5aa32a7d92dd7af5ea6124 [file] [log] [blame]
# sh testcase for fdiv -*- Asm -*-
# mach: all
# as: -isa=shcompact
# ld: -m shelf32
.include "compact/testutils.inc"
start
_clrpr
# 1.0 / 0.0 should be INF
# (and not crash the sim).
fldi0 fr0
fldi1 fr1
fdiv fr0, fr1
# 0.0 / 1.0 == 0.0.
fldi0 fr0
fldi1 fr1
fdiv fr1, fr0
fldi0 fr2
fcmp/eq fr0, fr2
bf wrong
# 2.0 / 1.0 == 2.0.
fldi1 fr1
fldi1 fr2
fadd fr2, fr2
fdiv fr1, fr2
# Load 2.0 into fr3.
fldi1 fr3
fadd fr3, fr3
fcmp/eq fr2, fr3
bf wrong
# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
fldi1 fr1
fldi1 fr2
fadd fr2, fr2
fdiv fr2, fr1
# fr1 should contain 0.5.
fadd fr1, fr1
# Load 1.0 into fr3.
fldi1 fr3
# Compare fr1 with fr3.
fcmp/eq fr1, fr3
bf wrong
bra double
nop
wrong:
fail
double:
# double test
# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
fldi1 fr1
_s2d fr1, dr6
fldi1 fr2
fadd fr2, fr2
_s2d fr2, dr8
_setpr
fdiv dr8, dr6
# dr0 should contain 0.5.
# double it, expect 1.0.
fadd dr6, dr6
_clrpr
foo:
# Load 1.0 into dr4.
fldi1 fr1
_s2d fr1, dr10
# Compare dr0 with dr10.
_setpr
fcmp/eq dr6, dr10
bf wrong2
_clrpr
okay:
pass
wrong2:
fail