| #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric |
| #name: MIPS MIPS64r2 instructions |
| |
| # Check MIPS64r2 instruction assembly |
| |
| .*: +file format .*mips.* |
| |
| Disassembly of section .text: |
| 0+0000 <[^>]*> 7c620003 dext \$2,\$3,0x0,0x1 |
| 0+0004 <[^>]*> 7c62f803 dext \$2,\$3,0x0,0x20 |
| 0+0008 <[^>]*> 7c620001 dext \$2,\$3,0x0,0x21 |
| 0+000c <[^>]*> 7c62f801 dext \$2,\$3,0x0,0x40 |
| 0+0010 <[^>]*> 7c6207c3 dext \$2,\$3,0x1f,0x1 |
| 0+0014 <[^>]*> 7c62ffc3 dext \$2,\$3,0x1f,0x20 |
| 0+0018 <[^>]*> 7c6207c1 dext \$2,\$3,0x1f,0x21 |
| 0+001c <[^>]*> 7c620002 dext \$2,\$3,0x20,0x1 |
| 0+0020 <[^>]*> 7c62f802 dext \$2,\$3,0x20,0x20 |
| 0+0024 <[^>]*> 7c6207c2 dext \$2,\$3,0x3f,0x1 |
| 0+0028 <[^>]*> 7c625a81 dext \$2,\$3,0xa,0x2c |
| 0+002c <[^>]*> 7c625a82 dext \$2,\$3,0x2a,0xc |
| 0+0030 <[^>]*> 7c620007 dins \$2,\$3,0x0,0x1 |
| 0+0034 <[^>]*> 7c62f807 dins \$2,\$3,0x0,0x20 |
| 0+0038 <[^>]*> 7c620005 dins \$2,\$3,0x0,0x21 |
| 0+003c <[^>]*> 7c62f805 dins \$2,\$3,0x0,0x40 |
| 0+0040 <[^>]*> 7c62ffc7 dins \$2,\$3,0x1f,0x1 |
| 0+0044 <[^>]*> 7c6207c5 dins \$2,\$3,0x1f,0x2 |
| 0+0048 <[^>]*> 7c62ffc5 dins \$2,\$3,0x1f,0x21 |
| 0+004c <[^>]*> 7c620006 dins \$2,\$3,0x20,0x1 |
| 0+0050 <[^>]*> 7c62f806 dins \$2,\$3,0x20,0x20 |
| 0+0054 <[^>]*> 7c62ffc6 dins \$2,\$3,0x3f,0x1 |
| 0+0058 <[^>]*> 7c62aa85 dins \$2,\$3,0xa,0x2c |
| 0+005c <[^>]*> 7c62aa86 dins \$2,\$3,0x2a,0xc |
| 0+0060 <[^>]*> 002acf3e dror32 \$25,\$10,0x1c |
| 0+0064 <[^>]*> 002ac93a dror \$25,\$10,0x4 |
| 0+0068 <[^>]*> 002acf3a dror \$25,\$10,0x1c |
| 0+006c <[^>]*> 002ac93e dror32 \$25,\$10,0x4 |
| 0+0070 <[^>]*> 0004c82f dnegu \$25,\$4 |
| 0+0074 <[^>]*> 032ac856 drorv \$25,\$10,\$25 |
| 0+0078 <[^>]*> 008ac856 drorv \$25,\$10,\$4 |
| 0+007c <[^>]*> 002ac93e dror32 \$25,\$10,0x4 |
| 0+0080 <[^>]*> 008ac856 drorv \$25,\$10,\$4 |
| 0+0084 <[^>]*> 7c0738a4 dsbh \$7,\$7 |
| 0+0088 <[^>]*> 7c0a40a4 dsbh \$8,\$10 |
| 0+008c <[^>]*> 7c073964 dshd \$7,\$7 |
| 0+0090 <[^>]*> 7c0a4164 dshd \$8,\$10 |
| \.\.\. |
