blob: 81ce21162a9f3ae664a0ea15e3b3f89c69645b54 [file] [log] [blame]
#mach: crisv32
#output: Basic clock cycles, total @: 4\n
#output: Memory source stall cycles: 1\n
#output: Memory read-after-write stall cycles: 0\n
#output: Movem source stall cycles: 0\n
#output: Movem destination stall cycles: 0\n
#output: Movem address stall cycles: 0\n
#output: Multiplication source stall cycles: 0\n
#output: Jump source stall cycles: 0\n
#output: Branch misprediction stall cycles: 0\n
#output: Jump target stall cycles: 0\n
#sim: --cris-cycles=basic
.include "tmemv10.ms"