| # name: Neon instruction coverage |
| # as: -mfpu=neon |
| # objdump: -dr --prefix-addresses --show-raw-insn |
| |
| .*: +file format .*arm.* |
| |
| Disassembly of section \.text: |
| 0[0-9a-f]+ <[^>]+> f2000750 vaba\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000750 vaba\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000710 vaba\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100750 vaba\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100750 vaba\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100710 vaba\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200750 vaba\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200750 vaba\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200710 vaba\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000750 vaba\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000750 vaba\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000710 vaba\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100750 vaba\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100750 vaba\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100710 vaba\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200750 vaba\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200750 vaba\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200710 vaba\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000040 vhadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000040 vhadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000000 vhadd\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100040 vhadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100040 vhadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100000 vhadd\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200040 vhadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200040 vhadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200000 vhadd\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000040 vhadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000040 vhadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000000 vhadd\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100040 vhadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100040 vhadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100000 vhadd\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200040 vhadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200040 vhadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200000 vhadd\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000140 vrhadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000140 vrhadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000100 vrhadd\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100140 vrhadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100140 vrhadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100100 vrhadd\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200140 vrhadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200140 vrhadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200100 vrhadd\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000140 vrhadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000140 vrhadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000100 vrhadd\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100140 vrhadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100140 vrhadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100100 vrhadd\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200140 vrhadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200140 vrhadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200100 vrhadd\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000240 vhsub\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000240 vhsub\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000200 vhsub\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100240 vhsub\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100240 vhsub\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100200 vhsub\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200240 vhsub\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200240 vhsub\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200200 vhsub\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000240 vhsub\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000240 vhsub\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000200 vhsub\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100240 vhsub\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100240 vhsub\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100200 vhsub\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200240 vhsub\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200240 vhsub\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200200 vhsub\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000050 vqadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000050 vqadd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000010 vqadd\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100050 vqadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100050 vqadd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100010 vqadd\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200050 vqadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200050 vqadd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200010 vqadd\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300050 vqadd\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300050 vqadd\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300010 vqadd\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000050 vqadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000050 vqadd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000010 vqadd\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100050 vqadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100050 vqadd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100010 vqadd\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200050 vqadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200050 vqadd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200010 vqadd\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300050 vqadd\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300050 vqadd\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300010 vqadd\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000250 vqsub\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000250 vqsub\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000210 vqsub\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100250 vqsub\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100250 vqsub\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100210 vqsub\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200250 vqsub\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200250 vqsub\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200210 vqsub\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300250 vqsub\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300250 vqsub\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300210 vqsub\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000250 vqsub\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000250 vqsub\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000210 vqsub\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100250 vqsub\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100250 vqsub\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100210 vqsub\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200250 vqsub\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200250 vqsub\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200210 vqsub\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300250 vqsub\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300250 vqsub\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300210 vqsub\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000540 vrshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000540 vrshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000500 vrshl\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100540 vrshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100540 vrshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100500 vrshl\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200540 vrshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200540 vrshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200500 vrshl\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300540 vrshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300540 vrshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300500 vrshl\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000540 vrshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000540 vrshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000500 vrshl\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100540 vrshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100540 vrshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100500 vrshl\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200540 vrshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200540 vrshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200500 vrshl\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300540 vrshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300540 vrshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300500 vrshl\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000550 vqrshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000550 vqrshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000510 vqrshl\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100550 vqrshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100550 vqrshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100510 vqrshl\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200550 vqrshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200550 vqrshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200510 vqrshl\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300550 vqrshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300550 vqrshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300510 vqrshl\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000550 vqrshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000550 vqrshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000510 vqrshl\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100550 vqrshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100550 vqrshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100510 vqrshl\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200550 vqrshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200550 vqrshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200510 vqrshl\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300550 vqrshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300550 vqrshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300510 vqrshl\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000440 vshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000440 vshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000400 vshl\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100440 vshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100440 vshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100400 vshl\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200440 vshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200440 vshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200400 vshl\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300440 vshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300440 vshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300400 vshl\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000440 vshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000440 vshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000400 vshl\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100440 vshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100440 vshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100400 vshl\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200440 vshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200440 vshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200400 vshl\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300440 vshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300440 vshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300400 vshl\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000450 vqshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000450 vqshl\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000410 vqshl\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100450 vqshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100450 vqshl\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100410 vqshl\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200450 vqshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200450 vqshl\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200410 vqshl\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300450 vqshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300450 vqshl\.s64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300410 vqshl\.s64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000450 vqshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000450 vqshl\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000410 vqshl\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100450 vqshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100450 vqshl\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100410 vqshl\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200450 vqshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200450 vqshl\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200410 vqshl\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300450 vqshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300450 vqshl\.u64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300410 vqshl\.u64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2880550 vshl\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2880550 vshl\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2880510 vshl\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900550 vshl\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900550 vshl\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900510 vshl\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00510 vshl\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00510 vshl\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00550 vshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00510 vshl\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f28005d0 vshl\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f28005d0 vshl\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2800590 vshl\.s64 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2880750 vqshl\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2880750 vqshl\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2880710 vqshl\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900750 vqshl\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900750 vqshl\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2900710 vqshl\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00750 vqshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00750 vqshl\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2a00710 vqshl\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f28007d0 vqshl\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f28007d0 vqshl\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2800790 vqshl\.s64 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880750 vqshl\.u8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880750 vqshl\.u8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880710 vqshl\.u8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900750 vqshl\.u16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900750 vqshl\.u16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900710 vqshl\.u16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00750 vqshl\.u32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00750 vqshl\.u32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00710 vqshl\.u32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f38007d0 vqshl\.u64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f38007d0 vqshl\.u64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3800790 vqshl\.u64 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2000150 vand q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000150 vand q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000110 vand d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100150 vbic q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100150 vbic q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100110 vbic d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200150 vorr q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200150 vorr q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200110 vorr d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300150 vorn q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300150 vorn q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300110 vorn d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000150 veor q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000150 veor q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000110 veor d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820135 vbic\.i32 d0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820335 vbic\.i32 d0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820535 vbic\.i32 d0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820735 vbic\.i32 d0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387037f vbic\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387037f vbic\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387033f vbic\.i32 d0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387057f vbic\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387057f vbic\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387053f vbic\.i32 d0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387073f vbic\.i32 d0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387093f vbic\.i16 d0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b3f vbic\.i16 d0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800930 vbic\.i16 d0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820115 vorr\.i32 d0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820315 vorr\.i32 d0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820515 vorr\.i32 d0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820715 vorr\.i32 d0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387035f vorr\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387035f vorr\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387031f vorr\.i32 d0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387055f vorr\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387055f vorr\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387051f vorr\.i32 d0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387071f vorr\.i32 d0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387091f vorr\.i16 d0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b1f vorr\.i16 d0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800910 vorr\.i16 d0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820135 vbic\.i32 d0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820335 vbic\.i32 d0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820535 vbic\.i32 d0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820735 vbic\.i32 d0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387037f vbic\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387037f vbic\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387033f vbic\.i32 d0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387057f vbic\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387057f vbic\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387053f vbic\.i32 d0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387073f vbic\.i32 d0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387093f vbic\.i16 d0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b3f vbic\.i16 d0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800930 vbic\.i16 d0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820115 vorr\.i32 d0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820315 vorr\.i32 d0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820515 vorr\.i32 d0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820715 vorr\.i32 d0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff |
| 0[0-9a-f]+ <[^>]+> f387035f vorr\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387035f vorr\.i32 q0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387031f vorr\.i32 d0, #65280 ; 0x0000ff00 |
| 0[0-9a-f]+ <[^>]+> f387055f vorr\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387055f vorr\.i32 q0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387051f vorr\.i32 d0, #16711680 ; 0x00ff0000 |
| 0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f387071f vorr\.i32 d0, #-16777216 ; 0xff000000 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f387091f vorr\.i16 d0, #255 ; 0x00ff |
| 0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f3870b1f vorr\.i16 d0, #65280 ; 0xff00 |
| 0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f2800910 vorr\.i16 d0, #0 ; 0x0000 |
| 0[0-9a-f]+ <[^>]+> f3100150 vbsl q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100150 vbsl q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100110 vbsl d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200150 vbit q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200150 vbit q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200110 vbit d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300150 vbif q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300150 vbif q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300110 vbif d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000740 vabd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000740 vabd\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000700 vabd\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100740 vabd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100740 vabd\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100700 vabd\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200740 vabd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200740 vabd\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200700 vabd\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000740 vabd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000740 vabd\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000700 vabd\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100740 vabd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100740 vabd\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100700 vabd\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200740 vabd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200740 vabd\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200700 vabd\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200d40 vabd\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200d40 vabd\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200d00 vabd\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000640 vmax\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000640 vmax\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000600 vmax\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100640 vmax\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100640 vmax\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100600 vmax\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200640 vmax\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200640 vmax\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200600 vmax\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000640 vmax\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000640 vmax\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000600 vmax\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100640 vmax\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100640 vmax\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100600 vmax\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200640 vmax\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200640 vmax\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200600 vmax\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000f40 vmax\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000f40 vmax\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000f00 vmax\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000650 vmin\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000650 vmin\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000610 vmin\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100650 vmin\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100650 vmin\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100610 vmin\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200650 vmin\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200650 vmin\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200610 vmin\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000650 vmin\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000650 vmin\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000610 vmin\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100650 vmin\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100650 vmin\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100610 vmin\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200650 vmin\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200650 vmin\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200610 vmin\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200f40 vmin\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200f40 vmin\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200f00 vmin\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000310 vcge\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100310 vcge\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200310 vcge\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000350 vcge\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000350 vcge\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000310 vcge\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100350 vcge\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100350 vcge\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100310 vcge\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200350 vcge\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200350 vcge\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200310 vcge\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000e40 vcge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e40 vcge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e00 vcge\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000300 vcgt\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100300 vcgt\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200300 vcgt\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000340 vcgt\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000340 vcgt\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000300 vcgt\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100340 vcgt\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100340 vcgt\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100300 vcgt\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200340 vcgt\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200340 vcgt\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200300 vcgt\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200e40 vcgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e40 vcgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e00 vcgt\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000310 vcge\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100310 vcge\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200310 vcge\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000350 vcge\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000350 vcge\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000310 vcge\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100350 vcge\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100350 vcge\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100310 vcge\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200350 vcge\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200350 vcge\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200310 vcge\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000e40 vcge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e40 vcge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e00 vcge\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000300 vcgt\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100300 vcgt\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200300 vcgt\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000340 vcgt\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000340 vcgt\.u8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000300 vcgt\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100340 vcgt\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100340 vcgt\.u16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100300 vcgt\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200340 vcgt\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200340 vcgt\.u32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200300 vcgt\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200e40 vcgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e40 vcgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e00 vcgt\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000850 vceq\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000850 vceq\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000810 vceq\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100850 vceq\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100850 vceq\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100810 vceq\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200810 vceq\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200810 vceq\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200850 vceq\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200810 vceq\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000e40 vceq\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000e40 vceq\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000e00 vceq\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b100c0 vcge\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b100c0 vcge\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10080 vcge\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b500c0 vcge\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b500c0 vcge\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50080 vcge\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b900c0 vcge\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b900c0 vcge\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90080 vcge\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b904c0 vcge\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b904c0 vcge\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90480 vcge\.f32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10040 vcgt\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10040 vcgt\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10000 vcgt\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50040 vcgt\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50040 vcgt\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50000 vcgt\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90040 vcgt\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90040 vcgt\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90000 vcgt\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90440 vcgt\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90440 vcgt\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90400 vcgt\.f32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b101c0 vcle\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b101c0 vcle\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10180 vcle\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b501c0 vcle\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b501c0 vcle\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50180 vcle\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b901c0 vcle\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b901c0 vcle\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90180 vcle\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b905c0 vcle\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b905c0 vcle\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90580 vcle\.f32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10240 vclt\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10240 vclt\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10200 vclt\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50240 vclt\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50240 vclt\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50200 vclt\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90240 vclt\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90240 vclt\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90200 vclt\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90640 vclt\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90640 vclt\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90600 vclt\.f32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10140 vceq\.i8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10140 vceq\.i8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b10100 vceq\.i8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50140 vceq\.i16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50140 vceq\.i16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b50100 vceq\.i16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90100 vceq\.i32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90100 vceq\.i32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90140 vceq\.i32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90100 vceq\.i32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90540 vceq\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90540 vceq\.f32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3b90500 vceq\.f32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2000a00 vpmax\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100a00 vpmax\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200a00 vpmax\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000a00 vpmax\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100a00 vpmax\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200a00 vpmax\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000f00 vpmax\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000a10 vpmin\.s8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100a10 vpmin\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200a10 vpmin\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000a10 vpmin\.u8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100a10 vpmin\.u16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200a10 vpmin\.u32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200f00 vpmin\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000940 vmla\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000940 vmla\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000900 vmla\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100940 vmla\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100940 vmla\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100900 vmla\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200900 vmla\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200900 vmla\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200940 vmla\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200900 vmla\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000d50 vmla\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000d50 vmla\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000d10 vmla\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900040 vmla\.i16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900040 vmla\.i16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900040 vmla\.i16 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00040 vmla\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00040 vmla\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00040 vmla\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00040 vmla\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00140 vmla\.f32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00140 vmla\.f32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00140 vmla\.f32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3000940 vmls\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000940 vmls\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000900 vmls\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100940 vmls\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100940 vmls\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100900 vmls\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200900 vmls\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200900 vmls\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200940 vmls\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200900 vmls\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200d50 vmls\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200d50 vmls\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200d10 vmls\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900440 vmls\.i16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900440 vmls\.i16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900440 vmls\.i16 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00440 vmls\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00440 vmls\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00440 vmls\.i32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00440 vmls\.i32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00540 vmls\.f32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00540 vmls\.f32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00540 vmls\.f32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2000b10 vpadd\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100b10 vpadd\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200b10 vpadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200b10 vpadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200b10 vpadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000d00 vpadd\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000840 vadd\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000840 vadd\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000800 vadd\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100840 vadd\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100840 vadd\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100800 vadd\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200800 vadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200800 vadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200840 vadd\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200800 vadd\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2300840 vadd\.i64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300840 vadd\.i64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2300800 vadd\.i64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000d40 vadd\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000d40 vadd\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000d00 vadd\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000840 vsub\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000840 vsub\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000800 vsub\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3100840 vsub\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100840 vsub\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100800 vsub\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200800 vsub\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200800 vsub\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200840 vsub\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200800 vsub\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3300840 vsub\.i64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300840 vsub\.i64 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3300800 vsub\.i64 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200d40 vsub\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200d40 vsub\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200d00 vsub\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000850 vtst\.8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000850 vtst\.8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000810 vtst\.8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100850 vtst\.16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100850 vtst\.16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100810 vtst\.16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200850 vtst\.32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200850 vtst\.32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200810 vtst\.32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000950 vmul\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000950 vmul\.i8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000910 vmul\.i8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100950 vmul\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100950 vmul\.i16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100910 vmul\.i16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200910 vmul\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200910 vmul\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200950 vmul\.i32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200910 vmul\.i32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000d50 vmul\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000d50 vmul\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000d10 vmul\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000950 vmul\.p8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000950 vmul\.p8 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000910 vmul\.p8 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2100b40 vqdmulh\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100b40 vqdmulh\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2100b00 vqdmulh\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200b40 vqdmulh\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200b40 vqdmulh\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200b00 vqdmulh\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900c40 vqdmulh\.s16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900c40 vqdmulh\.s16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900c40 vqdmulh\.s16 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00c40 vqdmulh\.s32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00c40 vqdmulh\.s32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00c40 vqdmulh\.s32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3100b40 vqrdmulh\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100b40 vqrdmulh\.s16 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3100b00 vqrdmulh\.s16 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200b40 vqrdmulh\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200b40 vqrdmulh\.s32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200b00 vqrdmulh\.s32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900d40 vqrdmulh\.s16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900d40 vqrdmulh\.s16 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900d40 vqrdmulh\.s16 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00d40 vqrdmulh\.s32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00d40 vqrdmulh\.s32 q0, q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00d40 vqrdmulh\.s32 d0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3000e50 vacge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e50 vacge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e10 vacge\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200e50 vacgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e50 vacgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e10 vacgt\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3000e50 vacge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e50 vacge\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3000e10 vacge\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3200e50 vacgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e50 vacgt\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3200e10 vacgt\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2000f50 vrecps\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000f50 vrecps\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2000f10 vrecps\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2200f50 vrsqrts\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200f50 vrsqrts\.f32 q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200f10 vrsqrts\.f32 d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b10340 vabs\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b10340 vabs\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b10300 vabs\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b50340 vabs\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b50340 vabs\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b50300 vabs\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b90340 vabs\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90340 vabs\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90300 vabs\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b90740 vabs\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90740 vabs\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90700 vabs\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b103c0 vneg\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b103c0 vneg\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b10380 vneg\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b503c0 vneg\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b503c0 vneg\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b50380 vneg\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b903c0 vneg\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b903c0 vneg\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90380 vneg\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b907c0 vneg\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b907c0 vneg\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b90780 vneg\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2890050 vshr\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890050 vshr\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890010 vshr\.s8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910050 vshr\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910050 vshr\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910010 vshr\.s16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10050 vshr\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10050 vshr\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10010 vshr\.s32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f28100d0 vshr\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f28100d0 vshr\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f2810090 vshr\.s64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3890050 vshr\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890050 vshr\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890010 vshr\.u8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910050 vshr\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910050 vshr\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910010 vshr\.u16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10050 vshr\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10050 vshr\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10010 vshr\.u32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f38100d0 vshr\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f38100d0 vshr\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f3810090 vshr\.u64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f2890250 vrshr\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890250 vrshr\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890210 vrshr\.s8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910250 vrshr\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910250 vrshr\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910210 vrshr\.s16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10250 vrshr\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10250 vrshr\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10210 vrshr\.s32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f28102d0 vrshr\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f28102d0 vrshr\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f2810290 vrshr\.s64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3890250 vrshr\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890250 vrshr\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890210 vrshr\.u8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910250 vrshr\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910250 vrshr\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910210 vrshr\.u16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10250 vrshr\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10250 vrshr\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10210 vrshr\.u32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f38102d0 vrshr\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f38102d0 vrshr\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f3810290 vrshr\.u64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f2890150 vsra\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890150 vsra\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890110 vsra\.s8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910150 vsra\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910150 vsra\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910110 vsra\.s16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10150 vsra\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10150 vsra\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10110 vsra\.s32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f28101d0 vsra\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f28101d0 vsra\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f2810190 vsra\.s64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3890150 vsra\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890150 vsra\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890110 vsra\.u8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910150 vsra\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910150 vsra\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910110 vsra\.u16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10150 vsra\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10150 vsra\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10110 vsra\.u32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f38101d0 vsra\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f38101d0 vsra\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f3810190 vsra\.u64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f2890350 vrsra\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890350 vrsra\.s8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2890310 vrsra\.s8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910350 vrsra\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910350 vrsra\.s16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910310 vrsra\.s16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10350 vrsra\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10350 vrsra\.s32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2a10310 vrsra\.s32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f28103d0 vrsra\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f28103d0 vrsra\.s64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f2810390 vrsra\.s64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3890350 vrsra\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890350 vrsra\.u8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890310 vrsra\.u8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910350 vrsra\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910350 vrsra\.u16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910310 vrsra\.u16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10350 vrsra\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10350 vrsra\.u32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10310 vrsra\.u32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f38103d0 vrsra\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f38103d0 vrsra\.u64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f3810390 vrsra\.u64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3880550 vsli\.8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880550 vsli\.8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880510 vsli\.8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900550 vsli\.16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900550 vsli\.16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900510 vsli\.16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00550 vsli\.32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00550 vsli\.32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00510 vsli\.32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f38005d0 vsli\.64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f38005d0 vsli\.64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3800590 vsli\.64 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3890450 vsri\.8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890450 vsri\.8 q0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3890410 vsri\.8 d0, d0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910450 vsri\.16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910450 vsri\.16 q0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3910410 vsri\.16 d0, d0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10450 vsri\.32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10450 vsri\.32 q0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3a10410 vsri\.32 d0, d0, #31 |
| 0[0-9a-f]+ <[^>]+> f38104d0 vsri\.64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f38104d0 vsri\.64 q0, q0, #63 |
| 0[0-9a-f]+ <[^>]+> f3810490 vsri\.64 d0, d0, #63 |
| 0[0-9a-f]+ <[^>]+> f3880650 vqshlu\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880650 vqshlu\.s8 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3880610 vqshlu\.s8 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900650 vqshlu\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900650 vqshlu\.s16 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3900610 vqshlu\.s16 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00650 vqshlu\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00650 vqshlu\.s32 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3a00610 vqshlu\.s32 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f38006d0 vqshlu\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f38006d0 vqshlu\.s64 q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f3800690 vqshlu\.s64 d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2890910 vqshrn\.s16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910910 vqshrn\.s32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10910 vqshrn\.s64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3890910 vqshrn\.u16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910910 vqshrn\.u32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10910 vqshrn\.u64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2890950 vqrshrn\.s16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910950 vqrshrn\.s32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10950 vqrshrn\.s64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3890950 vqrshrn\.u16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910950 vqrshrn\.u32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10950 vqrshrn\.u64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3890810 vqshrun\.s16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910810 vqshrun\.s32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10810 vqshrun\.s64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f3890850 vqrshrun\.s16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f3910850 vqrshrun\.s32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f3a10850 vqrshrun\.s64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2890810 vshrn\.i16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910810 vshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910810 vshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910810 vshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10810 vshrn\.i64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2890850 vrshrn\.i16 d0, q0, #7 |
| 0[0-9a-f]+ <[^>]+> f2910850 vrshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910850 vrshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2910850 vrshrn\.i32 d0, q0, #15 |
| 0[0-9a-f]+ <[^>]+> f2a10850 vrshrn\.i64 d0, q0, #31 |
| 0[0-9a-f]+ <[^>]+> f2890a10 vshll\.s8 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2910a10 vshll\.s16 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2a10a10 vshll\.s32 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3890a10 vshll\.u8 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3910a10 vshll\.u16 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3a10a10 vshll\.u32 d0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3b20300 vshll\.i8 q0, d0, #8 |
| 0[0-9a-f]+ <[^>]+> f3b60300 vshll\.i16 q0, d0, #16 |
| 0[0-9a-f]+ <[^>]+> f3ba0300 vshll\.i32 q0, d0, #32 |
| 0[0-9a-f]+ <[^>]+> f3ba0300 vshll\.i32 q0, d0, #32 |
| 0[0-9a-f]+ <[^>]+> f3ba0300 vshll\.i32 q0, d0, #32 |
| 0[0-9a-f]+ <[^>]+> f3bb0740 vcvt\.s32\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb07c0 vcvt\.u32\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0640 vcvt\.f32\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb06c0 vcvt\.f32\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0740 vcvt\.s32\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb07c0 vcvt\.u32\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0640 vcvt\.f32\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb06c0 vcvt\.f32\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0700 vcvt\.s32\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb0780 vcvt\.u32\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb0600 vcvt\.f32\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb0680 vcvt\.f32\.u32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2bf0f50 vcvt\.s32\.f32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0f50 vcvt\.u32\.f32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2bf0e50 vcvt\.f32\.s32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0e50 vcvt\.f32\.u32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2bf0f50 vcvt\.s32\.f32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0f50 vcvt\.u32\.f32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2bf0e50 vcvt\.f32\.s32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0e50 vcvt\.f32\.u32 q0, q0, #1 |
| 0[0-9a-f]+ <[^>]+> f2bf0f10 vcvt\.s32\.f32 d0, d0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0f10 vcvt\.u32\.f32 d0, d0, #1 |
| 0[0-9a-f]+ <[^>]+> f2bf0e10 vcvt\.f32\.s32 d0, d0, #1 |
| 0[0-9a-f]+ <[^>]+> f3bf0e10 vcvt\.f32\.u32 d0, d0, #1 |
| 0[0-9a-f]+ <[^>]+> f2200150 vorr q0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2200110 vorr d0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> ee400b10 vmov\.8 d0\[0\], r0 |
| 0[0-9a-f]+ <[^>]+> ee000b30 vmov\.16 d0\[0\], r0 |
| 0[0-9a-f]+ <[^>]+> ee000b10 vmov\.32 d0\[0\], r0 |
| 0[0-9a-f]+ <[^>]+> ec400b10 vmov d0, r0, r0 |
| 0[0-9a-f]+ <[^>]+> ee500b10 vmov\.s8 r0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> ee100b30 vmov\.s16 r0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> eed00b10 vmov\.u8 r0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> ee900b30 vmov\.u16 r0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> ee100b10 vmov\.32 r0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> ec510b10 vmov r0, r1, d0 |
| 0[0-9a-f]+ <[^>]+> f2870057 vmov\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870017 vmov\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870057 vmov\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870017 vmov\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870057 vmov\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870017 vmov\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870077 vmvn\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870037 vmvn\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870077 vmvn\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870037 vmvn\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870077 vmvn\.i32 q0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870037 vmvn\.i32 d0, #119 ; 0x00000077 |
| 0[0-9a-f]+ <[^>]+> f2870257 vmov\.i32 q0, #30464 ; 0x00007700 |
| 0[0-9a-f]+ <[^>]+> f2870217 vmov\.i32 d0, #30464 ; 0x00007700 |
| 0[0-9a-f]+ <[^>]+> f2870277 vmvn\.i32 q0, #30464 ; 0x00007700 |
| 0[0-9a-f]+ <[^>]+> f2870237 vmvn\.i32 d0, #30464 ; 0x00007700 |
| 0[0-9a-f]+ <[^>]+> f2870457 vmov\.i32 q0, #7798784 ; 0x00770000 |
| 0[0-9a-f]+ <[^>]+> f2870417 vmov\.i32 d0, #7798784 ; 0x00770000 |
| 0[0-9a-f]+ <[^>]+> f2870477 vmvn\.i32 q0, #7798784 ; 0x00770000 |
| 0[0-9a-f]+ <[^>]+> f2870437 vmvn\.i32 d0, #7798784 ; 0x00770000 |
| 0[0-9a-f]+ <[^>]+> f2870657 vmov\.i32 q0, #1996488704 ; 0x77000000 |
| 0[0-9a-f]+ <[^>]+> f2870617 vmov\.i32 d0, #1996488704 ; 0x77000000 |
| 0[0-9a-f]+ <[^>]+> f2870677 vmvn\.i32 q0, #1996488704 ; 0x77000000 |
| 0[0-9a-f]+ <[^>]+> f2870637 vmvn\.i32 d0, #1996488704 ; 0x77000000 |
| 0[0-9a-f]+ <[^>]+> f2870857 vmov\.i16 q0, #119 ; 0x0077 |
| 0[0-9a-f]+ <[^>]+> f2870817 vmov\.i16 d0, #119 ; 0x0077 |
| 0[0-9a-f]+ <[^>]+> f2870877 vmvn\.i16 q0, #119 ; 0x0077 |
| 0[0-9a-f]+ <[^>]+> f2870837 vmvn\.i16 d0, #119 ; 0x0077 |
| 0[0-9a-f]+ <[^>]+> f2870a57 vmov\.i16 q0, #30464 ; 0x7700 |
| 0[0-9a-f]+ <[^>]+> f2870a17 vmov\.i16 d0, #30464 ; 0x7700 |
| 0[0-9a-f]+ <[^>]+> f2870a77 vmvn\.i16 q0, #30464 ; 0x7700 |
| 0[0-9a-f]+ <[^>]+> f2870a37 vmvn\.i16 d0, #30464 ; 0x7700 |
| 0[0-9a-f]+ <[^>]+> f2870c57 vmov\.i32 q0, #30719 ; 0x000077ff |
| 0[0-9a-f]+ <[^>]+> f2870c17 vmov\.i32 d0, #30719 ; 0x000077ff |
| 0[0-9a-f]+ <[^>]+> f2870c77 vmvn\.i32 q0, #30719 ; 0x000077ff |
| 0[0-9a-f]+ <[^>]+> f2870c37 vmvn\.i32 d0, #30719 ; 0x000077ff |
| 0[0-9a-f]+ <[^>]+> f2870d57 vmov\.i32 q0, #7864319 ; 0x0077ffff |
| 0[0-9a-f]+ <[^>]+> f2870d17 vmov\.i32 d0, #7864319 ; 0x0077ffff |
| 0[0-9a-f]+ <[^>]+> f2870d77 vmvn\.i32 q0, #7864319 ; 0x0077ffff |
| 0[0-9a-f]+ <[^>]+> f2870d37 vmvn\.i32 d0, #7864319 ; 0x0077ffff |
| 0[0-9a-f]+ <[^>]+> f2870e57 vmov\.i8 q0, #119 ; 0x77 |
| 0[0-9a-f]+ <[^>]+> f2870e17 vmov\.i8 d0, #119 ; 0x77 |
| 0[0-9a-f]+ <[^>]+> f3810e71 vmov\.i64 q0, #0xff0000ff000000ff |
| 0[0-9a-f]+ <[^>]+> f3810e31 vmov\.i64 d0, #0xff0000ff000000ff |
| 0[0-9a-f]+ <[^>]+> f2810f51 vmov\.f32 q0, #4\.25 ; 0x40880000 |
| 0[0-9a-f]+ <[^>]+> f2810f11 vmov\.f32 d0, #4\.25 ; 0x40880000 |
| 0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f3820855 vmov\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820815 vmov\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820a55 vmov\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820a15 vmov\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5 |
| 0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a |
| 0[0-9a-f]+ <[^>]+> f3820855 vmov\.i16 q0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820815 vmov\.i16 d0, #165 ; 0x00a5 |
| 0[0-9a-f]+ <[^>]+> f3820a55 vmov\.i16 q0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820a15 vmov\.i16 d0, #42240 ; 0xa500 |
| 0[0-9a-f]+ <[^>]+> f3820055 vmov\.i32 q0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820015 vmov\.i32 d0, #165 ; 0x000000a5 |
| 0[0-9a-f]+ <[^>]+> f3820255 vmov\.i32 q0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820215 vmov\.i32 d0, #42240 ; 0x0000a500 |
| 0[0-9a-f]+ <[^>]+> f3820455 vmov\.i32 q0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820415 vmov\.i32 d0, #10813440 ; 0x00a50000 |
| 0[0-9a-f]+ <[^>]+> f3820655 vmov\.i32 q0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820615 vmov\.i32 d0, #-1526726656 ; 0xa5000000 |
| 0[0-9a-f]+ <[^>]+> f3820c55 vmov\.i32 q0, #42495 ; 0x0000a5ff |
| 0[0-9a-f]+ <[^>]+> f3820c15 vmov\.i32 d0, #42495 ; 0x0000a5ff |
| 0[0-9a-f]+ <[^>]+> f3820d55 vmov\.i32 q0, #10878975 ; 0x00a5ffff |
| 0[0-9a-f]+ <[^>]+> f3820d15 vmov\.i32 d0, #10878975 ; 0x00a5ffff |
| 0[0-9a-f]+ <[^>]+> f285067a vmvn\.i32 q0, #1509949440 ; 0x5a000000 |
| 0[0-9a-f]+ <[^>]+> f285063a vmvn\.i32 d0, #1509949440 ; 0x5a000000 |
| 0[0-9a-f]+ <[^>]+> f3b005c0 vmvn q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b005c0 vmvn q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00580 vmvn d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800500 vabal\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900500 vabal\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00500 vabal\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800500 vabal\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900500 vabal\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00500 vabal\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800700 vabdl\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900700 vabdl\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00700 vabdl\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800700 vabdl\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900700 vabdl\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00700 vabdl\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800000 vaddl\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900000 vaddl\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00000 vaddl\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800000 vaddl\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900000 vaddl\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00000 vaddl\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800200 vsubl\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900200 vsubl\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00200 vsubl\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800200 vsubl\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900200 vsubl\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00200 vsubl\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800800 vmlal\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900800 vmlal\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00800 vmlal\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800800 vmlal\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900800 vmlal\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00800 vmlal\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900240 vmlal\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00240 vmlal\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900240 vmlal\.u16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00240 vmlal\.u32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2800a00 vmlsl\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900a00 vmlsl\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00a00 vmlsl\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800a00 vmlsl\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900a00 vmlsl\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00a00 vmlsl\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900640 vmlsl\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00640 vmlsl\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900640 vmlsl\.u16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00640 vmlsl\.u32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2800100 vaddw\.s8 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900100 vaddw\.s16 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00100 vaddw\.s32 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800100 vaddw\.u8 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900100 vaddw\.u16 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00100 vaddw\.u32 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800300 vsubw\.s8 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900300 vsubw\.s16 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00300 vsubw\.s32 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800300 vsubw\.u8 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900300 vsubw\.u16 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00300 vsubw\.u32 q0, q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800400 vaddhn\.i16 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900400 vaddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900400 vaddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900400 vaddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2a00400 vaddhn\.i64 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3800400 vraddhn\.i16 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900400 vraddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900400 vraddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900400 vraddhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3a00400 vraddhn\.i64 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2800600 vsubhn\.i16 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900600 vsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900600 vsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900600 vsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2a00600 vsubhn\.i64 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3800600 vrsubhn\.i16 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900600 vrsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900600 vrsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3900600 vrsubhn\.i32 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3a00600 vrsubhn\.i64 d0, q0, q0 |
| 0[0-9a-f]+ <[^>]+> f2900900 vqdmlal\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00900 vqdmlal\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900340 vqdmlal\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00340 vqdmlal\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900b00 vqdmlsl\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00b00 vqdmlsl\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900740 vqdmlsl\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00740 vqdmlsl\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2900d00 vqdmull\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00d00 vqdmull\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900b40 vqdmull\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00b40 vqdmull\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2800c00 vmull\.s8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900c00 vmull\.s16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00c00 vmull\.s32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3800c00 vmull\.u8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900c00 vmull\.u16 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00c00 vmull\.u32 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2800e00 vmull\.p8 q0, d0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900a40 vmull\.s16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2a00a40 vmull\.s32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3900a40 vmull\.u16 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3a00a40 vmull\.u32 q0, d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2b00040 vext\.8 q0, q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2b00040 vext\.8 q0, q0, q0, #0 |
| 0[0-9a-f]+ <[^>]+> f2b00000 vext\.8 d0, d0, d0, #0 |
| 0[0-9a-f]+ <[^>]+> f2b00840 vext\.8 q0, q0, q0, #8 |
| 0[0-9a-f]+ <[^>]+> f3b00040 vrev64\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00040 vrev64\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00000 vrev64\.8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b40040 vrev64\.16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40040 vrev64\.16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40000 vrev64\.16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b80040 vrev64\.32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80040 vrev64\.32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80000 vrev64\.32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b000c0 vrev32\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b000c0 vrev32\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00080 vrev32\.8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b400c0 vrev32\.16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b400c0 vrev32\.16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40080 vrev32\.16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00140 vrev16\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00140 vrev16\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00100 vrev16\.8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> eee00b10 vdup\.8 q0, r0 |
| 0[0-9a-f]+ <[^>]+> eee00b10 vdup\.8 q0, r0 |
| 0[0-9a-f]+ <[^>]+> eec00b10 vdup\.8 d0, r0 |
| 0[0-9a-f]+ <[^>]+> f3b10c40 vdup\.8 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b10c40 vdup\.8 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b10c00 vdup\.8 d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> eea00b30 vdup\.16 q0, r0 |
| 0[0-9a-f]+ <[^>]+> eea00b30 vdup\.16 q0, r0 |
| 0[0-9a-f]+ <[^>]+> ee800b30 vdup\.16 d0, r0 |
| 0[0-9a-f]+ <[^>]+> f3b20c40 vdup\.16 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b20c40 vdup\.16 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b20c00 vdup\.16 d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> eea00b10 vdup\.32 q0, r0 |
| 0[0-9a-f]+ <[^>]+> eea00b10 vdup\.32 q0, r0 |
| 0[0-9a-f]+ <[^>]+> ee800b10 vdup\.32 d0, r0 |
| 0[0-9a-f]+ <[^>]+> f3b40c40 vdup\.32 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b40c40 vdup\.32 q0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f3b40c00 vdup\.32 d0, d0\[0\] |
| 0[0-9a-f]+ <[^>]+> f2880a10 vmovl\.s8 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2900a10 vmovl\.s16 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f2a00a10 vmovl\.s32 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3880a10 vmovl\.u8 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3900a10 vmovl\.u16 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3a00a10 vmovl\.u32 q0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b20200 vmovn\.i16 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b60200 vmovn\.i32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3ba0200 vmovn\.i64 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b60200 vmovn\.i32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b60200 vmovn\.i32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b20280 vqmovn\.s16 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b60280 vqmovn\.s32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3ba0280 vqmovn\.s64 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b202c0 vqmovn\.u16 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b602c0 vqmovn\.u32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3ba02c0 vqmovn\.u64 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b20240 vqmovun\.s16 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b60240 vqmovun\.s32 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3ba0240 vqmovun\.s64 d0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b201c2 vzip\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b201c2 vzip\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20181 vzip\.8 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b601c2 vzip\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b601c2 vzip\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b60181 vzip\.16 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3ba01c2 vzip\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba01c2 vzip\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba0081 vtrn\.32 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b20142 vuzp\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20142 vuzp\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20101 vuzp\.8 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b60142 vuzp\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b60142 vuzp\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b60101 vuzp\.16 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3ba0142 vuzp\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba0142 vuzp\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba0081 vtrn\.32 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b00740 vqabs\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00740 vqabs\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00700 vqabs\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b40740 vqabs\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40740 vqabs\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40700 vqabs\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b80740 vqabs\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80740 vqabs\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80700 vqabs\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b007c0 vqneg\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b007c0 vqneg\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00780 vqneg\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b407c0 vqneg\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b407c0 vqneg\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40780 vqneg\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b807c0 vqneg\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b807c0 vqneg\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80780 vqneg\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00640 vpadal\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00640 vpadal\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00600 vpadal\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b40640 vpadal\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40640 vpadal\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40600 vpadal\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b80640 vpadal\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80640 vpadal\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80600 vpadal\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b006c0 vpadal\.u8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b006c0 vpadal\.u8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00680 vpadal\.u8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b406c0 vpadal\.u16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b406c0 vpadal\.u16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40680 vpadal\.u16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b806c0 vpadal\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b806c0 vpadal\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80680 vpadal\.u32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00240 vpaddl\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00240 vpaddl\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00200 vpaddl\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b40240 vpaddl\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40240 vpaddl\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40200 vpaddl\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b80240 vpaddl\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80240 vpaddl\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80200 vpaddl\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b002c0 vpaddl\.u8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b002c0 vpaddl\.u8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00280 vpaddl\.u8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b402c0 vpaddl\.u16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b402c0 vpaddl\.u16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40280 vpaddl\.u16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b802c0 vpaddl\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b802c0 vpaddl\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80280 vpaddl\.u32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb0440 vrecpe\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0440 vrecpe\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0400 vrecpe\.u32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb0540 vrecpe\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0540 vrecpe\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0500 vrecpe\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb04c0 vrsqrte\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb04c0 vrsqrte\.u32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0480 vrsqrte\.u32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3bb05c0 vrsqrte\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb05c0 vrsqrte\.f32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3bb0580 vrsqrte\.f32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00440 vcls\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00440 vcls\.s8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00400 vcls\.s8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b40440 vcls\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40440 vcls\.s16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40400 vcls\.s16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b80440 vcls\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80440 vcls\.s32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80400 vcls\.s32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b004c0 vclz\.i8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b004c0 vclz\.i8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00480 vclz\.i8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b404c0 vclz\.i16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b404c0 vclz\.i16 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b40480 vclz\.i16 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80480 vclz\.i32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80480 vclz\.i32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b804c0 vclz\.i32 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b80480 vclz\.i32 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00540 vcnt\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00540 vcnt\.8 q0, q0 |
| 0[0-9a-f]+ <[^>]+> f3b00500 vcnt\.8 d0, d0 |
| 0[0-9a-f]+ <[^>]+> f3b20042 vswp q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20042 vswp q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20001 vswp d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b200c2 vtrn\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b200c2 vtrn\.8 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b20081 vtrn\.8 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b600c2 vtrn\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b600c2 vtrn\.16 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3b60081 vtrn\.16 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3ba00c2 vtrn\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba00c2 vtrn\.32 q0, q1 |
| 0[0-9a-f]+ <[^>]+> f3ba0081 vtrn\.32 d0, d1 |
| 0[0-9a-f]+ <[^>]+> f3b00800 vtbl\.8 d0, {d0}, d0 |
| 0[0-9a-f]+ <[^>]+> f3b00840 vtbx\.8 d0, {d0}, d0 |
