| # frv testcase for smsss $GRi,$GRj |
| # mach: fr405 fr450 |
| |
| .include "../testutils.inc" |
| |
| start |
| |
| .global smsss |
| smsss1: |
| ; Positive operands |
| set_gr_immed 3,gr7 ; multiply small numbers |
| set_gr_immed 2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 7,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 3,gr7 |
| test_gr_immed 2,gr8 |
| test_spr_immed 1,iacc0l ; result 7-3*2 |
| test_spr_immed 0,iacc0h |
| smsss2: |
| set_gr_immed 1,gr7 ; multiply by 1 |
| set_gr_immed 2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 3,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 1,gr7 |
| test_gr_immed 2,gr8 |
| test_spr_immed 1,iacc0l ; result 3-1*2 |
| test_spr_immed 0,iacc0h |
| smsss3: |
| set_gr_immed 2,gr7 ; multiply by 1 |
| set_gr_immed 1,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 3,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 1,gr8 |
| test_gr_immed 2,gr7 |
| test_spr_immed 1,iacc0l ; result 3-2*1 |
| test_spr_immed 0,iacc0h |
| smsss4: |
| set_gr_immed 0,gr7 ; multiply by 0 |
| set_gr_immed 2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 2,gr8 |
| test_gr_immed 0,gr7 |
| test_spr_immed 1,iacc0l ; result 1-0*2 |
| test_spr_immed 0,iacc0h |
| smsss5: |
| set_gr_immed 2,gr7 ; multiply by 0 |
| set_gr_immed 0,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 0,gr8 |
| test_gr_immed 2,gr7 |
| test_spr_immed 1,iacc0l ; result 1-2*0 |
| test_spr_immed 0,iacc0h |
| smsss6: |
| set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result |
| set_gr_immed 2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 2,gr8 |
| test_gr_limmed 0x3fff,0xffff,gr7 |
| test_spr_limmed 0x8000,0x0001,iacc0l ; -1-3fffffff*2 |
| test_spr_immed -1,iacc0h |
| smsss7: |
| set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result |
| set_gr_immed 2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_limmed 0x8000,0x0001,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 2,gr8 |
| test_gr_limmed 0x4000,0x0000,gr7 |
| test_spr_immed 1,iacc0l ; ffffffff80000001-40000000*2 |
| test_spr_immed -1,iacc0h |
| smsss8: |
| set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result |
| set_gr_immed 4,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 4,gr8 |
| test_gr_limmed 0x4000,0x0000,gr7 |
| test_spr_immed 1,iacc0l ; ffffffff00000001-40000000*4 |
| test_spr_immed -2,iacc0h |
| smsss9: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result |
| set_gr_limmed 0x7fff,0xffff,gr8 |
| set_spr_limmed 0x7fff,0xffff,iacc0h |
| set_spr_immed -1,iacc0l |
| smsss gr7,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0xffff,0xfffe,iacc0l ; 7fffffffffffffff-7fffffff*7fffffff |
| test_spr_limmed 0x4000,0x0000,iacc0h |
| smsss10: |
| ; Mixed operands |
| set_gr_immed -3,gr7 ; multiply small numbers |
| set_gr_immed 2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -5,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 2,gr8 |
| test_gr_immed -3,gr7 |
| test_spr_immed 1,iacc0l ; -5-(-3*2) |
| test_spr_immed 0,iacc0h |
| smsss11: |
| set_gr_immed 3,gr7 ; multiply small numbers |
| set_gr_immed -2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -5,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed 3,gr7 |
| test_spr_immed 1,iacc0l ; -5-(3*-2) |
| test_spr_immed 0,iacc0h |
| smsss12: |
| set_gr_immed 1,gr7 ; multiply by 1 |
| set_gr_immed -2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed 1,gr7 |
| test_spr_immed 1,iacc0l ; -1-(1*-2) |
| test_spr_immed 0,iacc0h |
| smsss13: |
| set_gr_immed -2,gr7 ; multiply by 1 |
| set_gr_immed 1,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 1,gr8 |
| test_gr_immed -2,gr7 |
| test_spr_immed 1,iacc0l ; -1-(-2*1) |
| test_spr_immed 0,iacc0h |
| smsss14: |
| set_gr_immed 0,gr7 ; multiply by 0 |
| set_gr_immed -2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed 0,gr7 |
| test_spr_immed 1,iacc0l ; 1-(0*-2) |
| test_spr_immed 0,iacc0h |
| smsss15: |
| set_gr_immed -2,gr7 ; multiply by 0 |
| set_gr_immed 0,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 0,gr8 |
| test_gr_immed -2,gr7 |
| test_spr_immed 1,iacc0l ; 1-(-2*0) |
| test_spr_immed 0,iacc0h |
| smsss16: |
| set_gr_limmed 0x2000,0x0000,gr7 ; 31 bit result |
| set_gr_immed -2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_limmed 0x3fff,0xffff,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_limmed 0x2000,0x0000,gr7 |
| test_spr_limmed 0x7fff,0xffff,iacc0l |
| test_spr_immed 0,iacc0h ; 3fffffff-20000001*-2 |
| smsss17: |
| set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result |
| set_gr_immed -2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_limmed 0x4000,0x0000,gr7 |
| test_spr_limmed 0x8000,0x0001,iacc0l ; 1-40000000*-2 |
| test_spr_immed 0,iacc0h |
| smsss18: |
| set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result |
| set_gr_immed -2,gr8 |
| set_spr_immed -1,iacc0h |
| set_spr_immed -1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_limmed 0x4000,0x0000,gr7 |
| test_spr_limmed 0x7fff,0xffff,iacc0l |
| test_spr_immed 0,iacc0h ; -1-40000000*-2 |
| smsss19: |
| set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result |
| set_gr_immed -4,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -4,gr8 |
| test_gr_limmed 0x4000,0x0000,gr7 |
| test_spr_immed 1,iacc0l ; 200000001-(40000000*-4) |
| test_spr_immed 1,iacc0h |
| smsss20: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result |
| set_gr_limmed 0x7fff,0xffff,gr8 |
| set_spr_limmed 0xbfff,0xffff,iacc0h |
| set_spr_limmed 0x0000,0x0001,iacc0l |
| smsss gr7,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_immed 0,iacc0l ; bfffffff00000001-(7fffffff*7fffffff) |
| test_spr_limmed 0x8000,0x0000,iacc0h |
| smsss21: |
| ; Negative operands |
| set_gr_immed -3,gr7 ; multiply small numbers |
| set_gr_immed -2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 7,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed -3,gr7 |
| test_spr_immed 1,iacc0l ; 7-(-3*-2) |
| test_spr_immed 0,iacc0h |
| smsss22: |
| set_gr_immed -1,gr7 ; multiply by 1 |
| set_gr_immed -2,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 3,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed -1,gr7 |
| test_spr_immed 1,iacc0l ; 3-(-1*-2) |
| test_spr_immed 0,iacc0h |
| smsss23: |
| set_gr_immed -2,gr7 ; multiply by 1 |
| set_gr_immed -1,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_immed 3,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -1,gr8 |
| test_gr_immed -2,gr7 |
| test_spr_immed 1,iacc0l ; 3-(-2*-1) |
| test_spr_immed 0,iacc0h |
| smsss24: |
| set_gr_immed -32768,gr7 ; 31 bit result |
| set_gr_immed -32768,gr8 |
| set_spr_immed 0,iacc0h |
| set_spr_limmed 0xbfff,0xffff,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -32768,gr8 |
| test_gr_immed -32768,gr7 |
| test_spr_limmed 0x7fff,0xffff,iacc0l ; 7ffffffb-(-2*-2) |
| test_spr_immed 0,iacc0h |
| smsss25: |
| set_gr_immed 0xffff,gr7 ; 32 bit result |
| set_gr_immed 0xffff,gr8 |
| set_spr_immed 1,iacc0h |
| set_spr_limmed 0xfffe,0x0000,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 0xffff,gr8 |
| test_gr_immed 0xffff,gr7 |
| test_spr_limmed 0xffff,0xffff,iacc0l ; 1fffe0000-ffff*ffff |
| test_spr_immed 0,iacc0h |
| smsss26: |
| set_gr_limmed 0x0001,0x0000,gr7 ; 33 bit result |
| set_gr_limmed 0x0001,0x0000,gr8 |
| set_spr_immed 2,iacc0h |
| set_spr_immed 1,iacc0l |
| smsss gr7,gr8 |
| test_gr_limmed 0x0001,0x0000,gr8 |
| test_gr_limmed 0x0001,0x0000,gr7 |
| test_spr_immed 1,iacc0l ; 0x200000001-0x10000*0x10000 |
| test_spr_immed 1,iacc0h |
| smsss27: |
| set_gr_immed -2,gr7 ; almost max positive result |
| set_gr_immed -2,gr8 |
| set_spr_limmed 0x7fff,0xffff,iacc0h |
| set_spr_limmed 0xffff,0xffff,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed -2,gr8 |
| test_gr_immed -2,gr7 |
| test_spr_limmed 0xffff,0xfffb,iacc0l ; maxpos - (-2*-2) |
| test_spr_limmed 0x7fff,0xffff,iacc0h |
| smsss28: |
| set_gr_immed 0,gr7 ; max positive result |
| set_gr_immed 0,gr8 |
| set_spr_limmed 0x7fff,0xffff,iacc0h |
| set_spr_limmed 0xffff,0xffff,iacc0l |
| smsss gr7,gr8 |
| test_gr_immed 0,gr8 |
| test_gr_immed 0,gr7 |
| test_spr_limmed 0xffff,0xffff,iacc0l ; maxpos-(0*0) |
| test_spr_limmed 0x7fff,0xffff,iacc0h |
| smsss29: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (pos) |
| set_gr_limmed 0x8000,0x0000,gr8 |
| set_spr_limmed 0x4000,0x0000,iacc0h |
| set_spr_limmed 0x7fff,0xffff,iacc0l |
| smsss gr7,gr8 |
| test_gr_limmed 0x8000,0x0000,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0xffff,0xffff,iacc0l ; 400000007fffffff - |
| test_spr_limmed 0x7fff,0xffff,iacc0h ; 0x80000000*0x7fffffff |
| smsss30: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (pos) |
| set_gr_limmed 0x8000,0x0000,gr8 |
| set_spr_limmed 0x4000,0x0000,iacc0h |
| set_spr_limmed 0x8000,0x0000,iacc0l |
| smsss gr7,gr8 |
| test_gr_limmed 0x8000,0x0000,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0xffff,0xffff,iacc0l ; 4000000080000000 - |
| test_spr_limmed 0x7fff,0xffff,iacc0h ; 0x80000000*0x7fffffff |
| |
| smsss31: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (pos) |
| set_gr_limmed 0x8000,0x0000,gr8 |
| set_spr_limmed 0xffff,0xffff,iacc0l |
| set_spr_limmed 0x7fff,0xffff,iacc0h |
| smsss gr7,gr8 |
| test_gr_limmed 0x8000,0x0000,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffffffffffff - |
| test_spr_limmed 0x7fff,0xffff,iacc0h ; 80000000*80000000 |
| smsss32: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (neg) |
| set_gr_limmed 0x7fff,0xffff,gr8 |
| set_spr_immed 1,iacc0l |
| set_spr_limmed 0xbfff,0xffff,iacc0h |
| smsss gr7,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0x0000,0x0000,iacc0l ; bfffffff00000001 - |
| test_spr_limmed 0x8000,0x0000,iacc0h ; 0x7fffffff*0x7fffffff |
| smsss33: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (neg) |
| set_gr_limmed 0x7fff,0xffff,gr8 |
| set_spr_immed 0,iacc0l |
| set_spr_limmed 0xbfff,0xffff,iacc0h |
| smsss gr7,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+ |
| test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff7fffffff |
| smsss34: |
| set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (neg) |
| set_gr_limmed 0x7fff,0xffff,gr8 |
| set_spr_limmed 0x0000,0x0000,iacc0l |
| set_spr_limmed 0x8000,0x0000,iacc0h |
| smsss gr7,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr8 |
| test_gr_limmed 0x7fff,0xffff,gr7 |
| test_spr_limmed 0x0000,0x0000,iacc0l ; 8000000000000000- |
| test_spr_limmed 0x8000,0x0000,iacc0h ; 7fffffff*7fffffff+ |
| |
| pass |
