| # frv testcase to generate interrupt for st $GRk,@($GRi,$GRj) |
| # mach: fr550 |
| .include "testutils.inc" |
| |
| start |
| |
| .global align |
| align: |
| and_spr_immed -4081,tbr ; clear tbr.tt |
| set_gr_spr tbr,gr17 |
| inc_gr_immed 0x100,gr17 ; address of exception handler |
| set_bctrlr_0_0 gr17 |
| set_spr_immed 128,lcr |
| set_psr_et 1 |
| set_gr_immed 0xdeadbeef,gr17 |
| set_gr_immed 0,gr15 |
| inc_gr_immed 2,sp ; out of alignment |
| |
| test_spr_bits 1,0,0,isr ; ISR.EMAM always clear (not used) |
| sti gr17,@(sp,0) ; no exception |
| sti gr17,@(sp,4) ; no exception |
| ldi @(sp,0),gr18 ; stored at unaligned address |
| test_gr_immed 0xdeadbeef,gr18 |
| ldi @(sp,0),gr19 ; no exception |
| test_gr_immed 0xdeadbeef,gr19 |
| |
| and_spr_immed 0xfffffffe,isr ; turn off ISR.EMAM |
| sti gr17,@(sp,0) ; misaligned -- no exception |
| test_gr_immed 0,gr15 |
| |
| set_gr_gr sp,gr20 |
| set_gr_immed 1,gr21 |
| set_gr_immed 0x10101010,gr10 |
| nop.p |
| ldu @(sp,gr21),gr10 ; misaligned read no exception |
| test_gr_immed 0,gr15 ; handler was not called |
| test_gr_immed 0xadbeefde,gr10 ; gr10 updated |
| test_gr_immed 1,gr21 ; gr21 not updated |
| inc_gr_immed 1,gr20 |
| test_gr_gr gr20,sp ; sp updated |
| |
| pass |
