)]}'
{
  "commit": "013c867f1356e2a7848eccc92e62880155698502",
  "tree": "168dfa150bae977de5cf9fbc280152955c45b45b",
  "parents": [
    "c3675d9eb343b3e495c9499b52e13c46623ceabd"
  ],
  "author": {
    "name": "Artemiy Volkov",
    "email": "artemiy.volkov@arm.com",
    "time": "Fri Jan 16 13:09:52 2026 +0000"
  },
  "committer": {
    "name": "Artemiy Volkov",
    "email": "artemiy.volkov@arm.com",
    "time": "Fri May 29 11:33:19 2026 +0000"
  },
  "message": "aarch64: implement FMUL SME instruction\n\nThe SME2.2 extension introduces the following variants of a new\nstreaming-mode instruction:\n\n- FMUL (Multi-vector floating-point multiply by vector)\n- FMUL (Multi-vector floating-point multiply)\n\nThe first operand is a multi-vector consisting of two or four vectors, and\nthe second operand either has the same type, or is a single vector of the\nunderlying type.  New intrinsics are documented in the ACLE manual [0] and\nare as follows:\n\nsvfloat{16,32,64}x{2,4}_t svmul[_single_f{16,32,64}_x{2,4}]\n  (svfloat{16,32,64}x{2,4}_t zd, svfloat{16,32,64}_t zm) __arm_streaming;\n\nsvfloat{16,32,64}x{2,4}_t svmul[_f{16,32,64}_x{2,4}]\n  (svfloat{16,32,64}x{2,4}_t zd, svfloat{16,32,64}x{2,4}_t zm) __arm_streaming;\n\nThis patch implements the above changes throughout the SVE builtin\ndescription files and aarch64-sve2.md.\n\n[0] https://github.com/ARM-software/acle\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-sve-builtins-sve2.def (svmul): Define new\n\tSVE function variant.\n\t* config/aarch64/aarch64-sve2.md (@aarch64_sve_\u003coptab\u003e\u003cmode\u003e): New\n\tinstruction pattern.\n\t(@aarch64_sve_\u003coptab\u003e\u003cmode\u003e_single): Likewise.\n\t* config/aarch64/aarch64.h (TARGET_STREAMING_SME2p2): New macro.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f16_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f16_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f32_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f32_x4.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f64_x2.c: Likewise.\n\t* gcc.target/aarch64/sme2/acle-asm/mul_f64_x4.c: Likewise.\n",
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