commit 20a2c8ace0ab56c147fd995432abd5e7cf89b0e3
author Uros Bizjak <ubizjak@gmail.com> Thu Jun 17 15:19:12 2021 +0200
committer Uros Bizjak <ubizjak@gmail.com> Thu Jun 17 15:19:54 2021 +0200
tree 4afae4736cbfbb3f4854511e7316a52fce061481
parent f1555d4013ed3cae2589270436387063d1c2f1a3

i386: Add variable vec_set for 64bit vectors [PR97194]

To generate sane code a SSE4.1 variable PBLENDV instruction is needed.

2021-06-17  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	PR target/97194
	* config/i386/i386-expand.c (expand_vector_set_var):
	Handle V2FS mode remapping.  Pass TARGET_MMX_WITH_SSE to
	ix86_expand_vector_init_duplicate.
	(ix86_expand_vector_init_duplicate): Emit insv_1 for
	QImode for !TARGET_PARTIAL_REG_STALL.
	* config/i386/predicates.md (vec_setm_mmx_operand): New predicate.
	* config/i386/mmx.md (vec_setv2sf): Use vec_setm_mmx_operand
	as operand 2 predicate.  Call ix86_expand_vector_set_var
	for non-constant index operand.
	(vec_setv2si): Ditto.
	(vec_setv4hi): Ditto.
	(vec_setv8qi): ditto.

gcc/testsuite/

	PR target/97194
	* gcc.target/i386/sse4_1-vec-set-1.c: New test.
	* gcc.target/i386/sse4_1-vec-set-2.c: ditto.