commit | 23d9f62c50d935462ecda5516746037a474c25cd | [log] [tgz] |
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author | Philipp Tomsich <philipp.tomsich@vrull.eu> | Mon Oct 10 22:24:02 2022 +0200 |
committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | Fri Nov 18 21:15:24 2022 +0100 |
tree | 4841223248fdc3d43760442184b90938c3cf59f4 | |
parent | 11543b27fe16d81ca5483ecb98ec7a5b2426e0c0 [diff] |
RISC-V: allow bseti on SImode without sign-extension As long as the SImode operand is not a partial subreg, we can use a bseti without postprocessing to or in a bit, as the middle end is smart enough to stay away from the signbit. gcc/ChangeLog: * config/riscv/bitmanip.md (*bsetidisi): New pattern. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbs-bseti-02.c: New test.