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gnu / gcc / 2c564e813c0626802e5bfb066c094933d5e6a774 / . / gcc / ChangeLog-2017
blob: 122911df18051992a4e831af8d3d09430dde553a [file] [log] [blame]
2017-12-31 Jakub Jelinek <jakub@redhat.com>
PR target/83536
* config/i386/i386.c (ix86_attribute_table): Remove excess
initializer for "shared" attribute.
2017-12-30 Tom de Vries <tom@codesourcery.com>
PR libgomp/83046
* omp-expand.c (expand_omp_target): If in_lto_p, mark offload_funcs with
DECL_PRESERVE_P.
* lto-streamer-out.c (prune_offload_funcs): New function. Remove
offload_funcs entries that no longer have a corresponding cgraph_node.
Mark the remaining ones as DECL_PRESERVE_P.
(output_lto): Call prune_offload_funcs.
2017-12-30 Jakub Jelinek <jakub@redhat.com>
* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>,
vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1, vpdpbusd_<mode>,
vpdpbusd_<mode>_mask, vpdpbusd_<mode>_maskz, vpdpbusd_<mode>_maskz_1,
vpdpbusds_<mode>, vpdpbusds_<mode>_mask, vpdpbusds_<mode>_maskz,
vpdpbusds_<mode>_maskz_1, vpdpwssd_<mode>, vpdpwssd_<mode>_mask,
vpdpwssd_<mode>_maskz, vpdpwssd_<mode>_maskz_1, vpdpwssds_<mode>,
vpdpwssds_<mode>_mask, vpdpwssds_<mode>_maskz,
vpdpwssds_<mode>_maskz_1, vaesdec_<mode>, vaesdeclast_<mode>,
vaesenc_<mode>, vpclmulqdq_<mode>,
avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Formatting fixes.
2017-12-28 Michael Meissner <meissner@linux.vnet.ibm.com>
* builtins.def: (_Float<N> and _Float<N>X BUILT_IN_CEIL): Add
_Float<N> and _Float<N>X variants for rounding built-in
functions.
(_Float<N> and _Float<N>X BUILT_IN_FLOOR): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_NEARBYINT): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_RINT): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_ROUND): Likewise.
(_Float<N> and _Float<N>X BUILT_IN_TRUNC): Likewise.
* builtins.c (mathfn_built_in_2): Likewise.
* internal-fn.def (CEIL): Likewise.
(FLOOR): Likewise.
(NEARBYINT): Likewise.
(RINT): Likewise.
(ROUND): Likewise.
(TRUNC): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
(integer_valued_real_call_p): Likewise.
* fold-const-call.c (fold_const_call_ss): Likewise.
* gencfn-macros.c (print_case_cfn): Change CFN and operator
printers to take a const char * suffix instead of a bool.
(print_define_operator_list): Likewise.
(fltall_suffixes): New list of suffixes, that include the
traditional suffixes as well as all of the _Float<N> and
_Float<N>X suffixes.
(main): For _Float<N> and _Float<N>X functions, emit both
<name>_FN and <name>_ALL variants. The <macro>_FN variant only
has the _Float<N> and _Float<N>X case names or operators. The
<name>_ALL variant has both the traditional and the
_Float<N>/_Float<N>X case names or operators.
* match.pd (COPYSIGN optimizations): Provide optimizations for
_Float<N> and _Float<N>X types where possible.
(MIN/MAX optimizations): Likewise.
(sqrt optimizations): Likewise.
(rounding optimizations): Likewise.
2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
* config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
gen_int_mode rather than GEN_INT.
* config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.
2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
* emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p
instead of CONSTANT_P.
(gen_vec_series): Likewise.
* simplify-rtx.c (simplify_binary_operation_1): Likewise.
2017-12-28 Andreas Schwab <schwab@linux-m68k.org>
* config/m68k/m68k.md (ashrdi3_const1, lshrdi3_const1): Add
CC_STATUS_INIT.
2017-12-27 Kugan Vivekanandarajah <kuganv@linaro.org>
* config/aarch64/aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.
(aarch64_ld1x2<VDC:mode>): Likewise.
(aarch64_simd_ld1<mode>_x2): Likewise.
(aarch64_simd_ld1<mode>_x2): Likewise.
* config/aarch64/arm_neon.h (vld1_u8_x2): New.
(vld1_s8_x2): Likewise.
(vld1_u16_x2): Likewise.
(vld1_s16_x2): Likewise.
(vld1_u32_x2): Likewise.
(vld1_s32_x2): Likewise.
(vld1_u64_x2): Likewise.
(vld1_s64_x2): Likewise.
(vld1_f16_x2): Likewise.
(vld1_f32_x2): Likewise.
(vld1_f64_x2): Likewise.
(vld1_p8_x2): Likewise.
(vld1_p16_x2): Likewise.
(vld1_p64_x2): Likewise.
(vld1q_u8_x2): Likewise.
(vld1q_s8_x2): Likewise.
(vld1q_u16_x2): Likewise.
(vld1q_s16_x2): Likewise.
(vld1q_u32_x2): Likewise.
(vld1q_s32_x2): Likewise.
(vld1q_u64_x2): Likewise.
(vld1q_s64_x2): Likewise.
(vld1q_f16_x2): Likewise.
(vld1q_f32_x2): Likewise.
(vld1q_f64_x2): Likewise.
(vld1q_p8_x2): Likewise.
(vld1q_p16_x2): Likewise.
(vld1q_p64_x2): Likewise.
2017-12-27 Martin Liska <mliska@suse.cz>
PR tree-optimization/83552
* tree-ssa-strlen.c (fold_strstr_to_strncmp): Assign result
of get_string_lenth to a SSA_NAME if not a GIMPLE value.
2017-12-27 Tom de Vries <tom@codesourcery.com>
* config/nvptx/nvptx.c (nvptx_option_override): Disable
-gstatement-frontiers.
2017-12-26 Alexander Monakov <amonakov@ispras.ru>
PR rtl-optimization/83513
* sel-sched.c (sel_rank_for_schedule): Order by non-zero usefulness
before priority comparison.
2017-12-25 Jakub Jelinek <jakub@redhat.com>
PR target/83488
* config/i386/i386.opt (-mavx512vpopcntdq, -mmavx512bitalg): Move from
ix86_isa_flags2 to ix86_isa_flags.
* config/i386/i386-c.c (ix86_target_macros_internal): Test
OPTION_MASK_ISA_AVX512BITALG and OPTION_MASK_ISA_AVX512VPOPCNTDQ in
isa_flags rather than isa_flags2.
* config/i386/i386.c (ix86_target_string): Move -mavx512vpopcntdq
and -mavx512bitalg from isa2_opts to isa_opts.
(ix86_option_override_internal): Test OPTION_MASK_ISA_AVX512VPOPCNTDQ
in x_ix86_isa_flags_explicit rather than x_ix86_isa_flags2_explicit
and set it in x_ix86_isa_flags rather than x_ix86_isa_flags2.
Formatting fixes.
(def_builtin): Treat OPTION_MASK_ISA_AVX512BW or
OPTION_MASK_ISA_AVX512F ored with another option similarly to
OPTION_MASK_ISA_AVX512VL. Even for OPTION_MASK_ISA_AVX512VL don't
clear it if mask is just OPTION_MASK_ISA_AVX512VL itself.
(ix86_expand_builtin): Don't handle OPTION_MASK_ISA_GFNI and
OPTION_MASK_ISA_VPCLMULQDQ specially, instead handle
OPTION_MASK_ISA_AVX512BW and OPTION_MASK_ISA_AVX512F that way.
* config/i386/i386-builtin.def: Move AVX512VPOPCNTDQ and AVX512BITALG
builtins from bdesc_args2 to bdesc_args section.
(__builtin_ia32_compressstoreuqi512_mask,
__builtin_ia32_compressstoreuhi512_mask,
__builtin_ia32_compressstoreuqi256_mask,
__builtin_ia32_expandloadqi512_mask,
__builtin_ia32_expandloadqi512_maskz,
__builtin_ia32_expandloadhi512_mask,
__builtin_ia32_expandloadhi512_maskz,
__builtin_ia32_compressqi512_mask, __builtin_ia32_compresshi512_mask,
__builtin_ia32_compressqi256_mask, __builtin_ia32_expandqi512_mask,
__builtin_ia32_expandqi512_maskz, __builtin_ia32_expandhi512_mask,
__builtin_ia32_expandhi512_maskz, __builtin_ia32_expandqi256_mask,
__builtin_ia32_expandqi256_maskz, __builtin_ia32_vpshrd_v32hi_mask,
__builtin_ia32_vpshld_v32hi_mask, __builtin_ia32_vpshrdv_v32hi_mask,
__builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshldv_v32hi_mask,
__builtin_ia32_vpshldv_v32hi_maskz,
__builtin_ia32_vpopcountb_v64qi_mask,
__builtin_ia32_vpopcountw_v32hi_mask,
__builtin_ia32_vpshufbitqmb512_mask,
__builtin_ia32_vpshufbitqmb256_mask): Add
" | OPTION_MASK_ISA_AVX512BW".
(__builtin_ia32_expandloadqi256_mask,
__builtin_ia32_expandloadqi256_maskz,
__builtin_ia32_vpopcountb_v32qi_mask): Add
" | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW".
(__builtin_ia32_expandloadhi256_mask,
__builtin_ia32_expandloadhi256_maskz,
__builtin_ia32_expandloadqi128_mask,
__builtin_ia32_expandloadqi128_maskz,
__builtin_ia32_expandloadhi128_mask,
__builtin_ia32_expandloadhi128_maskz,
__builtin_ia32_vpshrd_v16hi, __builtin_ia32_vpshrd_v16hi_mask,
__builtin_ia32_vpshrd_v8hi, __builtin_ia32_vpshrd_v8hi_mask,
__builtin_ia32_vpshrd_v8si, __builtin_ia32_vpshrd_v8si_mask,
__builtin_ia32_vpshrd_v4si, __builtin_ia32_vpshrd_v4si_mask,
__builtin_ia32_vpshrd_v4di, __builtin_ia32_vpshrd_v4di_mask,
__builtin_ia32_vpshrd_v2di, __builtin_ia32_vpshrd_v2di_mask,
__builtin_ia32_vpshld_v16hi, __builtin_ia32_vpshld_v16hi_mask,
__builtin_ia32_vpshld_v8hi, __builtin_ia32_vpshld_v8hi_mask,
__builtin_ia32_vpshld_v8si, __builtin_ia32_vpshld_v8si_mask,
__builtin_ia32_vpshld_v4si, __builtin_ia32_vpshld_v4si_mask,
__builtin_ia32_vpshld_v4di, __builtin_ia32_vpshld_v4di_mask,
__builtin_ia32_vpshld_v2di, __builtin_ia32_vpshld_v2di_mask,
__builtin_ia32_vpshrdv_v16hi, __builtin_ia32_vpshrdv_v16hi_mask,
__builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi,
__builtin_ia32_vpshrdv_v8hi_mask, __builtin_ia32_vpshrdv_v8hi_maskz,
__builtin_ia32_vpshrdv_v8si, __builtin_ia32_vpshrdv_v8si_mask,
__builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si,
__builtin_ia32_vpshrdv_v4si_mask, __builtin_ia32_vpshrdv_v4si_maskz,
__builtin_ia32_vpshrdv_v4di, __builtin_ia32_vpshrdv_v4di_mask,
__builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di,
__builtin_ia32_vpshrdv_v2di_mask, __builtin_ia32_vpshrdv_v2di_maskz,
__builtin_ia32_vpshldv_v16hi, __builtin_ia32_vpshldv_v16hi_mask,
__builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi,
__builtin_ia32_vpshldv_v8hi_mask, __builtin_ia32_vpshldv_v8hi_maskz,
__builtin_ia32_vpshldv_v8si, __builtin_ia32_vpshldv_v8si_mask,
__builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si,
__builtin_ia32_vpshldv_v4si_mask, __builtin_ia32_vpshldv_v4si_maskz,
__builtin_ia32_vpshldv_v4di, __builtin_ia32_vpshldv_v4di_mask,
__builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di,
__builtin_ia32_vpshldv_v2di_mask, __builtin_ia32_vpshldv_v2di_maskz,
__builtin_ia32_vpopcountb_v32qi, __builtin_ia32_vpopcountb_v16qi,
__builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v16hi,
__builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
__builtin_ia32_vpopcountw_v8hi_mask): Add
" | OPTION_MASK_ISA_AVX512VL".
* config/i386/avx512vbmi2intrin.h (_mm512_shrdi_epi16,
_mm512_shrdi_epi32, _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
_mm512_shrdi_epi64, _mm512_mask_shrdi_epi64, _mm512_maskz_shrdi_epi64,
_mm512_shldi_epi16, _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
_mm512_maskz_shldi_epi32, _mm512_shldi_epi64, _mm512_mask_shldi_epi64,
_mm512_maskz_shldi_epi64, _mm512_shrdv_epi16, _mm512_shrdv_epi32,
_mm512_mask_shrdv_epi32, _mm512_maskz_shrdv_epi32, _mm512_shrdv_epi64,
_mm512_mask_shrdv_epi64, _mm512_maskz_shrdv_epi64, _mm512_shldv_epi16,
_mm512_shldv_epi32, _mm512_mask_shldv_epi32, _mm512_maskz_shldv_epi32,
_mm512_shldv_epi64, _mm512_mask_shldv_epi64,
_mm512_maskz_shldv_epi64): Don't require avx512bw for these intrinsics.
* config/i386/avx512bitalgintrin.h (_mm_bitshuffle_epi64_mask,
_mm_mask_bitshuffle_epi64_mask): Likewise.
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
OPTION_MASK_ISA_AVX512BITALG_SET): Or in OPTION_MASK_ISA_AVX512F_SET.
(OPTION_MASK_ISA_AVX512F_UNSET): Or in
OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET and
OPTION_MASK_ISA_AVX512BITALG_UNSET.
(OPTION_MASK_ISA2_AVX512F_UNSET,
OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Define.
(ix86_handle_option): For -mno-general-regs-only, clear from
ix86_isa_flags2 OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET rather than
just OPTION_MASK_ISA_MPX. For -mno-sse{,2,3,4,4.1,4.2,avx,avx2} and
-mno-ssse3 clear OPTION_MASK_ISA2_AVX512F_UNSET bits from
ix86_isa_flags2. For -mno-avx512f likewise, instead of masking
individually listed ISAs. For -m{,no-}avx512{vpopcntdq,bitalg} adjust
for moving from ix86_isa_flags2 to ix86_isa_flags.
2017-12-23 Jakub Jelinek <jakub@redhat.com>
PR c++/83553
* fold-const.c (struct contains_label_data): New type.
(contains_label_1): Return non-NULL even for CASE_LABEL_EXPR, unless
inside of a SWITCH_BODY seen during the walk.
(contains_label_p): Use walk_tree instead of
walk_tree_without_duplicates, prepare data for contains_label_1 and
provide own pset.
2017-12-22 Jakub Jelinek <jakub@redhat.com>
PR debug/83547
* tree-iterator.c (alloc_stmt_list): Start with cleared
TREE_SIDE_EFFECTS regardless whether a new STATEMENT_LIST is allocated
or old one reused.
PR target/83488
* config/i386/avx512vnniintrin.h: Don't check for __AVX512F__ nor
enable avx512f explicitly in #pragma GCC target.
* config/i386/i386-builtin.def (__builtin_ia32_vpdpbusd_v8si,
__builtin_ia32_vpdpbusd_v8si_mask, __builtin_ia32_vpdpbusd_v8si_maskz,
__builtin_ia32_vpdpbusd_v4si, __builtin_ia32_vpdpbusd_v4si_mask,
__builtin_ia32_vpdpbusd_v4si_maskz, __builtin_ia32_vpdpbusds_v8si,
__builtin_ia32_vpdpbusds_v8si_mask,
__builtin_ia32_vpdpbusds_v8si_maskz, __builtin_ia32_vpdpbusds_v4si,
__builtin_ia32_vpdpbusds_v4si_mask,
__builtin_ia32_vpdpbusds_v4si_maskz, __builtin_ia32_vpdpwssd_v8si,
__builtin_ia32_vpdpwssd_v8si_mask, __builtin_ia32_vpdpwssd_v8si_maskz,
__builtin_ia32_vpdpwssd_v4si, __builtin_ia32_vpdpwssd_v4si_mask,
__builtin_ia32_vpdpwssd_v4si_maskz, __builtin_ia32_vpdpwssds_v8si,
__builtin_ia32_vpdpwssds_v8si_mask,
__builtin_ia32_vpdpwssds_v8si_maskz, __builtin_ia32_vpdpwssds_v4si,
__builtin_ia32_vpdpwssds_v4si_mask,
__builtin_ia32_vpdpwssds_v4si_maskz): Use
OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL instead of
just OPTION_MASK_ISA_AVX512VNNI.
2017-12-22 Martin Jambor <mjambor@suse.cz>
PR lto/82027
* lto-cgraph.c (output_cgraph_opt_summary_p): Also check former
clones.
2017-12-22 Julia Koval <julia.koval@intel.com>
Sebastian Peryt <sebastian.peryt@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BITALG_SET,
OPTION_MASK_ISA_AVX512BITALG_UNSET): New.
(ix86_handle_option): Handle -mavx512bitalg, fix 4VNNIW formatting.
* config.gcc: Add avx512vpopcntdqvlintrin.h and avx512bitalgintrin.h.
* config/i386/avx512bitalgintrin.h (_mm512_popcnt_epi8, _mm512_popcnt_epi16,
_mm512_mask_popcnt_epi8, _mm512_maskz_popcnt_epi8, _mm512_mask_popcnt_epi16,
_mm512_maskz_popcnt_epi16, _mm512_bitshuffle_epi64_mask, _mm256_popcnt_epi8,
_mm512_mask_bitshuffle_epi64_mask, _mm256_mask_popcnt_epi8, _mm_popcnt_epi8,
_mm256_maskz_popcnt_epi8, _mm_bitshuffle_epi64_mask, _mm256_popcnt_epi16,
_mm_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
_mm256_mask_bitshuffle_epi64_mask, _mm_popcnt_epi16, _mm_maskz_popcnt_epi8,
_mm256_mask_popcnt_epi16, _mm256_maskz_popcnt_epi16, _mm_mask_popcnt_epi8,
_mm_mask_popcnt_epi16, _mm_maskz_popcnt_epi16): New intrinsics.
* config/i386/avx512vpopcntdqvlintrin.h (_mm_popcnt_epi32, _mm_popcnt_epi64,
_mm_mask_popcnt_epi32, _mm_maskz_popcnt_epi32, _mm256_popcnt_epi32,
_mm256_mask_popcnt_epi32, _mm256_maskz_popcnt_epi32, _mm_mask_popcnt_epi64,
_mm_maskz_popcnt_epi64, _mm256_popcnt_epi64, _mm256_mask_popcnt_epi64,
_mm256_maskz_popcnt_epi64): New intrinsics.
* config/i386/cpuid.h (bit_AVX512BITALG): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mavx512bitalg.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI, V64QI_FTYPE_V64QI,
V4DI_FTYPE_V4DI, UHI_FTYPE_V2DI_V2DI_UHI, USI_FTYPE_V4DI_V4DI_USI,
V4SI_FTYPE_V4SI_V4SI_UHI, V8SI_FTYPE_V8SI_V8SI_UHI): New types.
* config/i386/i386-builtin.def (__builtin_ia32_vpopcountq_v4di,
__builtin_ia32_vpopcountq_v4di_mask, __builtin_ia32_vpopcountq_v2di,
__builtin_ia32_vpopcountq_v2di_mask, __builtin_ia32_vpopcountd_v4si,
__builtin_ia32_vpopcountd_v4si_mask, __builtin_ia32_vpopcountd_v8si,
__builtin_ia32_vpopcountd_v8si_mask, __builtin_ia32_vpopcountb_v64qi,
__builtin_ia32_vpopcountb_v64qi_mask, __builtin_ia32_vpopcountb_v32qi,
__builtin_ia32_vpopcountb_v32qi_mask, __builtin_ia32_vpopcountb_v16qi,
__builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v32hi,
__builtin_ia32_vpopcountw_v32hi_mask, __builtin_ia32_vpopcountw_v16hi,
__builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
__builtin_ia32_vpopcountw_v8hi_mask, __builtin_ia32_vpshufbitqmb128_mask,
__builtin_ia32_vpshufbitqmb256_mask,
__builtin_ia32_vpshufbitqmb512_mask): New builtins.
* config/i386/i386-c.c (__AVX512BITALG__): New.
* config/i386/i386.c (isa2_opts): Add -mavx512bitalg.
(ix86_valid_target_attribute_inner_p): Ditto.
(ix86_expand_args_builtin): Handle new types.
* config/i386/i386.h (TARGET_AVX512BITALG, TARGET_AVX512BITALG_P): New.
* config/i386/i386.opt: Add -mavx512bitalg.
* config/i386/immintrin.h: Add avx512vpopcntdqvlintrin.h and
avx512bitalgintrin.h.
* config/i386/sse.md (VI48_AVX512VLBW): New iterator.
(vpopcount<mode><mask_name>): Add more types.
(avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): New.
* doc/invoke.texi: Add -mavx512bitalg and -mavx512vpopcntdq.
2017-12-22 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET):
Or in OPTION_MASK_ISA_AVX512F_SET.
(OPTION_MASK_ISA_AVX512F_UNSET): Or in
OPTION_MASK_ISA_AVX512VNNI_UNSET.
(ix86_handle_option): Adjust for
OPTION_MASK_ISA_AVX512VNNI_*SET being in ix86_isa_flags.
* config/i386/i386-builtin.def: Move VNNI builtins from ARGS2
section to ARGS.
* config/i386/i386-c.c: Check for OPTION_MASK_ISA_AVX512VNNI in
isa_flag instead of isa_flag2.
* config/i386/i386.c (ix86_target_string): Move -mavx512vnni from
isa_opts2 to isa_opts.
* config/i386/i386.opt (mavx512vnni): Move from ix86_isa_flags2
to ix86_isa_flags.
2017-12-22 Mike Stump <mikestump@comcast.net>
Eric Botcazou <ebotcazou@adacore.com>
* doc/extend.texi (Loop-Specific Pragmas): Document pragma GCC unroll.
2017-12-21 Jakub Jelinek <jakub@redhat.com>
PR middle-end/83487
* config/i386/i386.c (ix86_function_arg_boundary): Return
PARM_BOUNDARY for TYPE_EMPTY_P types.
PR c/83448
* gimple-ssa-sprintf.c (maybe_warn): Don't call set_caret_index
if navail is >= dir.len.
2017-12-21 Steve Ellcey <sellcey@cavium.com>
* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Fix
triplet for ilp32.
2017-12-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/80747
PR rtl-optimization/83512
* cfgrtl.c (force_nonfallthru_and_redirect): When splitting
succ edge from ENTRY, copy partition from e->dest to the newly
created bb.
* bb-reorder.c (reorder_basic_blocks_simple): If last_tail is
ENTRY, use BB_PARTITION of its successor block as current_partition.
Don't copy partition when splitting succ edge from ENTRY.
PR tree-optimization/83523
* tree-ssa-math-opts.c (is_widening_mult_p): Return false if
for INTEGER_TYPE TYPE_OVERFLOW_TRAPS.
(convert_mult_to_fma): Likewise.
PR tree-optimization/83521
* tree-ssa-phiopt.c (factor_out_conditional_conversion): Use
gimple_build_assign without code on result of
fold_build1 (VIEW_CONVERT_EXPR, ...), as it might not create
a VIEW_CONVERT_EXPR.
2017-12-21 Andrew Pinski <apinski@cavium.com>
Steve Ellcey <sellcey@cavium.com>
* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle
multi-arch for ilp32.
2017-12-21 Uros Bizjak <ubizjak@gmail.com>
PR target/83467
* config/i386/i386.md (*ashl<mode>3_mask): Add operand
constraints to operand 2.
(*ashl<mode>3_mask_1): Ditto.
(*<shift_insn><mode>3_mask): Ditto.
(*<shift_insn><mode>3_mask_1): Ditto.
(*<rotate_insn><mode>3_mask): Ditto.
(*<rotate_insn><mode>3_mask_1): Ditto.
2017-12-21 Alexandre Oliva <aoliva@redhat.com>
* reorg.c (make_return_insns): Reemit each insn with its own location.
2017-12-21 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
generation for cases where splatting a value is not useful.
* simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
across a vec_duplicate and a paradoxical subreg forming a vector
mode to a vec_concat.
2017-12-21 James Greenhalgh <james.greenhalgh@arm.com>
* combine.c (simplify_set): Do not transform subregs to zero_extends
if the destination is not a scalar int mode.
2017-12-21 Eric Botcazou <ebotcazou@adacore.com>
PR c++/82872
* convert.c (convert_to_integer_1) <POINTER_TYPE>: Do not return the
shared zero if the input has overflowed.
2017-12-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/driver-arm.c (arm_cpu_table): Specify dotprod
support for Cortex-A55 and Cortex-A75.
2017-12-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* common/config/arm/arm-common.c (compare_opt_names): Add function
comment. Use strcmp instead of manual loop.
2017-12-21 Martin Liska <mliska@suse.cz>
PR gcov-profile/83509
* gcov-dump.c (dump_gcov_file): Do not read info about
support_unexecuted_blocks for gcda files.
2017-12-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/82973
* emit-rtl.h (valid_for_const_vec_duplicate_p): Rename to ...
(valid_for_const_vector_p): ... this.
* emit-rtl.c (valid_for_const_vec_duplicate_p): Rename to ...
(valid_for_const_vector_p): ... this. Adjust function comment.
(gen_vec_duplicate): Adjust caller.
* optabs.c (expand_vector_broadcast): Likewise.
* simplify-rtx.c (simplify_const_unary_operation): Don't optimize into
CONST_VECTOR if some element isn't simplified valid_for_const_vector_p
constant.
(simplify_const_binary_operation): Likewise. Use CONST_FIXED_P macro
instead of GET_CODE == CONST_FIXED.
(simplify_subreg): Use CONST_FIXED_P macro instead of
GET_CODE == CONST_FIXED.
PR target/83488
* config/i386/i386.c (ix86_target_string): Move -mavx512vbmi2 and
-mshstk entries from isa_opts2 to isa_opts and -mhle, -mmovbe,
-mclzero and -mmwaitx entries from isa_opts to isa_opts2.
(ix86_option_override_internal): Adjust for
OPTION_MASK_ISA_{HLE,MOVBE,CLZERO,MWAITX} moving to ix86_isa_flags2
and OPTION_MASK_ISA_SHSTK moving to ix86_isa_flags.
(BDESC_VERIFYS): Remove SPECIAL_ARGS2 related checks.
(ix86_init_mmx_sse_builtins): Remove bdesc_special_args2 handling.
Use def_builtin2 instead of def_builtin for OPTION_MASK_ISA_MWAITX
and OPTION_MASK_ISA_CLZERO builtins. Use def_builtin instead of
def_builtin2 for CET builtins.
(ix86_expand_builtin): Remove bdesc_special_args2 handling. Fix
up formatting in IX86_BUILTIN_RDPID code.
* config/i386/i386-builtin.def: Move VBMI2 builtins from SPECIAL_ARGS2
section to SPECIAL_ARGS and from ARGS2 section to ARGS.
* config/i386/i386.opt (mavx512vbmi2, mshstk): Move from
ix86_isa_flags2 to ix86_isa_flags.
(mhle, mmovbe, mclzero, mmwaitx): Move from ix86_isa_flags to
ix86_isa_flags2.
* config/i386/i386-c.c (ix86_target_macros_internal): Check for
OPTION_MASK_ISA_{CLZERO,MWAITX} in isa_flag2 instead of isa_flag.
Check for OPTION_MASK_ISA_{SHSTK,AVX512VBMI2} in isa_flag instead
of isa_flag2.
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI2_SET):
Or in OPTION_MASK_ISA_AVX512F_SET.
(OPTION_MASK_ISA_AVX512F_UNSET): Or in
OPTION_MASK_ISA_AVX512VBMI2_UNSET.
(ix86_handle_option): Adjust for
OPTION_MASK_ISA_{SHSTK,AVX512VBMI2}_*SET being in ix86_isa_flags
and OPTION_MASK_ISA_{MOVBE,MWAITX,CLZERO}_*SET in ix86_isa_flags2.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-data-ref.h (prune_runtime_alias_test_list): Take the
factor as a poly_uint64 rather than an unsigned HOST_WIDE_INT.
* tree-data-ref.c (prune_runtime_alias_test_list): Likewise.
Track polynomial offsets.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-vect-data-refs.c (vect_compute_data_ref_alignment):
Treat drb->init as a poly_int. Fail if its misalignment wrt
vector_alignment isn't known.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-vectorizer.h (_loop_vec_info): Add a versioning_threshold
field.
(LOOP_VINFO_VERSIONING_THRESHOLD): New macro
(vect_loop_versioning): Take the loop versioning threshold as a
separate parameter.
* tree-vect-loop-manip.c (vect_loop_versioning): Likewise.
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
versioning_threshold.
(vect_analyze_loop_2): Compute the loop versioning threshold
whenever loop versioning is needed, and store it in the new
field rather than combining it with the cost model threshold.
(vect_transform_loop): Update call to vect_loop_versioning.
Try to combine the loop versioning and cost thresholds here.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-ssa-loop-ivopts.h (strip_offset): Return the offset as
poly_uint64_pod rather than an unsigned HOST_WIDE_INT.
* tree-loop-distribution.c (classify_builtin_st): Update accordingly.
* tree-ssa-loop-ivopts.c (iv_use::addr_offset): Change from
an unsigned HOST_WIDE_INT to a poly_uint64_pod.
(group_compare_offset): Update accordingly.
(split_small_address_groups_p): Likewise.
(record_use): Take addr_offset as a poly_uint64 rather than
an unsigned HOST_WIDE_INT.
(strip_offset): Return the offset as a poly_uint64 rather than
an unsigned HOST_WIDE_INT.
(record_group_use, split_address_groups): Track polynomial offsets.
(add_iv_candidate_for_use): Likewise.
(addr_offset_valid_p): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(strip_offset_1): Return the offset as a poly_int64 rather than
a HOST_WIDE_INT.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree.h (get_binfo_at_offset): Take the offset as a poly_int64
rather than a HOST_WIDE_INT.
* tree.c (get_binfo_at_offset): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* ipa-prop.h (build_ref_for_offset): Take the offset as a poly_int64
rather than a HOST_WIDE_INT.
* tree-sra.c (build_ref_for_offset): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* fold-const.h (mem_ref_offset): Return a poly_offset_int rather
than an offset_int.
* tree.c (mem_ref_offset): Likewise.
(build_simple_mem_ref_loc): Treat MEM_REF offsets as poly_ints.
* builtins.c (get_object_alignment_2): Likewise.
* expr.c (get_inner_reference, expand_expr_real_1): Likewise.
* gimple-fold.c (get_base_constructor): Likewise.
* gimple-ssa-strength-reduction.c (restructure_reference): Likewise.
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref):
Likewise.
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::ipa_polymorphic_call_context): Likewise.
* ipa-prop.c (compute_complex_assign_jump_func): Likewise.
(get_ancestor_addr_info): Likewise.
* ipa-param-manipulation.c (ipa_get_adjustment_candidate): Likewise.
* match.pd: Likewise.
* tree-data-ref.c (dr_analyze_innermost): Likewise.
* tree-dfa.c (get_addr_base_and_unit_offset_1): Likewise.
* tree-eh.c (tree_could_trap_p): Likewise.
* tree-object-size.c (addr_object_size): Likewise.
* tree-ssa-address.c (copy_ref_info): Likewise.
* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Likewise.
(indirect_refs_may_alias_p): Likewise.
* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Likewise.
* tree-ssa.c (maybe_rewrite_mem_ref_base): Likewise.
(non_rewritable_mem_ref_base): Likewise.
* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
* tree-vrp.c (vrp_prop::check_array_ref): Likewise.
* varasm.c (decode_addr_const): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gimple-ssa-stor-merging.c (find_bswap_or_nop_load): Track polynomial
offsets for MEM_REFs.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-ssanames.h (adjust_ptr_info_misalignment): Take the increment
as a poly_uint64 rather than an unsigned int.
* tree-ssanames.c (adjust_ptr_info_misalignment): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* varasm.c (addr_const::offset): Change from HOST_WIDE_INT
to poly_int64.
(decode_addr_const): Update accordingly.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree.h (bit_field_size, bit_field_offset): New functions.
* hsa-gen.c (gen_hsa_addr): Use them.
* tree-ssa-forwprop.c (simplify_bitfield_ref): Likewise.
(simplify_vector_constructor): Likewise.
* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Likewise.
* tree-cfg.c (verify_expr): Require the sizes and offsets of a
BIT_FIELD_REF to be poly_uint64s rather than uhwis.
* fold-const.c (fold_ternary_loc): Protect tree_to_uhwi with
tree_fits_uhwi_p.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expr.h (emit_group_load, emit_group_load_into_temps)
(emit_group_store): Take the size as a poly_int64 rather than an int.
* expr.c (emit_group_load_1, emit_group_load): Likewise.
(emit_group_load_into_temp, emit_group_store): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* ira-int.h (ira_spilled_reg_stack_slot::width): Change from
an unsigned int to a poly_uint64.
* ira.h (ira_reuse_stack_slot, ira_mark_new_stack_slot): Take the
sizes as poly_uint64s rather than unsigned ints.
* ira-color.c (ira_reuse_stack_slot, ira_mark_new_stack_slot):
Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* lra-constraints.c (emit_inc): Change inc_amount from an int
to a poly_int64.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (stack_var::size): Change from a HOST_WIDE_INT
to a poly_uint64.
(add_stack_var, stack_var_cmp, partition_stack_vars)
(dump_stack_var_partition): Update accordingly.
(alloc_stack_frame_space): Take the size as a poly_int64 rather
than a HOST_WIDE_INT.
(expand_stack_vars, expand_one_stack_var_1): Handle polynomial sizes.
(defer_stack_allocation, estimated_stack_frame_size): Likewise.
(account_stack_vars, expand_one_var): Likewise. Return a poly_uint64
rather than a HOST_WIDE_INT.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* target.def (return_pops_args): Treat both the input and output
sizes as poly_int64s rather than HOST_WIDE_INTS.
* targhooks.h (default_return_pops_args): Update accordingly.
* targhooks.c (default_return_pops_args): Likewise.
* doc/tm.texi: Regenerate.
* emit-rtl.h (incoming_args): Change pops_args, size and
outgoing_args_size from int to poly_int64_pod.
* function.h (expr_status): Change x_pending_stack_adjust and
x_stack_pointer_delta from int to poly_int64.
(args_size::constant): Change from HOST_WIDE_INT to poly_int64.
(ARGS_SIZE_RTX): Update accordingly.
* calls.c (highest_outgoing_arg_in_use): Change from int to
unsigned int.
(stack_usage_watermark, stored_args_watermark): New variables.
(stack_region_maybe_used_p, mark_stack_region_used): New functions.
(emit_call_1): Change the stack_size and rounded_stack_size
parameters from HOST_WIDE_INT to poly_int64. Track n_popped
as a poly_int64.
(save_fixed_argument_area): Check stack_usage_watermark.
(initialize_argument_information): Change old_pending_adj from
a HOST_WIDE_INT * to a poly_int64_pod *.
(compute_argument_block_size): Return the size as a poly_int64
rather than an int.
(finalize_must_preallocate): Track polynomial argument sizes.
(compute_argument_addresses): Likewise.
(internal_arg_pointer_based_exp): Track polynomial offsets.
(mem_overlaps_already_clobbered_arg_p): Rename to...
(mem_might_overlap_already_clobbered_arg_p): ...this and take the
size as a poly_uint64 rather than an unsigned HOST_WIDE_INT.
Check stored_args_used_watermark.
(load_register_parameters): Update accordingly.
(check_sibcall_argument_overlap_1): Likewise.
(combine_pending_stack_adjustment_and_call): Take the unadjusted
args size as a poly_int64 rather than an int. Return a bool
indicating whether the optimization was possible and return
the new adjustment by reference.
(check_sibcall_argument_overlap): Track polynomail argument sizes.
Update stored_args_watermark.
(can_implement_as_sibling_call_p): Handle polynomial argument sizes.
(expand_call): Likewise. Maintain stack_usage_watermark and
stored_args_watermark. Update calls to
combine_pending_stack_adjustment_and_call.
(emit_library_call_value_1): Handle polynomial argument sizes.
Call stack_region_maybe_used_p and mark_stack_region_used.
Maintain stack_usage_watermark.
(store_one_arg): Likewise. Update call to
mem_overlaps_already_clobbered_arg_p.
* config/arm/arm.c (arm_output_function_prologue): Add a cast to
HOST_WIDE_INT.
* config/avr/avr.c (avr_outgoing_args_size): Likewise.
* config/microblaze/microblaze.c (microblaze_function_prologue):
Likewise.
* config/cr16/cr16.c (cr16_return_pops_args): Update for new
TARGET_RETURN_POPS_ARGS interface.
(cr16_compute_frame, cr16_initial_elimination_offset): Add casts
to HOST_WIDE_INT.
* config/ft32/ft32.c (ft32_compute_frame): Likewise.
* config/i386/i386.c (ix86_return_pops_args): Update for new
TARGET_RETURN_POPS_ARGS interface.
(ix86_expand_split_stack_prologue): Add a cast to HOST_WIDE_INT.
* config/moxie/moxie.c (moxie_compute_frame): Likewise.
* config/m68k/m68k.c (m68k_return_pops_args): Update for new
TARGET_RETURN_POPS_ARGS interface.
* config/vax/vax.c (vax_return_pops_args): Likewise.
* config/pa/pa.h (STACK_POINTER_OFFSET): Add a cast to poly_int64.
(EXIT_IGNORE_STACK): Update reference to crtl->outgoing_args_size.
* config/arm/arm.h (CALLER_INTERWORKING_SLOT_SIZE): Likewise.
* config/powerpcspe/aix.h (STACK_DYNAMIC_OFFSET): Likewise.
* config/powerpcspe/darwin.h (STACK_DYNAMIC_OFFSET): Likewise.
* config/powerpcspe/powerpcspe.h (STACK_DYNAMIC_OFFSET): Likewise.
* config/rs6000/aix.h (STACK_DYNAMIC_OFFSET): Likewise.
* config/rs6000/darwin.h (STACK_DYNAMIC_OFFSET): Likewise.
* config/rs6000/rs6000.h (STACK_DYNAMIC_OFFSET): Likewise.
* dojump.h (saved_pending_stack_adjust): Change x_pending_stack_adjust
and x_stack_pointer_delta from int to poly_int64.
* dojump.c (do_pending_stack_adjust): Update accordingly.
* explow.c (allocate_dynamic_stack_space): Handle polynomial
stack_pointer_deltas.
* function.c (STACK_DYNAMIC_OFFSET): Add a cast to poly_int64.
(pad_to_arg_alignment): Track polynomial offsets.
(assign_parm_find_stack_rtl): Likewise.
(assign_parms, locate_and_pad_parm): Handle polynomial argument sizes.
* toplev.c (output_stack_usage): Update reference to
current_function_pushed_stack_size.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* function.c (in_arg_offset, var_offset, dynamic_offset)
(out_arg_offset, cfa_offset): Change from int to poly_int64.
(instantiate_new_reg): Return the new offset as a poly_int64_pod
rather than a HOST_WIDE_INT.
(instantiate_virtual_regs_in_rtx): Track polynomial offsets.
(instantiate_virtual_regs_in_insn): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (get_args_size, add_args_size_note): New functions.
(find_args_size_adjust): Return a poly_int64 rather than a
HOST_WIDE_INT.
(fixup_args_size_notes): Likewise. Make the same change to the
end_args_size parameter.
* rtlanal.c (get_args_size, add_args_size_note): New functions.
* builtins.c (expand_builtin_trap): Use add_args_size_note.
* calls.c (emit_call_1): Likewise.
* explow.c (adjust_stack_1): Likewise.
* cfgcleanup.c (old_insns_match_p): Update use of
find_args_size_adjust.
* combine.c (distribute_notes): Track polynomial arg sizes.
* dwarf2cfi.c (dw_trace_info): Change beg_true_args_size,
end_true_args_size, beg_delay_args_size and end_delay_args_size
from HOST_WIDE_INT to poly_int64.
(add_cfi_args_size): Take the args_size as a poly_int64 rather
than a HOST_WIDE_INT.
(notice_args_size, notice_eh_throw, maybe_record_trace_start)
(maybe_record_trace_start_abnormal, scan_trace, connect_traces): Track
polynomial arg sizes.
* emit-rtl.c (try_split): Use get_args_size.
* recog.c (peep2_attempt): Likewise.
* reload1.c (reload_as_needed): Likewise.
* expr.c (find_args_size_adjust): Return the adjustment as a
poly_int64 rather than a HOST_WIDE_INT.
(fixup_args_size_notes): Change end_args_size from a HOST_WIDE_INT
to a poly_int64 and change the return type in the same way.
(emit_single_push_insn): Track polynomial arg sizes.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expr.h (push_block, emit_push_insn): Change the "extra" parameter
from HOST_WIDE_INT to poly_int64.
* expr.c (push_block, emit_push_insn): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* function.h (frame_space): Change start and length from HOST_WIDE_INT
to poly_int64.
(get_frame_size): Return the size as a poly_int64 rather than a
HOST_WIDE_INT.
(frame_offset_overflow): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(assign_stack_local_1, assign_stack_local, assign_stack_temp_for_type)
(assign_stack_temp): Likewise for the size.
* function.c (get_frame_size): Return a poly_int64 rather than
a HOST_WIDE_INT.
(frame_offset_overflow): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(try_fit_stack_local): Take the start, length and size as poly_int64s
rather than HOST_WIDE_INTs. Return the offset as a poly_int64_pod
rather than a HOST_WIDE_INT.
(add_frame_space): Take the start and end as poly_int64s rather than
HOST_WIDE_INTs.
(assign_stack_local_1, assign_stack_local, assign_stack_temp_for_type)
(assign_stack_temp): Likewise for the size.
(temp_slot): Change size, base_offset and full_size from HOST_WIDE_INT
to poly_int64.
(find_temp_slot_from_address): Handle polynomial offsets.
(combine_temp_slots): Likewise.
* emit-rtl.h (rtl_data::x_frame_offset): Change from HOST_WIDE_INT
to poly_int64.
* cfgexpand.c (alloc_stack_frame_space): Return the offset as a
poly_int64 rather than a HOST_WIDE_INT.
(expand_one_stack_var_at): Take the offset as a poly_int64 rather
than a HOST_WIDE_INT.
(expand_stack_vars, expand_one_stack_var_1, expand_used_vars): Handle
polynomial frame offsets.
* config/m32r/m32r-protos.h (m32r_compute_frame_size): Take the size
as a poly_int64 rather than an int.
* config/m32r/m32r.c (m32r_compute_frame_size): Likewise.
* config/v850/v850-protos.h (compute_frame_size): Likewise.
* config/v850/v850.c (compute_frame_size): Likewise.
* config/xtensa/xtensa-protos.h (compute_frame_size): Likewise.
* config/xtensa/xtensa.c (compute_frame_size): Likewise.
* config/pa/pa-protos.h (pa_compute_frame_size): Likewise.
* config/pa/pa.c (pa_compute_frame_size): Likewise.
* explow.h (get_dynamic_stack_base): Take the offset as a poly_int64
rather than a HOST_WIDE_INT.
* explow.c (get_dynamic_stack_base): Likewise.
* final.c (final_start_function): Use the constant lower bound
of the frame size for -Wframe-larger-than.
* ira.c (do_reload): Adjust for new get_frame_size return type.
* lra.c (lra): Likewise.
* reload1.c (reload): Likewise.
* config/avr/avr.c (avr_asm_function_end_prologue): Likewise.
* config/pa/pa.h (EXIT_IGNORE_STACK): Likewise.
* rtlanal.c (get_initial_register_offset): Return the offset as
a poly_int64 rather than a HOST_WIDE_INT.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* reload1.c (elim_table): Change initial_offset, offset and
previous_offset from HOST_WIDE_INT to poly_int64_pod.
(offsets_at): Change the target array's element type from
HOST_WIDE_INT to poly_int64_pod.
(set_label_offsets, eliminate_regs_1, eliminate_regs_in_insn)
(elimination_costs_in_insn, update_eliminable_offsets)
(verify_initial_elim_offsets, set_offsets_for_label)
(init_eliminable_invariants): Update after above changes.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* reload.h (reload::inc): Change from an int to a poly_int64_pod.
* reload.c (combine_reloads, debug_reload_to_stream): Likewise.
(decomposition): Change start and end from HOST_WIDE_INT
to poly_int64_pod.
(decompose, immune_p): Update accordingly.
(find_inc_amount): Return a poly_int64 rather than an int.
* reload1.c (inc_for_reload): Take the inc_amount as a poly_int64
rather than an int.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree.h (get_inner_reference): Return the bitsize and bitpos
as poly_int64_pods rather than HOST_WIDE_INT.
* fold-const.h (ptr_difference_const): Return the pointer difference
as a poly_int64_pod rather than a HOST_WIDE_INT.
* expr.c (get_inner_reference): Return the bitsize and bitpos
as poly_int64_pods rather than HOST_WIDE_INT.
(expand_expr_addr_expr_1, expand_expr_real_1): Track polynomial
offsets and sizes.
* fold-const.c (make_bit_field_ref): Take the bitpos as a poly_int64
rather than a HOST_WIDE_INT. Update call to get_inner_reference.
(optimize_bit_field_compare): Update call to get_inner_reference.
(decode_field_reference): Likewise.
(fold_unary_loc): Track polynomial offsets and sizes.
(split_address_to_core_and_offset): Return the bitpos as a
poly_int64_pod rather than a HOST_WIDE_INT.
(ptr_difference_const): Likewise for the pointer difference.
* asan.c (instrument_derefs): Track polynomial offsets and sizes.
* config/mips/mips.c (r10k_safe_mem_expr_p): Likewise.
* dbxout.c (dbxout_expand_expr): Likewise.
* dwarf2out.c (loc_list_for_address_of_addr_expr_of_indirect_ref)
(loc_list_from_tree_1, fortran_common): Likewise.
* gimple-laddress.c (pass_laddress::execute): Likewise.
* gimple-ssa-store-merging.c (find_bswap_or_nop_load): Likewise.
* gimplify.c (gimplify_scan_omp_clauses): Likewise.
* simplify-rtx.c (delegitimize_mem_from_attrs): Likewise.
* tree-affine.c (tree_to_aff_combination): Likewise.
(get_inner_reference_aff): Likewise.
* tree-data-ref.c (split_constant_offset_1): Likewise.
(dr_analyze_innermost): Likewise.
* tree-scalar-evolution.c (interpret_rhs_expr): Likewise.
* tree-sra.c (ipa_sra_check_caller): Likewise.
* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
* ubsan.c (maybe_instrument_pointer_overflow): Likewise.
(instrument_bool_enum_load, instrument_object_size): Likewise.
* gimple-ssa-strength-reduction.c (slsr_process_ref): Update call
to get_inner_reference.
* hsa-gen.c (gen_hsa_addr): Likewise.
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Likewise.
* tsan.c (instrument_expr): Likewise.
* match.pd: Update call to ptr_difference_const.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* fold-const.c (fold_comparison): Track sizes and offsets as
poly_int64s rather than HOST_WIDE_INTs when folding address
comparisons.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expr.h (get_bit_range): Return the bitstart and bitend as
poly_uint64s rather than unsigned HOST_WIDE_INTs. Return the bitpos
as a poly_int64 rather than a HOST_WIDE_INT.
* expr.c (get_bit_range): Likewise.
(expand_assignment): Update call accordingly.
* fold-const.c (optimize_bit_field_compare): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_addr_query_type): New enum.
(aarch64_legitimate_address_p): Use it instead of an rtx code,
as an optional final parameter.
* config/aarch64/aarch64.c (aarch64_classify_address): Likewise.
(aarch64_legitimate_address_p): Likewise.
(aarch64_print_address_internal): Take an aarch64_addr_query_type
instead of an rtx code.
(aarch64_address_valid_for_prefetch_p): Update calls accordingly.
(aarch64_legitimate_address_hook_p): Likewise.
(aarch64_print_ldpstp_address): Likewise.
(aarch64_print_operand_address): Likewise.
(aarch64_address_cost): Likewise.
* config/aarch64/constraints.md (Uml, Umq, Ump, Utq): Likewise.
* config/aarch64/predicates.md (aarch64_mem_pair_operand): Likewise.
(aarch64_mem_pair_lanes_operand): Likewise.
2017-12-20 Richard Biener <rguenther@suse.de>
* tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Call
update_stmt_if_modified.
2017-12-20 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/83491
* tree-ssa-math-opts.c (execute_cse_reciprocals_1): Check for SSA_NAME
before walking uses. Improve coding style and comments.
2017-12-20 Tom de Vries <tom@codesourcery.com>
* gimple-fold.c (fold_internal_goacc_dim): Simplify.
2017-12-20 Jakub Jelinek <jakub@redhat.com>
PR ipa/83506
* ipa-fnsummary.c (pass_data_ipa_free_fn_summary): Use 0 for
todo_flags_finish.
(pass_ipa_free_fn_summary): Add small_p private data member,
initialize to false in the ctor.
(pass_ipa_free_fn_summary::clone,
pass_ipa_free_fn_summary::set_pass_param,
pass_ipa_free_fn_summary::gate): New methods.
(pass_ipa_free_fn_summary::execute): Return TODO_remove_functions
| TODO_dump_symtab if small_p.
* passes.def: Add true parm for the existing pass_ipa_free_fn_summary
entry and add another instance of the pass with false parm after
ipa-pure-const.
* ipa-pure-const.c (pass_ipa_pure_const): Don't call
ipa_free_fn_summary here.
2017-12-20 Paolo Carlini <paolo.carlini@oracle.com>
* gimplify.c (gimplify_return_expr): Remove dead error_mark_node check.
2017-12-20 Martin Sebor <msebor@redhat.com>
PR testsuite/83131
* builtins.c (expand_builtin_strlen): Use get_callee_fndecl.
(expand_builtin_strcmp): Call maybe_warn_nonstring_arg.
(expand_builtin_strncmp): Same.
2017-12-20 Alexandre Oliva <aoliva@redhat.com>
PR bootstrap/83396
* cfgexpand.c (label_rtx_for_bb): Revert SFN changes that
allowed debug stmts before labels.
(expand_gimple_basic_block): Likewise.
* gimple-iterator.c (gimple_find_edge_insert_loc): Likewise.
* gimple-iterator.h (gsi_after_labels): Likewise.
* tree-cfgcleanup (remove_forwarder_block): Likewise, but
rename reused variable, and simplify using gsi_move_before.
* tree-ssa-tail-merge.c (find_duplicate): Likewise.
* tree-cfg.c (make_edges, cleanup_dead_labels): Likewise.
(gimple_can_merge_blocks_p, verify_gimple_in_cfg): Likewise.
(gimple_verify_flow_info, gimple_block_label): Likewise.
(make_blocks): Move debug markers after adjacent labels.
* cfgrtl.c (skip_insns_after_block): Revert SFN changes that
allowed debug insns outside blocks.
* df-scan.c (df_insn_delete): Likewise.
* lra-constraints.c (update_ebb_live_info): Likewise.
* var-tracking.c (get_first_insn, vt_emit_notes): Likewise.
(vt_initialize, delete_vta_debug_insns): Likewise.
(reemit_marker_as_note): Drop BB parm. Adjust callers.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* poly-int-types.h (round_down_to_byte_boundary): New macro.
(round_up_to_byte_boundary): Likewise.
* expr.h (get_bit_range): Add temporary shim.
* gimple-ssa-store-merging.c (store_operand_info): Change the
bitsize, bitpos, bitregion_start and bitregion_end fields from
unsigned HOST_WIDE_INT to poly_uint64.
(merged_store_group): Likewise load_align_base.
(compatible_load_p, compatible_load_p): Update accordingly.
(imm_store_chain_info::coalesce_immediate_stores): Likewise.
(split_group, imm_store_chain_info::output_merged_store): Likewise.
(mem_valid_for_store_merging): Return the bitsize, bitpos,
bitregion_start and bitregion_end as poly_uint64s rather than
unsigned HOST_WIDE_INTs. Track polynomial offsets internally.
(handled_load): Take the bitsize, bitpos,
bitregion_start and bitregion_end as poly_uint64s rather than
unsigned HOST_WIDE_INTs.
(pass_store_merging::process_store): Update call to
mem_valid_for_store_merging.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* builtins.c (get_object_alignment_2): Track polynomial offsets
and sizes. Update the alignment handling.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree.h (get_inner_reference): Add a version that returns the
offset and size as poly_int64_pods rather than HOST_WIDE_INTs.
* cfgexpand.c (expand_debug_expr): Track polynomial offsets. Simply
the case in which bitpos is not associated with the first byte.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-affine.h (get_inner_reference_aff): Return the size as a
poly_widest_int.
* tree-affine.c (get_inner_reference_aff): Likewise.
* tree-data-ref.c (dr_may_alias_p): Update accordingly.
* tree-ssa-loop-im.c (mem_refs_may_alias_p): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* fold-const.c (pointer_may_wrap_p): Take the offset as a
HOST_WIDE_INT rather than a poly_int64.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gimple-ssa-store-merging.c (symbolic_number::bytepos): Change from
HOST_WIDE_INT to poly_int64_pod.
(perform_symbolic_merge): Update accordingly.
(bswap_replace): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-affine.h (aff_tree::offset): Change from widest_int
to poly_widest_int.
(wide_int_ext_for_comb): Delete.
(aff_combination_const, aff_comb_cannot_overlap_p): Take the
constants as poly_widest_int rather than widest_int.
(aff_combination_constant_multiple_p): Return the multiplier
as a poly_widest_int.
(aff_combination_zero_p, aff_combination_singleton_var_p): Handle
polynomial offsets.
* tree-affine.c (wide_int_ext_for_comb): Make original widest_int
version static and add an overload for poly_widest_int.
(aff_combination_const, aff_combination_add_cst)
(wide_int_constant_multiple_p, aff_comb_cannot_overlap_p): Take
the constants as poly_widest_int rather than widest_int.
(tree_to_aff_combination): Generalize INTEGER_CST case to
poly_int_tree_p.
(aff_combination_to_tree): Track offsets as poly_widest_ints.
(aff_combination_add_product, aff_combination_mult): Handle
polynomial offsets.
(aff_combination_constant_multiple_p): Return the multiplier
as a poly_widest_int.
* tree-predcom.c (determine_offset): Return the offset as a
poly_widest_int.
(split_data_refs_to_components, suitable_component_p): Update
accordingly.
(valid_initializer_p): Update call to
aff_combination_constant_multiple_p.
* tree-ssa-address.c (addr_to_parts): Handle polynomial offsets.
* tree-ssa-loop-ivopts.c (get_address_cost_ainc): Take the step
as a poly_int64 rather than a HOST_WIDE_INT.
(get_address_cost): Handle polynomial offsets.
(iv_elimination_compare_lt): Likewise.
(rewrite_use_nonlinear_expr): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-dfa.h (get_addr_base_and_unit_offset_1): Return the offset
as a poly_int64_pod rather than a HOST_WIDE_INT.
(get_addr_base_and_unit_offset): Likewise.
* tree-dfa.c (get_addr_base_and_unit_offset_1): Likewise.
(get_addr_base_and_unit_offset): Likewise.
* doc/match-and-simplify.texi: Change off from HOST_WIDE_INT
to poly_int64 in example.
* fold-const.c (fold_binary_loc): Update call to
get_addr_base_and_unit_offset.
* gimple-fold.c (gimple_fold_builtin_memory_op): Likewise.
(maybe_canonicalize_mem_ref_addr): Likewise.
(gimple_fold_stmt_to_constant_1): Likewise.
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref):
Likewise.
* ipa-param-manipulation.c (ipa_modify_call_arguments): Likewise.
* match.pd: Likewise.
* omp-low.c (lower_omp_target): Likewise.
* tree-sra.c (build_ref_for_offset): Likewise.
(build_debug_ref_for_model): Likewise.
* tree-ssa-address.c (maybe_fold_tmr): Likewise.
* tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Likewise.
* tree-ssa-ccp.c (optimize_memcpy): Likewise.
* tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
(constant_pointer_difference): Likewise.
* tree-ssa-loop-niter.c (expand_simple_operations): Likewise.
* tree-ssa-phiopt.c (jump_function_from_stmt): Likewise.
* tree-ssa-pre.c (create_component_ref_by_pieces_1): Likewise.
* tree-ssa-sccvn.c (vn_reference_fold_indirect): Likewise.
(vn_reference_maybe_forwprop_address, vn_reference_lookup_3): Likewise.
(set_ssa_val_to): Likewise.
* tree-ssa-strlen.c (get_addr_stridx, addr_stridxptr)
(maybe_diag_stxncpy_trunc): Likewise.
* tree-vrp.c (vrp_prop::check_array_ref): Likewise.
* tree.c (build_simple_mem_ref_loc): Likewise.
(array_at_struct_end_p): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-dfa.h (get_ref_base_and_extent): Return the base, size and
max_size as poly_int64_pods rather than HOST_WIDE_INTs.
(get_ref_base_and_extent_hwi): Declare.
* tree-dfa.c (get_ref_base_and_extent): Return the base, size and
max_size as poly_int64_pods rather than HOST_WIDE_INTs.
(get_ref_base_and_extent_hwi): New function.
* cfgexpand.c (expand_debug_expr): Update call to
get_ref_base_and_extent.
* dwarf2out.c (add_var_loc_to_decl): Likewise.
* gimple-fold.c (get_base_constructor): Return the offset as a
poly_int64_pod rather than a HOST_WIDE_INT.
(fold_const_aggregate_ref_1): Track polynomial sizes and offsets.
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::set_by_invariant)
(extr_type_from_vtbl_ptr_store): Track polynomial offsets.
(ipa_polymorphic_call_context::ipa_polymorphic_call_context)
(check_stmt_for_type_change): Use get_ref_base_and_extent_hwi
rather than get_ref_base_and_extent.
(ipa_polymorphic_call_context::get_dynamic_type): Likewise.
* ipa-prop.c (ipa_load_from_parm_agg, compute_complex_assign_jump_func)
(get_ancestor_addr_info, determine_locally_known_aggregate_parts):
Likewise.
* ipa-param-manipulation.c (ipa_get_adjustment_candidate): Update
call to get_ref_base_and_extent.
* tree-sra.c (create_access, get_access_for_expr): Likewise.
* tree-ssa-alias.c (ao_ref_base, aliasing_component_refs_p)
(stmt_kills_ref_p): Likewise.
* tree-ssa-dce.c (mark_aliased_reaching_defs_necessary_1): Likewise.
* tree-ssa-scopedtables.c (avail_expr_hash, equal_mem_array_ref_p):
Likewise.
* tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
Use get_ref_base_and_extent_hwi rather than get_ref_base_and_extent
when calling native_encode_expr.
* tree-ssa-structalias.c (get_constraint_for_component_ref): Update
call to get_ref_base_and_extent.
(do_structure_copy): Use get_ref_base_and_extent_hwi rather than
get_ref_base_and_extent.
* var-tracking.c (track_expr_p): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* ipa-param-manipulation.h (ipa_parm_adjustment::offset): Change from
HOST_WIDE_INT to poly_int64_pod.
* ipa-param-manipulation.c (ipa_modify_call_arguments): Track
polynomail parameter offsets.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gengtype.c (main): Handle poly_int64_pod.
* dwarf2out.h (dw_cfi_oprnd_cfa_loc): New dw_cfi_oprnd_type.
(dw_cfi_oprnd::dw_cfi_cfa_loc): New field.
(dw_cfa_location::offset, dw_cfa_location::base_offset): Change
from HOST_WIDE_INT to poly_int64_pod.
* dwarf2cfi.c (queued_reg_save::cfa_offset): Likewise.
(copy_cfa): New function.
(lookup_cfa_1): Use the cached dw_cfi_cfa_loc, if it exists.
(cfi_oprnd_equal_p): Handle dw_cfi_oprnd_cfa_loc.
(cfa_equal_p, dwarf2out_frame_debug_adjust_cfa)
(dwarf2out_frame_debug_cfa_offset, dwarf2out_frame_debug_expr)
(initial_return_save): Treat offsets as poly_ints.
(def_cfa_0): Likewise. Cache the CFA in dw_cfi_cfa_loc if either
offset is nonconstant.
(reg_save): Take the offset as a poly_int64. Fall back to
DW_CFA_expression for nonconstant offsets.
(queue_reg_save): Take the offset as a poly_int64.
* dwarf2out.c (dw_cfi_oprnd2_desc): Handle DW_CFA_def_cfa_expression.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (operand_subword, operand_subword_force): Take the offset
as a poly_uint64 an unsigned int.
* emit-rtl.c (operand_subword, operand_subword_force): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/rtl.texi: Update documentation of SUBREG_BYTE. Document the
'p' format code. Use INT_LIST rather than SUBREG as the example of
a code with an XINT and an XEXP. Remove the implication that
accessing an rtx field using XINT is expected to work.
* rtl.def (SUBREG): Change format from "ei" to "ep".
* rtl.h (rtunion::rt_subreg): New field.
(XCSUBREG): New macro.
(SUBREG_BYTE): Use it.
(subreg_shape): Change offset from an unsigned int to a poly_uint16.
Update constructor accordingly.
(subreg_shape::operator ==): Update accordingly.
(subreg_shape::unique_id): Return an unsigned HOST_WIDE_INT rather
than an unsigned int.
(subreg_lsb, subreg_lowpart_offset, subreg_highpart_offset): Return
a poly_uint64 rather than an unsigned int.
(subreg_lsb_1): Likewise. Take the offset as a poly_uint64 rather
than an unsigned int.
(subreg_size_offset_from_lsb, subreg_size_lowpart_offset)
(subreg_size_highpart_offset): Return a poly_uint64 rather than
an unsigned int. Take the sizes as poly_uint64s.
(subreg_offset_from_lsb): Return a poly_uint64 rather than
an unsigned int. Take the shift as a poly_uint64 rather than
an unsigned int.
(subreg_regno_offset, subreg_offset_representable_p): Take the offset
as a poly_uint64 rather than an unsigned int.
(simplify_subreg_regno): Likewise.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(simplify_subreg, simplify_gen_subreg, subreg_get_info)
(gen_rtx_SUBREG, validate_subreg): Take the subreg offset as a
poly_uint64 rather than an unsigned int.
* rtl.c (rtx_format): Describe 'p' in comment.
(copy_rtx, rtx_equal_p_cb, rtx_equal_p): Handle 'p'.
* emit-rtl.c (validate_subreg, gen_rtx_SUBREG): Take the subreg
offset as a poly_uint64 rather than an unsigned int.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(subreg_size_lowpart_offset, subreg_size_highpart_offset): Take the
mode sizes as poly_uint64s rather than unsigned ints. Return a
poly_uint64 rather than an unsigned int.
(subreg_lowpart_p): Treat subreg offsets as poly_ints.
(copy_insn_1): Handle 'p'.
* rtlanal.c (set_noop_p): Treat subregs offsets as poly_uint64s.
(subreg_lsb_1): Take the subreg offset as a poly_uint64 rather than
an unsigned int. Return the shift in the same way.
(subreg_lsb): Return the shift as a poly_uint64 rather than an
unsigned int.
(subreg_size_offset_from_lsb): Take the sizes and shift as
poly_uint64s rather than unsigned ints. Return the offset as
a poly_uint64.
(subreg_get_info, subreg_regno_offset, subreg_offset_representable_p)
(simplify_subreg_regno): Take the offset as a poly_uint64 rather than
an unsigned int.
* rtlhash.c (add_rtx): Handle 'p'.
* genemit.c (gen_exp): Likewise.
* gengenrtl.c (type_from_format, gendef): Likewise.
* gensupport.c (subst_pattern_match, get_alternatives_number)
(collect_insn_data, alter_predicate_for_insn, alter_constraints)
(subst_dup): Likewise.
* gengtype.c (adjust_field_rtx_def): Likewise.
* genrecog.c (find_operand, find_matching_operand, validate_pattern)
(match_pattern_2): Likewise.
(rtx_test::SUBREG_FIELD): New rtx_test::kind_enum.
(rtx_test::subreg_field): New function.
(operator ==, safe_to_hoist_p, transition_parameter_type)
(print_nonbool_test, print_test): Handle SUBREG_FIELD.
* genattrtab.c (attr_rtx_1): Say that 'p' is deliberately not handled.
* genpeep.c (match_rtx): Likewise.
* print-rtl.c (print_poly_int): Include if GENERATOR_FILE too.
(rtx_writer::print_rtx_operand): Handle 'p'.
(print_value): Handle SUBREG.
* read-rtl.c (apply_int_iterator): Likewise.
(rtx_reader::read_rtx_operand): Handle 'p'.
* alias.c (rtx_equal_for_memref_p): Likewise.
* cselib.c (rtx_equal_for_cselib_1, cselib_hash_rtx): Likewise.
* caller-save.c (replace_reg_with_saved_mem): Treat subreg offsets
as poly_ints.
* calls.c (expand_call): Likewise.
* combine.c (combine_simplify_rtx, expand_field_assignment): Likewise.
(make_extraction, gen_lowpart_for_combine): Likewise.
* loop-invariant.c (hash_invariant_expr_1, invariant_expr_equal_p):
Likewise.
* cse.c (remove_invalid_subreg_refs): Take the offset as a poly_uint64
rather than an unsigned int. Treat subreg offsets as poly_ints.
(exp_equiv_p): Handle 'p'.
(hash_rtx_cb): Likewise. Treat subreg offsets as poly_ints.
(equiv_constant, cse_insn): Treat subreg offsets as poly_ints.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (rtl_for_decl_location): Likewise.
* expmed.c (extract_low_bits): Likewise.
* expr.c (emit_group_store, undefined_operand_subword_p): Likewise.
(expand_expr_real_2): Likewise.
* final.c (alter_subreg): Likewise.
(leaf_renumber_regs_insn): Handle 'p'.
* function.c (assign_parm_find_stack_rtl, assign_parm_setup_stack):
Treat subreg offsets as poly_ints.
* fwprop.c (forward_propagate_and_simplify): Likewise.
* ifcvt.c (noce_emit_move_insn, noce_emit_cmove): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-conflicts.c (go_through_subreg): Likewise.
* ira-lives.c (process_single_reg_class_operands): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise. Handle 'p'.
* lower-subreg.c (simplify_subreg_concatn): Take the subreg offset
as a poly_uint64 rather than an unsigned int.
(simplify_gen_subreg_concatn, resolve_simple_move): Treat
subreg offsets as poly_ints.
* lra-constraints.c (operands_match_p): Handle 'p'.
(match_reload, curr_insn_transform): Treat subreg offsets as poly_ints.
* lra-spills.c (assign_mem_slot): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (general_operand, indirect_operand): Likewise.
* regcprop.c (copy_value, maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reginfo.c (simplifiable_subregs_hasher::hash, simplifiable_subregs)
(record_subregs_of_mode): Likewise.
* rtlhooks.c (gen_lowpart_general, gen_lowpart_if_possible): Likewise.
* reload.c (operands_match_p): Handle 'p'.
(find_reloads_subreg_address): Treat subreg offsets as poly_ints.
* reload1.c (alter_reg, choose_reload_regs): Likewise.
(compute_reload_subreg_offset): Likewise, and return an poly_int64.
* simplify-rtx.c (simplify_truncation, simplify_binary_operation_1):
(test_vector_ops_duplicate): Treat subreg offsets as poly_ints.
(simplify_const_poly_int_tests<N>::run): Likewise.
(simplify_subreg, simplify_gen_subreg): Take the subreg offset as
a poly_uint64 rather than an unsigned int.
* valtrack.c (debug_lowpart_subreg): Likewise.
* var-tracking.c (var_lowpart): Likewise.
(loc_cmp): Handle 'p'.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* ira.c (get_subreg_tracking_sizes): New function.
(init_live_subregs): Take an integer size rather than a register.
(build_insn_chain): Use get_subreg_tracking_sizes. Update calls
to init_live_subregs.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expr.c (store_constructor_field): Change bitsize from a
unsigned HOST_WIDE_INT to a poly_uint64 and bitpos from a
HOST_WIDE_INT to a poly_int64.
(store_constructor): Change size from a HOST_WIDE_INT to
a poly_int64.
(store_field): Likewise bitsize and bitpos.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expmed.h (store_bit_field): Change bitregion_start and
bitregion_end from unsigned HOST_WIDE_INT to poly_uint64.
* expmed.c (adjust_bit_field_mem_for_reg, strict_volatile_bitfield_p)
(store_bit_field_1, store_integral_bit_field, store_bit_field)
(store_fixed_bit_field, store_split_bit_field): Likewise.
* expr.c (store_constructor_field, store_field): Likewise.
(optimize_bitfield_assignment_op): Likewise. Make the same change
to bitsize and bitpos.
* machmode.h (bit_field_mode_iterator): Change m_bitregion_start
and m_bitregion_end from HOST_WIDE_INT to poly_int64. Make the
same change in the constructor arguments.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
* stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator):
Change bitregion_start and bitregion_end from HOST_WIDE_INT to
poly_int64.
(bit_field_mode_iterator::next_mode): Update for new types
of m_bitregion_start and m_bitregion_end.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (simplify_gen_subreg): Add a temporary overload that
accepts poly_uint64 offsets.
* expmed.h (extract_bit_field): Take bitsize and bitnum as
poly_uint64s rather than unsigned HOST_WIDE_INTs.
* expmed.c (lowpart_bit_field_p): Likewise.
(extract_bit_field_as_subreg): New function, split out from...
(extract_bit_field_1): ...here. Take bitsize and bitnum as
poly_uint64s rather than unsigned HOST_WIDE_INTs. For vector
extractions, check that BITSIZE matches the size of the extracted
value and that BITNUM is an exact multiple of that size.
If all else fails, try forcing the value into memory if
BITNUM is variable, and adjusting the address so that the
offset is constant. Split the part that can only handle constant
bitsize and bitnum out into...
(extract_integral_bit_field): ...this new function.
(extract_bit_field): Take bitsize and bitnum as poly_uint64s
rather than unsigned HOST_WIDE_INTs.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expmed.h (store_bit_field): Take bitsize and bitnum as
poly_uint64s rather than unsigned HOST_WIDE_INTs.
* expmed.c (simple_mem_bitfield_p): Likewise. Add a parameter
that returns the byte size.
(store_bit_field_1): Take bitsize and bitnum as
poly_uint64s rather than unsigned HOST_WIDE_INTs. Update call
to simple_mem_bitfield_p. Split the part that can only handle
constant bitsize and bitnum out into...
(store_integral_bit_field): ...this new function.
(store_bit_field): Take bitsize and bitnum as poly_uint64s rather
than unsigned HOST_WIDE_INTs.
(extract_bit_field_1): Update call to simple_mem_bitfield_p.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* lra-int.h (lra_reg): Change offset from int to poly_int64.
(lra_insn_recog_data): Change sp_offset from HOST_WIDE_INT
to poly_int64.
(lra_eliminate_regs_1, eliminate_regs_in_insn): Change
update_sp_offset from a HOST_WIDE_INT to a poly_int64.
(lra_update_reg_val_offset, lra_reg_val_equal_p): Take the
offset as a poly_int64 rather than an int.
* lra-assigns.c (find_hard_regno_for_1): Handle poly_int64 offsets.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (equiv_address_substitution): Track offsets
as poly_int64s.
(emit_inc): Check poly_int_rtx_p instead of CONST_INT_P.
(curr_insn_transform): Handle the new form of sp_offset.
* lra-eliminations.c (lra_elim_table): Change previous_offset
and offset from HOST_WIDE_INT to poly_int64.
(print_elim_table, update_reg_eliminate): Update accordingly.
(self_elim_offsets): Change from HOST_WIDE_INT to poly_int64_pod.
(get_elimination): Update accordingly.
(form_sum): Check poly_int_rtx_p instead of CONST_INT_P.
(lra_eliminate_regs_1, eliminate_regs_in_insn): Change
update_sp_offset from a HOST_WIDE_INT to a poly_int64. Handle
poly_int64 offsets generally.
(curr_sp_change): Change from HOST_WIDE_INT to poly_int64.
(mark_not_eliminable, init_elimination): Update accordingly.
(remove_reg_equal_offset_note): Return a bool and pass the new
offset back by pointer as a poly_int64.
* lra-remat.c (change_sp_offset): Take sp_offset as a poly_int64
rather than a HOST_WIDE_INT.
(do_remat): Track offsets poly_int64s.
* lra.c (lra_update_insn_recog_data, setup_sp_offset): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (mem_attrs): Add a default constructor. Change size and
offset from HOST_WIDE_INT to poly_int64.
* emit-rtl.h (set_mem_offset, set_mem_size, adjust_address_1)
(adjust_automodify_address_1, set_mem_attributes_minus_bitpos)
(widen_memory_access): Take the sizes and offsets as poly_int64s
rather than HOST_WIDE_INTs.
* alias.c (ao_ref_from_mem): Handle the new form of MEM_OFFSET.
(offset_overlap_p): Take poly_int64s rather than HOST_WIDE_INTs
and ints.
(adjust_offset_for_component_ref): Change the offset from a
HOST_WIDE_INT to a poly_int64.
(nonoverlapping_memrefs_p): Track polynomial offsets and sizes.
* cfgcleanup.c (merge_memattrs): Update after mem_attrs changes.
* dce.c (find_call_stack_args): Likewise.
* dse.c (record_store): Likewise.
* dwarf2out.c (tls_mem_loc_descriptor, dw_sra_loc_expr): Likewise.
* print-rtl.c (rtx_writer::print_rtx): Likewise.
* read-rtl-function.c (test_loading_mem): Likewise.
* rtlanal.c (may_trap_p_1): Likewise.
* simplify-rtx.c (delegitimize_mem_from_attrs): Likewise.
* var-tracking.c (int_mem_offset, track_expr_p): Likewise.
* emit-rtl.c (mem_attrs_eq_p, get_mem_align_offset): Likewise.
(mem_attrs::mem_attrs): New function.
(set_mem_attributes_minus_bitpos): Change bitpos from a
HOST_WIDE_INT to poly_int64.
(set_mem_alias_set, set_mem_addr_space, set_mem_align, set_mem_expr)
(clear_mem_offset, clear_mem_size, change_address)
(get_spill_slot_decl, set_mem_attrs_for_spill): Directly
initialize mem_attrs.
(set_mem_offset, set_mem_size, adjust_address_1)
(adjust_automodify_address_1, offset_address, widen_memory_access):
Likewise. Take poly_int64s rather than HOST_WIDE_INT.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtlanal.c (rtx_addr_can_trap_p_1): Take the offset and size
as poly_int64s rather than HOST_WIDE_INTs. Use a size of -1
rather than 0 to represent an unknown size. Assert that the size
is known when the mode isn't BLKmode.
(may_trap_p_1): Use -1 for unknown sizes.
(rtx_addr_can_trap_p): Likewise. Pass BLKmode rather than VOIDmode.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* dse.c (store_info): Change offset and width from HOST_WIDE_INT
to poly_int64. Update commentary for positions_needed.large.
(read_info_type): Change offset and width from HOST_WIDE_INT
to poly_int64.
(set_usage_bits): Likewise.
(canon_address): Return the offset as a poly_int64 rather than
a HOST_WIDE_INT. Use strip_offset_and_add.
(set_all_positions_unneeded, any_positions_needed_p): Use
positions_needed.large to track stores with non-constant widths.
(all_positions_needed_p): Likewise. Take the offset and width
as poly_int64s rather than ints. Assert that rhs is nonnull.
(record_store): Cope with non-constant offsets and widths.
Nullify the rhs of an earlier store if we can't tell which bytes
of it are needed.
(find_shift_sequence): Take the access_size and shift as poly_int64s
rather than ints.
(get_stored_val): Take the read_offset and read_width as poly_int64s
rather than HOST_WIDE_INTs.
(check_mem_read_rtx, scan_stores, scan_reads, dse_step5): Handle
non-constant offsets and widths.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* inchash.h (inchash::hash::add_poly_int): New function.
* tree-ssa-alias.h (ao_ref::offset, ao_ref::size, ao_ref::max_size):
Use poly_int64 rather than HOST_WIDE_INT.
(ao_ref::max_size_known_p): New function.
* tree-ssa-sccvn.h (vn_reference_op_struct::off): Use poly_int64_pod
rather than HOST_WIDE_INT.
* tree-ssa-alias.c (ao_ref_base): Apply get_ref_base_and_extent
to temporaries until its interface is adjusted to match.
(ao_ref_init_from_ptr_and_size): Handle polynomial offsets and sizes.
(aliasing_component_refs_p, decl_refs_may_alias_p)
(indirect_ref_may_alias_decl_p, indirect_refs_may_alias_p): Take
the offsets and max_sizes as poly_int64s instead of HOST_WIDE_INTs.
(refs_may_alias_p_1, stmt_kills_ref_p): Adjust for changes to
ao_ref fields.
* alias.c (ao_ref_from_mem): Likewise.
* tree-ssa-dce.c (mark_aliased_reaching_defs_necessary_1): Likewise.
* tree-ssa-dse.c (valid_ao_ref_for_dse, normalize_ref)
(clear_bytes_written_by, setup_live_bytes_from_ref, compute_trims)
(maybe_trim_complex_store, maybe_trim_constructor_store)
(live_bytes_read, dse_classify_store): Likewise.
* tree-ssa-sccvn.c (vn_reference_compute_hash, vn_reference_eq):
(copy_reference_ops_from_ref, ao_ref_init_from_vn_reference)
(fully_constant_vn_reference_p, valueize_refs_1): Likewise.
(vn_reference_lookup_3): Likewise.
* tree-ssa-uninit.c (warn_uninitialized_vars): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-ssa-alias.c (indirect_ref_may_alias_decl_p)
(indirect_refs_may_alias_p): Use ranges_may_overlap_p
instead of ranges_overlap_p.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-ssa-alias.c (same_addr_size_stores_p): Take the offsets and
sizes as poly_int64s rather than HOST_WIDE_INTs.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gimple-fold.h (fold_ctor_reference): Take the offset and size
as poly_uint64 rather than unsigned HOST_WIDE_INT.
* gimple-fold.c (fold_ctor_reference): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* target.def (dwarf_poly_indeterminate_value): New hook.
* targhooks.h (default_dwarf_poly_indeterminate_value): Declare.
* targhooks.c (default_dwarf_poly_indeterminate_value): New function.
* doc/tm.texi.in (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Document.
* doc/tm.texi: Regenerate.
* dwarf2out.h (build_cfa_loc, build_cfa_aligned_loc): Take the
offset as a poly_int64.
* dwarf2out.c (new_reg_loc_descr): Move later in file. Take the
offset as a poly_int64.
(loc_descr_plus_const, loc_list_plus_const, build_cfa_aligned_loc):
Take the offset as a poly_int64.
(build_cfa_loc): Likewise. Use loc_descr_plus_const.
(frame_pointer_fb_offset): Change to a poly_int64.
(int_loc_descriptor): Take the offset as a poly_int64. Use
targetm.dwarf_poly_indeterminate_value for polynomial offsets.
(based_loc_descr): Take the offset as a poly_int64.
Use strip_offset_and_add to handle (plus X (const)).
Use new_reg_loc_descr instead of an open-coded version of the
previous implementation.
(mem_loc_descriptor): Handle CONST_POLY_INT.
(compute_frame_pointer_to_fb_displacement): Take the offset as a
poly_int64. Use strip_offset_and_add to handle (plus X (const)).
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (reg_attrs::offset): Change from HOST_WIDE_INT to poly_int64.
(gen_rtx_REG_offset): Take the offset as a poly_int64.
* inchash.h (inchash::hash::add_poly_hwi): New function.
* gengtype.c (main): Register poly_int64.
* emit-rtl.c (reg_attr_hasher::hash): Use inchash. Treat the
offset as a poly_int.
(reg_attr_hasher::equal): Use must_eq to compare offsets.
(get_reg_attrs, update_reg_offset, gen_rtx_REG_offset): Take the
offset as a poly_int64.
(set_reg_attrs_from_value): Treat the offset as a poly_int64.
* print-rtl.c (print_poly_int): New function.
(rtx_writer::print_rtx_operand_code_r): Treat REG_OFFSET as
a poly_int.
* var-tracking.c (track_offset_p, get_tracked_reg_offset): New
functions.
(var_reg_set, var_reg_delete_and_set, var_reg_delete): Use them.
(same_variable_part_p, track_loc_p): Take the offset as a poly_int64.
(vt_get_decl_and_offset): Return the offset as a poly_int64.
Enforce track_offset_p for parts of a PARALLEL.
(vt_add_function_parameter): Use const_offset for the final
offset to track. Use get_tracked_reg_offset for the parts
of a PARALLEL.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* target.def (truly_noop_truncation): Take poly_uint64s instead of
unsigned ints. Change default to hook_bool_puint64_puint64_true.
* doc/tm.texi: Regenerate.
* hooks.h (hook_bool_uint_uint_true): Delete.
(hook_bool_puint64_puint64_true): Declare.
* hooks.c (hook_bool_uint_uint_true): Delete.
(hook_bool_puint64_puint64_true): New function.
* config/mips/mips.c (mips_truly_noop_truncation): Take poly_uint64s
instead of unsigned ints.
* config/spu/spu.c (spu_truly_noop_truncation): Likewise.
* config/tilegx/tilegx.c (tilegx_truly_noop_truncation): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* optabs.h (expand_operand): Add an int_value field.
(create_expand_operand): Add an int_value parameter and use it
to initialize the new expand_operand field.
(create_integer_operand): Replace with a declaration of a function
that accepts poly_int64s. Move the implementation to...
* optabs.c (create_integer_operand): ...here.
(maybe_legitimize_operand): For EXPAND_INTEGER, check whether
the mode preserves the value of int_value, instead of calling
const_int_operand on the rtx. Use gen_int_mode to generate
the new rtx.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* dumpfile.h (dump_dec): Declare.
* dumpfile.c (dump_dec): New function.
* pretty-print.h (pp_wide_integer): Turn into a function and
declare a poly_int version.
* pretty-print.c (pp_wide_integer): New function for poly_ints.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/generic.texi (POLY_INT_CST): Document.
* tree.def (POLY_INT_CST): New tree code.
* treestruct.def (TS_POLY_INT_CST): New tree layout.
* tree-core.h (tree_poly_int_cst): New struct.
(tree_node): Add a poly_int_cst field.
* tree.h (POLY_INT_CST_P, POLY_INT_CST_COEFF): New macros.
(wide_int_to_tree, force_fit_type): Take a poly_wide_int_ref
instead of a wide_int_ref.
(build_int_cst, build_int_cst_type): Take a poly_int64 instead
of a HOST_WIDE_INT.
(build_int_cstu, build_array_type_nelts): Take a poly_uint64
instead of an unsigned HOST_WIDE_INT.
(build_poly_int_cst, tree_fits_poly_int64_p, tree_fits_poly_uint64_p)
(ptrdiff_tree_p): Declare.
(tree_to_poly_int64, tree_to_poly_uint64): Likewise. Provide
extern inline implementations if the target doesn't use POLY_INT_CST.
(poly_int_tree_p): New function.
(wi::unextended_tree): New class.
(wi::int_traits <unextended_tree>): New override.
(wi::extended_tree): Add a default constructor.
(wi::extended_tree::get_tree): New function.
(wi::widest_extended_tree, wi::offset_extended_tree): New typedefs.
(wi::tree_to_widest_ref, wi::tree_to_offset_ref): Use them.
(wi::tree_to_poly_widest_ref, wi::tree_to_poly_offset_ref)
(wi::tree_to_poly_wide_ref): New typedefs.
(wi::ints_for): Provide overloads for extended_tree and
unextended_tree.
(poly_int_cst_value, wi::to_poly_widest, wi::to_poly_offset)
(wi::to_wide): New functions.
(wi::fits_to_boolean_p, wi::fits_to_tree_p): Handle poly_ints.
* tree.c (poly_int_cst_hasher): New struct.
(poly_int_cst_hash_table): New variable.
(tree_node_structure_for_code, tree_code_size, simple_cst_equal)
(valid_constant_size_p, add_expr, drop_tree_overflow): Handle
POLY_INT_CST.
(initialize_tree_contains_struct): Handle TS_POLY_INT_CST.
(init_ttree): Initialize poly_int_cst_hash_table.
(build_int_cst, build_int_cst_type, build_invariant_address): Take
a poly_int64 instead of a HOST_WIDE_INT.
(build_int_cstu, build_array_type_nelts): Take a poly_uint64
instead of an unsigned HOST_WIDE_INT.
(wide_int_to_tree): Rename to...
(wide_int_to_tree_1): ...this.
(build_new_poly_int_cst, build_poly_int_cst): New functions.
(force_fit_type): Take a poly_wide_int_ref instead of a wide_int_ref.
(wide_int_to_tree): New function that takes a poly_wide_int_ref.
(ptrdiff_tree_p, tree_to_poly_int64, tree_to_poly_uint64)
(tree_fits_poly_int64_p, tree_fits_poly_uint64_p): New functions.
* lto-streamer-out.c (DFS::DFS_write_tree_body, hash_tree): Handle
TS_POLY_INT_CST.
* tree-streamer-in.c (lto_input_ts_poly_tree_pointers): Likewise.
(streamer_read_tree_body): Likewise.
* tree-streamer-out.c (write_ts_poly_tree_pointers): Likewise.
(streamer_write_tree_body): Likewise.
* tree-streamer.c (streamer_check_handled_ts_structures): Likewise.
* asan.c (asan_protect_global): Require the size to be an INTEGER_CST.
* cfgexpand.c (expand_debug_expr): Handle POLY_INT_CST.
* expr.c (expand_expr_real_1, const_vector_from_tree): Likewise.
* gimple-expr.h (is_gimple_constant): Likewise.
* gimplify.c (maybe_with_size_expr): Likewise.
* print-tree.c (print_node): Likewise.
* tree-data-ref.c (data_ref_compare_tree): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Likewise.
* tree-vect-data-refs.c (dr_group_sort_cmp): Likewise.
* tree-vrp.c (compare_values_warnv): Likewise.
* tree-ssa-loop-ivopts.c (determine_base_object, constant_multiple_of)
(get_loop_invariant_expr, add_candidate_1, get_computation_aff_1)
(force_expr_to_var_cost): Likewise.
* tree-ssa-loop.c (for_each_index): Likewise.
* fold-const.h (build_invariant_address, size_int_kind): Take a
poly_int64 instead of a HOST_WIDE_INT.
* fold-const.c (fold_negate_expr_1, const_binop, const_unop)
(fold_convert_const, multiple_of_p, fold_negate_const): Handle
POLY_INT_CST.
(size_binop_loc): Likewise. Allow int_const_binop_1 to fail.
(int_const_binop_2): New function, split out from...
(int_const_binop_1): ...here. Handle POLY_INT_CST.
(size_int_kind): Take a poly_int64 instead of a HOST_WIDE_INT.
* expmed.c (make_tree): Handle CONST_POLY_INT_P.
* gimple-ssa-strength-reduction.c (slsr_process_add)
(slsr_process_mul): Check for INTEGER_CSTs before using them
as candidates.
* stor-layout.c (bits_from_bytes): New function.
(bit_from_pos): Use it.
(layout_type): Likewise. For vectors, multiply the TYPE_SIZE_UNIT
by BITS_PER_UNIT to get the TYPE_SIZE.
* tree-cfg.c (verify_expr, verify_types_in_gimple_reference): Allow
MEM_REF and TARGET_MEM_REF offsets to be a POLY_INT_CST.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/rtl.texi (const_poly_int): Document. Also document the
rtl sharing behavior.
* gengenrtl.c (excluded_rtx): Return true for CONST_POLY_INT.
* rtl.h (const_poly_int_def): New struct.
(rtx_def::u): Add a cpi field.
(CASE_CONST_UNIQUE, CASE_CONST_ANY): Add CONST_POLY_INT.
(CONST_POLY_INT_P, CONST_POLY_INT_COEFFS): New macros.
(wi::rtx_to_poly_wide_ref): New typedef
(const_poly_int_value, wi::to_poly_wide, rtx_to_poly_int64)
(poly_int_rtx_p): New functions.
(trunc_int_for_mode): Declare a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Take a poly_wide_int_ref rather than
a wide_int_ref.
(strip_offset): Declare.
(strip_offset_and_add): New function.
* rtl.def (CONST_POLY_INT): New rtx code.
* rtl.c (rtx_size): Handle CONST_POLY_INT.
(shared_const_p): Use poly_int_rtx_p.
* emit-rtl.h (gen_int_mode): Take a poly_int64 instead of a
HOST_WIDE_INT.
(gen_int_shift_amount): Likewise.
* emit-rtl.c (const_poly_int_hasher): New class.
(const_poly_int_htab): New variable.
(init_emit_once): Initialize it when NUM_POLY_INT_COEFFS > 1.
(const_poly_int_hasher::hash): New function.
(const_poly_int_hasher::equal): Likewise.
(gen_int_mode): Take a poly_int64 instead of a HOST_WIDE_INT.
(immed_wide_int_const): Rename to...
(immed_wide_int_const_1): ...this and make static.
(immed_wide_int_const): New function, taking a poly_wide_int_ref
instead of a wide_int_ref.
(gen_int_shift_amount): Take a poly_int64 instead of a HOST_WIDE_INT.
(gen_lowpart_common): Handle CONST_POLY_INT.
* cse.c (hash_rtx_cb, equiv_constant): Likewise.
* cselib.c (cselib_hash_rtx): Likewise.
* dwarf2out.c (const_ok_for_output_1): Likewise.
* expr.c (convert_modes): Likewise.
* print-rtl.c (rtx_writer::print_rtx, print_value): Likewise.
* rtlhash.c (add_rtx): Likewise.
* explow.c (trunc_int_for_mode): Add a poly_int64 version.
(plus_constant): Take a poly_int64 instead of a HOST_WIDE_INT.
Handle existing CONST_POLY_INT rtxes.
* expmed.h (expand_shift): Take a poly_int64 instead of a
HOST_WIDE_INT.
* expmed.c (expand_shift): Likewise.
* rtlanal.c (strip_offset): New function.
(commutative_operand_precedence): Give CONST_POLY_INT the same
precedence as CONST_DOUBLE and put CONST_WIDE_INT between that
and CONST_INT.
* rtl-tests.c (const_poly_int_tests): New struct.
(rtl_tests_c_tests): Use it.
* simplify-rtx.c (simplify_const_unary_operation): Handle
CONST_POLY_INT.
(simplify_const_binary_operation): Likewise.
(simplify_binary_operation_1): Fold additions of symbolic constants
and CONST_POLY_INTs.
(simplify_subreg): Handle extensions and truncations of
CONST_POLY_INTs.
(simplify_const_poly_int_tests): New struct.
(simplify_rtx_c_tests): Use it.
* wide-int.h (storage_ref): Add default constructor.
(wide_int_ref_storage): Likewise.
(trailing_wide_ints): Use GTY((user)).
(trailing_wide_ints::operator[]): Add a const version.
(trailing_wide_ints::get_precision): New function.
(trailing_wide_ints::extra_size): Likewise.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* emit-rtl.h (gen_int_shift_amount): Declare.
* emit-rtl.c (gen_int_shift_amount): New function.
* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
instead of GEN_INT.
* calls.c (shift_return_value): Likewise.
* cse.c (fold_rtx): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
(expand_shift, expand_smod_pow2): Likewise.
* lower-subreg.c (shift_cost): Likewise.
* optabs.c (expand_superword_shift, expand_doubleword_mult)
(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
(expand_vec_perm_var): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
* combine.c (try_combine, find_split_point, force_int_to_mode)
(simplify_shift_const_1, simplify_shift_const): Likewise.
(change_zero_ext): Likewise. Use simplify_gen_binary.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
* poly-int.h (multiple_p): Fix handling of two non-poly_ints.
2017-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* doc/invoke.texi (ARM Options): Document accepted extension options
for -march=armv8.3-a.
2017-12-20 Richard Earnshaw <rearnsha@arm.com>
PR target/83105
* config.gcc (arm*-*-linux*): When configured with --with-float=hard
or --with-float=softfp, set the default CPU to arm10e.
2017-12-20 Eric Botcazou <ebotcazou@adacore.com>
* config/visium/constraints.md (J, K, L): Use IN_RANGE macro.
* config/visium/predicates.md (const_shift_operand): Likewise.
* config/visium/visium.c (visium_legitimize_address): Fix oversight.
(visium_legitimize_reload_address): Likewise.
2017-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/82975
* config/arm/arm.h (TEST_REGNO): Adjust comment as expected in r255830.
2017-12-20 Jakub Jelinek <jakub@redhat.com>
PR c++/83490
* calls.c (compute_argument_addresses): Ignore TYPE_EMPTY_P arguments.
2017-12-20 Julia Koval <julia.koval@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_VPCLMULQDQ_SET,
OPTION_MASK_ISA_VPCLMULQDQ_UNSET): New.
(ix86_handle_option): Handle -mvpclmulqdq, move cx6 to flags2.
* config.gcc: Include vpclmulqdqintrin.h.
* config/i386/cpuid.h: Handle bit_VPCLMULQDQ.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle
-mvpclmulqdq.
* config/i386/i386-builtin.def (__builtin_ia32_vpclmulqdq_v2di,
__builtin_ia32_vpclmulqdq_v4di, __builtin_ia32_vpclmulqdq_v8di): New.
* config/i386/i386-c.c (__VPCLMULQDQ__): New.
* config/i386/i386.c (isa2_opts): Add -mcx16.
(isa_opts): Add -mpclmulqdq, remove -mcx16.
(ix86_option_override_internal): Move mcx16 to flags2.
(ix86_valid_target_attribute_inner_p): Add vpclmulqdq.
(ix86_expand_builtin): Handle OPTION_MASK_ISA_VPCLMULQDQ.
* config/i386/i386.h (TARGET_VPCLMULQDQ, TARGET_VPCLMULQDQ_P): New.
* config/i386/i386.opt: Add mvpclmulqdq, move mcx16 to flags2.
* config/i386/immintrin.h: Include vpclmulqdqintrin.h.
* config/i386/sse.md (vpclmulqdq_<mode>): New pattern.
* config/i386/vpclmulqdqintrin.h (_mm512_clmulepi64_epi128,
_mm_clmulepi64_epi128, _mm256_clmulepi64_epi128): New intrinsics.
* doc/invoke.texi: Add -mvpclmulqdq.
2017-12-20 Tom de Vries <tom@codesourcery.com>
PR middle-end/83423
* config/i386/i386.c (ix86_static_chain): Move
DECL_STATIC_CHAIN test ...
* calls.c (rtx_for_static_chain): ... here. New function.
* calls.h (rtx_for_static_chain): Declare.
* builtins.c (expand_builtin_setjmp_receiver): Use rtx_for_static_chain
instead of targetm.calls.static_chain.
* df-scan.c (df_get_entry_block_def_set): Same.
2017-12-19 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/83493
* graphite-isl-ast-to-gimple.c (translate_isl_ast_node_for): Unshare ub
and lb.
2017-12-19 Jakub Jelinek <jakub@redhat.com>
* gimple-ssa-sprintf.c (format_directive): Use inform_n instead of
inform with hardcoded english plural handling.
2017-12-18 Jeff Law <law@redhat.com>
PR tree-optimization/83477
* tree-ssa-threadedge.c (record_temporary_equivalences_from_phis): For
a non-virtual PHI, always push a new range.
2017-12-19 Martin Sebor <msebor@redhat.com>
PR middle-end/77608
* builtins.c (compute_objsize): Handle non-constant offsets.
2017-12-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83444
* tree-ssa-strlen.c (strlen_check_and_optimize_stmt): For the
character load case, if get_stridx on MEM_REF's operand doesn't
look usable, retry with get_addr_stridx.
2017-12-19 Alexandre Oliva <aoliva@redhat.com>
PR debug/83422
* var-tracking.c (vt_debug_insns_local): Do not drop markers.
(variable_tracking_main_1): Keep markers even when VTA fails.
PR bootstrap/83396
* cfgexpand.c (expand_gimple_basic_block): Expand label first,
even if there are markers before it.
* cfgrtl.c (rtl_verify_bb_layout): Reject DEBUG_INSNs outside BBs.
2017-12-19 Jakub Jelinek <jakub@redhat.com>
* read-rtl.c (parse_reg_note_name): Replace Yoda conditions with
typical order conditions.
* sel-sched.c (extract_new_fences_from): Likewise.
* config/visium/constraints.md (J, K, L): Likewise.
* config/visium/predicates.md (const_shift_operand): Likewise.
* config/visium/visium.c (visium_legitimize_address,
visium_legitimize_reload_address): Likewise.
* config/m68k/m68k.c (output_reg_adjust, emit_reg_adjust): Likewise.
* config/arm/arm.c (arm_block_move_unaligned_straight): Likewise.
* config/avr/constraints.md (Y01, Ym1, Y02, Ym2): Likewise.
* config/avr/avr-log.c (avr_vdump, avr_log_set_avr_log,
SET_DUMP_DETAIL): Likewise.
* config/avr/predicates.md (const_8_16_24_operand): Likewise.
* config/avr/avr.c (STR_PREFIX_P, avr_popcount_each_byte,
avr_is_casesi_sequence, avr_casei_sequence_check_operands,
avr_set_core_architecture, avr_set_current_function,
avr_legitimize_reload_address, avr_asm_len, avr_print_operand,
output_movqi, output_movsisf, avr_out_plus, avr_out_bitop,
avr_out_fract, avr_adjust_insn_length, avr_encode_section_info,
avr_2word_insn_p, output_reload_in_const, avr_has_nibble_0xf,
avr_map_decompose, avr_fold_builtin): Likewise.
* config/avr/driver-avr.c (avr_devicespecs_file): Likewise.
* config/avr/gen-avr-mmcu-specs.c (str_prefix_p, print_mcu): Likewise.
* config/i386/i386.c (ix86_parse_stringop_strategy_string): Likewise.
* config/m32c/m32c-pragma.c (m32c_pragma_memregs): Likewise.
* config/m32c/m32c.c (m32c_conditional_register_usage,
m32c_address_cost): Likewise.
* config/m32c/predicates.md (shiftcount_operand,
longshiftcount_operand): Likewise.
* config/iq2000/iq2000.c (iq2000_expand_prologue): Likewise.
* config/nios2/nios2.c (nios2_handle_custom_fpu_insn_option,
can_use_cdx_ldstw): Likewise.
* config/nios2/nios2.h (CDX_REG_P): Likewise.
* config/cr16/cr16.h (RETURN_ADDR_RTX, REGNO_MODE_OK_FOR_BASE_P):
Likewise.
* config/cr16/cr16.md (*mov<mode>_double): Likewise.
* config/cr16/cr16.c (cr16_create_dwarf_for_multi_push): Likewise.
* config/h8300/h8300.c (h8300_rtx_costs, get_shift_alg): Likewise.
* config/vax/constraints.md (U06, U08, U16, CN6, S08, S16): Likewise.
* config/vax/vax.c (adjacent_operands_p): Likewise.
* config/ft32/constraints.md (L, b, KA): Likewise.
* config/ft32/ft32.c (ft32_load_immediate, ft32_expand_prologue):
Likewise.
* cfgexpand.c (expand_stack_alignment): Likewise.
* gcse.c (insert_expr_in_table): Likewise.
* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Likewise.
* cgraphunit.c (cgraph_node::expand): Likewise.
* ira-build.c (setup_min_max_allocno_live_range_point): Likewise.
* emit-rtl.c (add_insn): Likewise.
* input.c (dump_location_info): Likewise.
* passes.c (NEXT_PASS): Likewise.
* read-rtl-function.c (parse_note_insn_name,
function_reader::read_rtx_operand_r, function_reader::parse_mem_expr):
Likewise.
* sched-rgn.c (sched_rgn_init): Likewise.
* diagnostic-show-locus.c (layout::show_ruler): Likewise.
* combine.c (find_split_point, simplify_if_then_else, force_to_mode,
if_then_else_cond, simplify_shift_const_1, simplify_comparison):
Likewise.
* explow.c (eliminate_constant_term): Likewise.
* final.c (leaf_renumber_regs_insn): Likewise.
* cfgrtl.c (print_rtl_with_bb): Likewise.
* genhooks.c (emit_init_macros): Likewise.
* poly-int.h (maybe_ne, maybe_le, maybe_lt): Likewise.
* tree-data-ref.c (conflict_fn): Likewise.
* selftest.c (assert_streq): Likewise.
* expr.c (store_constructor_field, expand_expr_real_1): Likewise.
* fold-const.c (fold_range_test, extract_muldiv_1, fold_truth_andor,
fold_binary_loc, multiple_of_p): Likewise.
* reload.c (push_reload, find_equiv_reg): Likewise.
* et-forest.c (et_nca, et_below): Likewise.
* dbxout.c (dbxout_symbol_location): Likewise.
* reorg.c (relax_delay_slots): Likewise.
* dojump.c (do_compare_rtx_and_jump): Likewise.
* gengtype-parse.c (type): Likewise.
* simplify-rtx.c (simplify_gen_ternary, simplify_gen_relational,
simplify_const_relational_operation): Likewise.
* reload1.c (do_output_reload): Likewise.
* dumpfile.c (get_dump_file_info_by_switch): Likewise.
* gengtype.c (type_for_name): Likewise.
* gimple-ssa-sprintf.c (format_directive): Likewise.
2017-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/82975
* config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before
accessing it. Adjust comment.
2017-12-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/81914
* predict.c (zero_one_minusone): New function.
(apply_return_prediction): Avoid return prediction for functions
returning only -1, 0 and 1 values, unless they only return -1 and 0
or 0 and 1.
2017-12-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (legitimate_scaled_address_p): Clean
fall-through warning.
(arc_compute_frame_size): Remove unused variables.
(arc_print_operand): Fix fprintif format.
(arc_can_follow_jump): Clean fall-through warning.
2017-12-19 Marek Polacek <polacek@redhat.com>
PR c++/83489
* config/i386/i386.c (init_cumulative_args): Don't check TYPE_EMPTY_P
on an error node.
2017-12-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (overriderregs): New variable.
(arc_override_options): Track fixed/call saved/call options.
(arc_conditional_register_usage): Check against overrideregs
variable whenever we change register properties.
2017-12-19 Nathan Sidwell <nathan@acm.org>
* opts.c (finish_options): Don't prefix dump_base_name if it
already contains directories.
2017-12-19 Martin Liska <mliska@suse.cz>
PR rtl-optimization/82675
* loop-unroll.c (unroll_loop_constant_iterations): Allocate one
more element in sbitmap.
2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
* gimplify.c (gimplify_expr): Use error_operand_p.
2017-12-19 Sebastian Huber <sebastian.huber@embedded-brains.de>
PR target/83387
* config/rs6000/t-rtems (MULTILIB_REQUIRED): Remove 64-bit soft-float
multilib.
2017-12-19 Daniel Cederman <cederman@gaisler.com>
* config/sparc/sparc.c (sparc_do_work_around_errata): Make sure
the jump is to a label.
2017-12-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83444
* tree-ssa-strlen.c (strlen_check_and_optimize_stmt): Optimize
character loads.
PR ipa/82801
PR ipa/83346
* ipa-inline.c (flatten_remove_node_hook): New function.
(ipa_inline): Keep only nodes with flatten attribute at the end of
the array in the order from ipa_reverse_postorder, only walk that
portion of array for flattening, if there is more than one such
node, temporarily register a removal hook and ignore removed nodes.
PR tree-optimization/80631
* tree-vect-loop.c (vect_create_epilog_for_reduction): Compare
induc_code against MAX_EXPR or MIN_EXPR instead of reduc_fn against
IFN_REDUC_MAX or IFN_REDUC_MIN.
2017-12-18 Jeff Law <law@redhat.com>
* tree-ssa-dom.c (record_equivalences_from_phis): Do not
record symbolic equivalences from backedges in the CFG.
Revert
2017-11-19 Jeff Law <law@redhat.com>
* tree-ssa-dom.c (record_equivalences_from_phis): Fix handling
of degenerates resulting from ignoring an edge.
2017-12-18 Martin Sebor <msebor@redhat.com>
PR middle-end/83373
PR tree-optimization/78450
* tree-ssa-strlen.c (maybe_set_strlen_range): New function.
(handle_builtin_strlen): Call it.
2017-12-18 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/83424
* rtlanal.c (dead_or_set_regno_p): Handle CLOBBER just like SET.
2017-12-18 Marek Polacek <polacek@redhat.com>
PR middle-end/83463
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref):
Check if TYPE is INTEGRAL_TYPE_P before accessing its min/max
values.
2017-12-18 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (maddsidi4, maddsidi4_split): Update pattern.
(umaddsidi4, umaddsidi_split): Likewise.
2017-12-18 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_legitimate_constant_p): Always check all
constants.
2017-12-18 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/83420
* config/s390/s390.c (s390_option_override): Avoid strncpy.
2017-12-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/81877
* tree-ssa-loop-im.c (ref_indep_loop_p): Remove safelen parameters.
(outermost_indep_loop): Adjust.
(ref_indep_loop_p_1): Likewise. Remove safelen handling again.
(can_sm_ref_p): Adjust.
2017-12-18 Richard Biener <rguenther@suse.de>
PR middle-end/77291
* tree.c (array_at_struct_end_p): Return true if the underlying
object has space for at least one element in excess of what
the array domain specifies.
2017-12-17 Sandra Loosemore <sandra@codesourcery.com>
* doc/extend.texi (x86 Function Attributes): Reformat nocf_check
example to avoid overfull hbox.
* doc/invoke.texi (Option Summary): Add missing @gol.
(C++ Dialect Options): Reformat -Wnoexcept-type example to avoid
overfull hbox.
2017-12-17 Sandra Loosemore <sandra@codesourcery.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* doc/invoke.texi (Option Summary): Add -mverbose-cost-dump
to AArch64 and ARM lists, plus missing -mflip-thumb for ARM.
(AArch64 Options): Document -mverbose-cost-dump.
(ARM Options): Likewise, plus -mflip-thumb.
2017-12-17 Martin Sebor <msebor@redhat.com>
PR bootstrap/83446
* gimple-ssa-warn-restrict.c
(builtin_memref::offset_out_of_bounds): Correct the handling of
anti-ranges.
2017-12-17 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi (ARC Options): Add missing -mlra entry.
2017-12-17 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.c (pa_som_asm_init_sections): Fix comment.
2017-12-17 Markus Trippelsdorf <markus@trippelsdorf.de>
* x86-tune-costs.h (skylake_cost, core_cost): Decrease r64 multiply
latencies.
2017-12-16 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi: Fix some typos.
2017-12-16 Martin Sebor <msebor@redhat.com>
PR tree-optimization/78918
* Makefile.in (OBJS): Add gimple-ssa-warn-restrict.o.
* builtins.c (check_sizes): Rename...
(check_access): ...to this. Rename function arguments for clarity.
(check_memop_sizes): Adjust names.
(expand_builtin_memchr, expand_builtin_memcpy): Same.
(expand_builtin_memmove, expand_builtin_mempcpy): Same.
(expand_builtin_strcat, expand_builtin_stpncpy): Same.
(check_strncat_sizes, expand_builtin_strncat): Same.
(expand_builtin_strncpy, expand_builtin_memset): Same.
(expand_builtin_bzero, expand_builtin_memcmp): Same.
(expand_builtin_memory_chk, maybe_emit_chk_warning): Same.
(maybe_emit_sprintf_chk_warning): Same.
(expand_builtin_strcpy): Adjust.
(expand_builtin_stpcpy): Same.
(expand_builtin_with_bounds): Detect out-of-bounds accesses
in pointer-checking forms of memcpy, memmove, and mempcpy.
(gcall_to_tree_minimal, max_object_size): Define new functions.
* builtins.h (max_object_size): Declare.
* calls.c (alloc_max_size): Call max_object_size instead of
hardcoding ssizetype limit.
(get_size_range): Handle new argument.
* calls.h (get_size_range): Add a new argument.
* cfgexpand.c (expand_call_stmt): Propagate no-warning bit.
* doc/invoke.texi (-Wrestrict): Adjust, add example.
* gimple-fold.c (gimple_fold_builtin_memory_op): Detect overlapping
operations.
(gimple_fold_builtin_memory_chk): Same.
(gimple_fold_builtin_stxcpy_chk): New function.
* gimple-ssa-warn-restrict.c: New source.
* gimple-ssa-warn-restrict.h: New header.
* gimple.c (gimple_build_call_from_tree): Propagate location.
* passes.def (pass_warn_restrict): Add new pass.
* tree-pass.h (make_pass_warn_restrict): Declare.
* tree-ssa-strlen.c (handle_builtin_strcpy): Detect overlapping
operations.
(handle_builtin_strcat): Same.
(strlen_optimize_stmt): Rename...
(strlen_check_and_optimize_stmt): ...to this. Handle strncat,
stpncpy, strncpy, and their checking forms.
2017-12-16 Jan Hubicka <hubicka@ucw.cz>
PR rtl-optimization/82849
* modulo-sched.c (sms_schedule): Use get_estimated_loop_iterations_int
and get_max_loop_iterations_int.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* machmode.h (mode_for_size, int_mode_for_size, float_mode_for_size)
(smallest_mode_for_size, smallest_int_mode_for_size): Take the mode
size as a poly_uint64.
(mode_for_vector, mode_for_int_vector): Take the number of vector
elements as a poly_uint64.
* stor-layout.c (mode_for_size, smallest_mode_for_size): Take the mode
size as a poly_uint64.
(mode_for_vector, mode_for_int_vector): Take the number of vector
elements as a poly_uint64.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* machmode.h (MACRO_MODE): New macro.
* addresses.h (base_reg_class, ok_for_base_p_1): Use it.
* targhooks.c (default_libcall_value, default_secondary_reload)
(default_memory_move_cost, default_register_move_cost)
(default_class_max_nregs): Likewise.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/sourcebuild.texi: Document IN_TARGET_CODE.
* genattrtab.c (write_header): Define IN_TARGET_CODE to 1 in the
target C file.
* genautomata.c (main): Likewise.
* genconditions.c (write_header): Likewise.
* genemit.c (main): Likewise.
* genextract.c (print_header): Likewise.
* genopinit.c (main): Likewise.
* genoutput.c (output_prologue): Likewise.
* genpeep.c (main): Likewise.
* genpreds.c (write_insn_preds_c): Likewise.
* genrecog.c (writer_header): Likewise.
* config/aarch64/aarch64-builtins.c (IN_TARGET_CODE): Define.
* config/aarch64/aarch64-c.c (IN_TARGET_CODE): Likewise.
* config/aarch64/aarch64.c (IN_TARGET_CODE): Likewise.
* config/aarch64/cortex-a57-fma-steering.c (IN_TARGET_CODE): Likewise.
* config/aarch64/driver-aarch64.c (IN_TARGET_CODE): Likewise.
* config/alpha/alpha.c (IN_TARGET_CODE): Likewise.
* config/alpha/driver-alpha.c (IN_TARGET_CODE): Likewise.
* config/arc/arc-c.c (IN_TARGET_CODE): Likewise.
* config/arc/arc.c (IN_TARGET_CODE): Likewise.
* config/arc/driver-arc.c (IN_TARGET_CODE): Likewise.
* config/arm/aarch-common.c (IN_TARGET_CODE): Likewise.
* config/arm/arm-builtins.c (IN_TARGET_CODE): Likewise.
* config/arm/arm-c.c (IN_TARGET_CODE): Likewise.
* config/arm/arm.c (IN_TARGET_CODE): Likewise.
* config/arm/driver-arm.c (IN_TARGET_CODE): Likewise.
* config/avr/avr-c.c (IN_TARGET_CODE): Likewise.
* config/avr/avr-devices.c (IN_TARGET_CODE): Likewise.
* config/avr/avr-log.c (IN_TARGET_CODE): Likewise.
* config/avr/avr.c (IN_TARGET_CODE): Likewise.
* config/avr/driver-avr.c (IN_TARGET_CODE): Likewise.
* config/avr/gen-avr-mmcu-specs.c (IN_TARGET_CODE): Likewise.
* config/bfin/bfin.c (IN_TARGET_CODE): Likewise.
* config/c6x/c6x.c (IN_TARGET_CODE): Likewise.
* config/cr16/cr16.c (IN_TARGET_CODE): Likewise.
* config/cris/cris.c (IN_TARGET_CODE): Likewise.
* config/darwin.c (IN_TARGET_CODE): Likewise.
* config/epiphany/epiphany.c (IN_TARGET_CODE): Likewise.
* config/epiphany/mode-switch-use.c (IN_TARGET_CODE): Likewise.
* config/epiphany/resolve-sw-modes.c (IN_TARGET_CODE): Likewise.
* config/fr30/fr30.c (IN_TARGET_CODE): Likewise.
* config/frv/frv.c (IN_TARGET_CODE): Likewise.
* config/ft32/ft32.c (IN_TARGET_CODE): Likewise.
* config/h8300/h8300.c (IN_TARGET_CODE): Likewise.
* config/i386/djgpp.c (IN_TARGET_CODE): Likewise.
* config/i386/driver-i386.c (IN_TARGET_CODE): Likewise.
* config/i386/driver-mingw32.c (IN_TARGET_CODE): Likewise.
* config/i386/host-cygwin.c (IN_TARGET_CODE): Likewise.
* config/i386/host-i386-darwin.c (IN_TARGET_CODE): Likewise.
* config/i386/host-mingw32.c (IN_TARGET_CODE): Likewise.
* config/i386/i386-c.c (IN_TARGET_CODE): Likewise.
* config/i386/i386.c (IN_TARGET_CODE): Likewise.
* config/i386/intelmic-mkoffload.c (IN_TARGET_CODE): Likewise.
* config/i386/msformat-c.c (IN_TARGET_CODE): Likewise.
* config/i386/winnt-cxx.c (IN_TARGET_CODE): Likewise.
* config/i386/winnt-stubs.c (IN_TARGET_CODE): Likewise.
* config/i386/winnt.c (IN_TARGET_CODE): Likewise.
* config/i386/x86-tune-sched-atom.c (IN_TARGET_CODE): Likewise.
* config/i386/x86-tune-sched-bd.c (IN_TARGET_CODE): Likewise.
* config/i386/x86-tune-sched-core.c (IN_TARGET_CODE): Likewise.
* config/i386/x86-tune-sched.c (IN_TARGET_CODE): Likewise.
* config/ia64/ia64-c.c (IN_TARGET_CODE): Likewise.
* config/ia64/ia64.c (IN_TARGET_CODE): Likewise.
* config/iq2000/iq2000.c (IN_TARGET_CODE): Likewise.
* config/lm32/lm32.c (IN_TARGET_CODE): Likewise.
* config/m32c/m32c-pragma.c (IN_TARGET_CODE): Likewise.
* config/m32c/m32c.c (IN_TARGET_CODE): Likewise.
* config/m32r/m32r.c (IN_TARGET_CODE): Likewise.
* config/m68k/m68k.c (IN_TARGET_CODE): Likewise.
* config/mcore/mcore.c (IN_TARGET_CODE): Likewise.
* config/microblaze/microblaze-c.c (IN_TARGET_CODE): Likewise.
* config/microblaze/microblaze.c (IN_TARGET_CODE): Likewise.
* config/mips/driver-native.c (IN_TARGET_CODE): Likewise.
* config/mips/frame-header-opt.c (IN_TARGET_CODE): Likewise.
* config/mips/mips.c (IN_TARGET_CODE): Likewise.
* config/mmix/mmix.c (IN_TARGET_CODE): Likewise.
* config/mn10300/mn10300.c (IN_TARGET_CODE): Likewise.
* config/moxie/moxie.c (IN_TARGET_CODE): Likewise.
* config/msp430/driver-msp430.c (IN_TARGET_CODE): Likewise.
* config/msp430/msp430-c.c (IN_TARGET_CODE): Likewise.
* config/msp430/msp430.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-cost.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-fp-as-gp.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-intrinsic.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-isr.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-md-auxiliary.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-memory-manipulation.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-pipelines-auxiliary.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32-predicates.c (IN_TARGET_CODE): Likewise.
* config/nds32/nds32.c (IN_TARGET_CODE): Likewise.
* config/nios2/nios2.c (IN_TARGET_CODE): Likewise.
* config/nvptx/mkoffload.c (IN_TARGET_CODE): Likewise.
* config/nvptx/nvptx.c (IN_TARGET_CODE): Likewise.
* config/pa/pa.c (IN_TARGET_CODE): Likewise.
* config/pdp11/pdp11.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/driver-powerpcspe.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/host-darwin.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/host-ppc64-darwin.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/powerpcspe-c.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/powerpcspe-linux.c (IN_TARGET_CODE): Likewise.
* config/powerpcspe/powerpcspe.c (IN_TARGET_CODE): Likewise.
* config/riscv/riscv-builtins.c (IN_TARGET_CODE): Likewise.
* config/riscv/riscv-c.c (IN_TARGET_CODE): Likewise.
* config/riscv/riscv.c (IN_TARGET_CODE): Likewise.
* config/rl78/rl78-c.c (IN_TARGET_CODE): Likewise.
* config/rl78/rl78.c (IN_TARGET_CODE): Likewise.
* config/rs6000/driver-rs6000.c (IN_TARGET_CODE): Likewise.
* config/rs6000/host-darwin.c (IN_TARGET_CODE): Likewise.
* config/rs6000/host-ppc64-darwin.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000-c.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000-linux.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000-p8swap.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000-string.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000.c (IN_TARGET_CODE): Likewise.
* config/rx/rx.c (IN_TARGET_CODE): Likewise.
* config/s390/driver-native.c (IN_TARGET_CODE): Likewise.
* config/s390/s390-c.c (IN_TARGET_CODE): Likewise.
* config/s390/s390.c (IN_TARGET_CODE): Likewise.
* config/sh/sh-c.c (IN_TARGET_CODE): Likewise.
* config/sh/sh-mem.cc (IN_TARGET_CODE): Likewise.
* config/sh/sh.c (IN_TARGET_CODE): Likewise.
* config/sh/sh_optimize_sett_clrt.cc (IN_TARGET_CODE): Likewise.
* config/sh/sh_treg_combine.cc (IN_TARGET_CODE): Likewise.
* config/sparc/driver-sparc.c (IN_TARGET_CODE): Likewise.
* config/sparc/sparc-c.c (IN_TARGET_CODE): Likewise.
* config/sparc/sparc.c (IN_TARGET_CODE): Likewise.
* config/spu/spu-c.c (IN_TARGET_CODE): Likewise.
* config/spu/spu.c (IN_TARGET_CODE): Likewise.
* config/stormy16/stormy16.c (IN_TARGET_CODE): Likewise.
* config/tilegx/mul-tables.c (IN_TARGET_CODE): Likewise.
* config/tilegx/tilegx-c.c (IN_TARGET_CODE): Likewise.
* config/tilegx/tilegx.c (IN_TARGET_CODE): Likewise.
* config/tilepro/mul-tables.c (IN_TARGET_CODE): Likewise.
* config/tilepro/tilepro-c.c (IN_TARGET_CODE): Likewise.
* config/tilepro/tilepro.c (IN_TARGET_CODE): Likewise.
* config/v850/v850-c.c (IN_TARGET_CODE): Likewise.
* config/v850/v850.c (IN_TARGET_CODE): Likewise.
* config/vax/vax.c (IN_TARGET_CODE): Likewise.
* config/visium/visium.c (IN_TARGET_CODE): Likewise.
* config/vms/vms-c.c (IN_TARGET_CODE): Likewise.
* config/vms/vms-f.c (IN_TARGET_CODE): Likewise.
* config/vms/vms.c (IN_TARGET_CODE): Likewise.
* config/xtensa/xtensa.c (IN_TARGET_CODE): Likewise.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid repeated
checks for MEM_REF.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/generic.texi (VEC_SERIES_EXPR): Document.
* doc/md.texi (vec_series@var{m}): Document.
* tree.def (VEC_SERIES_EXPR): New tree code.
* tree.h (build_vec_series): Declare.
* tree.c (build_vec_series): New function.
* cfgexpand.c (expand_debug_expr): Handle VEC_SERIES_EXPR.
* tree-pretty-print.c (dump_generic_node): Likewise.
* gimple-pretty-print.c (dump_binary_rhs): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* optabs-tree.c (optab_for_tree_code): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
* fold-const.c (const_binop): Fold VEC_SERIES_EXPRs of constants.
* expmed.c (make_tree): Handle VEC_SERIES.
* optabs.def (vec_series_optab): New optab.
* optabs.h (expand_vec_series_expr): Declare.
* optabs.c (expand_vec_series_expr): New function.
* tree-vect-generic.c (expand_vector_operations_1): Check that
the operands also have vector type.
2017-12-16 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hawyard@arm.com>
David Sherwood <david.sherwood@arm.com>
* doc/generic.texi (VEC_DUPLICATE_EXPR): Document.
(VEC_COND_EXPR): Add missing @tindex.
* doc/md.texi (vec_duplicate@var{m}): Document.
* tree.def (VEC_DUPLICATE_EXPR): New tree codes.
* tree.c (build_vector_from_val): Add stubbed-out handling of
variable-length vectors, using VEC_DUPLICATE_EXPR.
(uniform_vector_p): Handle VEC_DUPLICATE_EXPR.
* cfgexpand.c (expand_debug_expr): Likewise.
* tree-cfg.c (verify_gimple_assign_unary): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-vect-generic.c (ssa_uniform_vector_p): Likewise.
* fold-const.c (const_unop): Fold VEC_DUPLICATE_EXPRs of a constant.
(test_vec_duplicate_folding): New function.
(fold_const_c_tests): Call it.
* optabs.def (vec_duplicate_optab): New optab.
* optabs-tree.c (optab_for_tree_code): Handle VEC_DUPLICATE_EXPR.
* optabs.h (expand_vector_broadcast): Declare.
* optabs.c (expand_vector_broadcast): Make non-static. Try using
vec_duplicate_optab.
* expr.c (store_constructor): Try using vec_duplicate_optab for
uniform vectors.
(expand_expr_real_2): Handle VEC_DUPLICATE_EXPR.
2017-12-15 Markus Trippelsdorf <markus@trippelsdorf.de>
PR target/83358
* config/i386/x86-tune-costs.h (skylake_cost, core_cost): Increase
div/mod latencies a bit.
2017-12-15 Jeff Law <law@redhat.com>
PR tree-optimization/36550
* tree-ssa-threadupdate.c (count_stmts_and_phis_in_block): New.
(mark_threaded_blocks): Rewrite code to avoid block copying when
optimizing for size. Don't pessimize blocks which will be
copied, but all the statements will be dead.
2017-12-15 Alexandre Oliva <aoliva@redhat.com>
PR tree-optimization/81165
* tree-ssa-threadupdate.c (uses_in_bb): New.
(estimate_threading_killed_stmts): New.
* tree-ssa-threadupdate.h (estimate_threading_killed_stmts): Prototype.
* tree-ssa-threadedge.c
(record_temporary_equivalences_from_stmts_at_dest): Expand limit
when its hit.
2017-12-15 Jeff Law <law@redhat.com>
PR tree-optimization/83410
* tree-ssa-threadupdate.c (thread_block_1): Avoid certain jump
threads when parallelizing loops.
2017-12-15 Jakub Jelinek <jakub@redhat.com>
* tree-core.h (struct attribute_spec): Swap affects_type_identity and
handler fields.
* config/alpha/alpha.c (vms_attribute_table): Swap
affects_type_identity and handler fields, adjust comments.
* config/mips/mips.c (mips_attribute_table): Likewise.
* config/visium/visium.c (visium_attribute_table): Likewise.
* config/epiphany/epiphany.c (epiphany_attribute_table): Likewise.
* config/microblaze/microblaze.c (microblaze_attribute_table):
Likewise.
* config/spu/spu.c (spu_attribute_table): Likewise.
* config/mcore/mcore.c (mcore_attribute_table): Likewise.
* config/arc/arc.c (arc_attribute_table): Likewise.
* config/m68k/m68k.c (m68k_attribute_table): Likewise.
* config/v850/v850.c (v850_handle_interrupt_attribute,
v850_handle_data_area_attribute): Formatting fixes.
(v850_attribute_table): Swap affects_type_identity and handler
fields, adjust comments.
* config/m32r/m32r.c (m32r_attribute_table): Likewise.
* config/arm/arm.c (arm_attribute_table): Likewise.
* config/avr/avr.c (avr_attribute_table): Likewise.
* config/s390/s390.c (s390_attribute_table): Likewise.
* config/sh/sh.c (sh_attribute_table): Likewise.
* config/i386/i386.c (ix86_handle_cconv_attribute,
ix86_handle_callee_pop_aggregate_return): Formatting fixes.
(ix86_attribute_table): Swap affects_type_identity and handler
fields, adjust comments.
* config/i386/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Likewise.
* config/sparc/sparc.c (sparc_attribute_table): Likewise.
* config/m32c/m32c.c (m32c_attribute_table): Likewise.
* config/sol2.h (SOLARIS_ATTRIBUTE_TABLE): Likewise.
* config/ia64/ia64.c (ia64_attribute_table): Likewise.
* config/msp430/msp430.c (msp430_attribute_table): Likewise.
* config/rx/rx.c (rx_attribute_table): Likewise.
* config/cr16/cr16.c (cr16_attribute_table): Likewise.
* config/h8300/h8300.c (h8300_attribute_table): Likewise.
* config/nvptx/nvptx.c (nvptx_attribute_table): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_attribute_table): Likewise.
* config/darwin.h (SUBTARGET_ATTRIBUTE_TABLE): Likewise.
* config/stormy16/stormy16.c (xstormy16_attribute_table): Likewise.
* config/bfin/bfin.c (bfin_attribute_table): Likewise.
* config/rs6000/rs6000.c (rs6000_attribute_table): Likewise.
* config/rl78/rl78.c (rl78_attribute_table): Likewise.
* config/nds32/nds32.c (nds32_attribute_table): Likewise.
* doc/plugins.texi (user_attr): Likewise. Add NULL for
exclude.
* attribs.c (empty_attribute_table): Swap affects_type_identity and
handler fields.
(register_scoped_attributes, decl_attributes): Formatting fixes.
PR tree-optimization/83269
* fold-const.c (fold_binary_loc): Perform (-A) - B -> (-B) - A
subtraction in arg0's type if type is signed and arg0 is unsigned.
Formatting fix.
PR sanitizer/81281
* match.pd ((T)(P + A) - (T)P -> (T) A): Use @@0 instead of @0 and
convert? on @0 instead of convert. Check type of @1, not @0.
((T)P - (T)(P + A) -> -(T) A): Use @@0 instead of @0 and
convert? on @0 instead of convert. Check type of @1, not @0.
((T)(P + A) - (T)(P + B) -> (T)A - (T)B): Use @@0 instead of @0,
only optimize if either both @1 and @2 types are narrower
precision, or both are wider or equal precision, and in the former
case only if both have undefined overflow.
2017-12-15 Richard Biener <rguenther@suse.de>
PR lto/83388
* internal-fn.def (IFN_NOP): Add.
* internal-fn.c (expand_NOP): Do nothing.
* lto-streamer-in.c (input_function): Instead of removing
sanitizer calls replace them with IFN_NOP calls.
2017-12-15 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* dse.c (store_info, read_info_type): Replace begin and end with
offset and width.
(print_range): New function.
(set_all_positions_unneeded, any_positions_needed_p)
(check_mem_read_rtx, scan_stores, scan_reads, dse_step5): Update
accordingly.
(record_store): Likewise. Optimize the case in which all positions
are unneeded.
(get_stored_val): Replace read_begin and read_end with read_offset
and read_width.
(replace_read): Update call accordingly.
2017-12-15 Bin Cheng <bin.cheng@arm.com>
* gimple-loop-interchange.cc (STMT_COST_RATIO): New macro.
(loop_cand::m_num_stmts, loop_cand::m_const_init_reduc): New members.
(loop_cand::loop_cand): Initialize above members.
(loop_cand::supported_operations): Delete.
(loop_cand::can_interchange_p): Inline above function.
(loop_cand::classify_simple_reduction): Record number of constant
initialized simple reductions.
(should_interchange_loops): New parameters. Check stmt cost of loops
to be interchange.
(tree_loop_interchange::interchange): Prepare stmt cost of outer loop.
Update call to should_interchange_loops.
(should_interchange_loop_nest): Update call to
should_interchange_loops.
2017-12-15 Eric Botcazou <ebotcazou@adacore.com>
PR target/66488
* ggc-page.c (HOST_BITS_PER_PTR): Do not define here...
* hwint.h (HOST_BITS_PER_PTR): ...but here instead.
* config/i386/xm-mingw32.h (HOST_BITS_PER_PTR): Delete.
2017-12-15 Julia Koval <julia.koval@intel.com>
* config/i386/i386-builtin.def (__builtin_ia32_vaesenclast_v16qi,
__builtin_ia32_vaesenclast_v32qi, __builtin_ia32_vaesenclast_v64qi):
New.
* config/i386/sse.md (vaesenclast_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesenclast_epi128,
_mm512_aesenclast_epi128, _mm_aesenclast_epi128): New intrinsics.
2017-12-15 Julia Koval <julia.koval@intel.com>
* config/i386/i386-builtin.def (__builtin_ia32_vaesenc_v16qi,
__builtin_ia32_vaesenc_v32qi, __builtin_ia32_vaesenc_v64qi): New.
* config/i386/sse.md (vaesenc_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesenc_epi128, _mm512_aesenc_epi128,
_mm_aesenc_epi128): New intrinsics.
2017-12-15 Julia Koval <julia.koval@intel.com>
* config/i386/i386-builtin.def (__builtin_ia32_vaesdeclast_v16qi,
__builtin_ia32_vaesdeclast_v32qi, __builtin_ia32_vaesdeclast_v64qi):
New.
* config/i386/sse.md (vaesdeclast_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesdeclast_epi128,
_mm512_aesdeclast_epi128, _mm_aesdeclast_epi128): New intrinsics.
2017-12-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gimple-ssa-strength-reduction.c (analyze_increments):
Distinguish replacement costs for constant strides from those for
unknown strides.
2017-12-14 Jakub Jelinek <jakub@redhat.com>
* var-tracking.c (variable_tracking_main_1): Formatting fix.
2017-12-14 Bernd Edlinger <bernd.edlinger@hotmail.de>
* doc/invoke.texi: Document -Wcast-function-type.
* recog.h (stored_funcptr): Change signature.
* tree-dump.c (dump_node): Avoid warning.
* typed-splay-tree.h (typed_splay_tree): Avoid warning.
2017-12-14 Qing Zhao <qing.zhao@oracle.com>
PR middle_end/79538
* gimple-fold.c (get_range_strlen): Add the handling of non-member
array.
2017-12-14 David Malcolm <dmalcolm@redhat.com>
PR tree-optimization/83312
* domwalk.h (dom_walker::dom_walker): Fix typo in comment.
* tree-cfg.c (find_taken_edge): Update to handle NULL_TREE for
"val" param, and to cope with arbitrary basic blocks.
(find_taken_edge_cond_expr): Add "cond_stmt" param and use it to
handle NULL_TREE for "val", dropping "bb" param.
(find_taken_edge_switch_expr): Make "switch_stmt" param const and
drop "bb" param. Handle NULL_TREE for "val".
(find_case_label_for_value): Make "switch_stmt" param const.
* tree-vrp.c (class check_array_bounds_dom_walker): New subclass
of dom_walker.
(vrp_prop::check_all_array_refs): Reimplement as...
(check_array_bounds_dom_walker::before_dom_children): ...this new
vfunc. Replace linear search through BB block list, excluding
those with non-executable in-edges via dominator walk.
2017-12-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.opt (mverbose-cost-dump): New option.
* config/arm/arm.c (arm_rtx_costs): Use it.
2017-12-14 Andreas Schwab <schwab@linux-m68k.org>
PR bootstrap/83396
* reload1.c (emit_input_reload_insns): Skip debug markers.
2017-12-14 Alexandre Oliva <aoliva@redhat.com>
* config/i386/i386.c (rest_of_insert_endbranch): Use call loc
for its nop_endbr.
PR bootstrap/83396
* config/arc/arc.c (hwloop_optimize): Skip debug insns.
* config/sh/sh-protos.h (sh_find_set_of_reg): Adjust.
* config/sh/sh.c: Skip debug insns besides notes.
* config/sh/sh.md: Likewise.
* config/sh/sh_treg_combine.cc: Likewise.
* config/sh/sync.md: Likewise.
2017-12-14 Tom de Vries <tom@codesourcery.com>
* doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
Add item for weak_undefined.
2017-12-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/67842
* sese.h (bb_in_region): Remove #if 0'ed code.
2017-12-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/83326
* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add
may_be_zero parameter and handle it by not marking the first
peeled copy as not exiting the loop.
(try_peel_loop): Likewise.
(canonicalize_loop_induction_variables): Use number_of_iterations_exit
to handle the case of constant or zero iterations and perform
loop header copying on-the-fly.
2017-12-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/83418
* vr-values.c (vr_values::extract_range_for_var_from_comparison_expr):
Instead of asserting we don't get unfolded comparisons deal with them.
2017-12-14 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/83396
* var-tracking.c (vt_initialize): Ignore non-DEBUG_INSNs outside of
basic blocks. Assert debug bind insns don't appear outside of bbs,
don't reset them. Assert insns without BLOCK_FOR_INSN are outside of
bb. Simplify.
PR tree-optimization/83198
* gimple-ssa-sprintf.c (format_floating): Set type solely based on
dir.modifier, regardless of TREE_TYPE (arg). Assume non-REAL_CST
value if arg is a REAL_CST with incompatible type.
2017-12-14 Sudakshina Das <sudi.das@arm.com>
Bin Cheng <bin.cheng@arm.com>
PR target/81228
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Move LTGT
to CCFPEmode.
* config/aarch64/aarch64-simd.md (vec_cmp<mode><v_int_equiv>): Add
LTGT.
2017-12-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-cores.def (cortex-a55, cortex-a75,
cortex-a75.cortex-a55): Specify AARCH64_FL_F16 in the arch features.
2017-12-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* poly-int.h: New file.
* poly-int-types.h: Likewise.
* coretypes.h: Include them.
(POLY_INT_CONVERSION): Define.
* target.def (estimated_poly_value): New hook.
* doc/tm.texi.in (TARGET_ESTIMATED_POLY_VALUE): New hook.
* doc/tm.texi: Regenerate.
* doc/poly-int.texi: New file.
* doc/gccint.texi: Include it.
* doc/rtl.texi: Describe restrictions on subreg modes.
* Makefile.in (TEXI_GCCINT_FILES): Add poly-int.texi.
* genmodes.c (NUM_POLY_INT_COEFFS): Provide a default definition.
(emit_insn_modes_h): Emit a definition of NUM_POLY_INT_COEFFS.
* targhooks.h (default_estimated_poly_value): Declare.
* targhooks.c (default_estimated_poly_value): New function.
* target.h (estimated_poly_value): Likewise.
* wide-int.h (WI_UNARY_RESULT): Use wi::binary_traits.
(wi::unary_traits): Delete.
(wi::binary_traits::signed_shift_result_type): Define for
offset_int << HOST_WIDE_INT, etc.
(generic_wide_int::operator <<=): Define for all types and use
wi::lshift instead of <<.
(wi::hwi_with_prec): Add a default constructor.
(wi::ints_for): New class.
(operator <<): Define for all wide-int types.
(operator /): New function.
(operator %): Likewise.
* selftest.h (ASSERT_KNOWN_EQ, ASSERT_KNOWN_EQ_AT, ASSERT_MAYBE_NE)
(ASSERT_MAYBE_NE_AT): New macros.
2017-12-13 Eric Botcazou <ebotcazou@adacore.com>
Dominik Vogt <vogt@linux.vnet.ibm.com>
PR middle-end/78468
* emit-rtl.c (init_emit): Remove ??? comment.
* explow.c (get_dynamic_stack_size): Take known alignment of stack
pointer + STACK_DYNAMIC_OFFSET into account in lieu of STACK_BOUNDARY.
* config/sparc/sparc.h (INIT_EXPANDERS): In 32-bit mode, lower the
alignment of 3 virtual registers to BITS_PER_WORD.
* config/sparc/sparc.c (sparc_compute_frame_size): Simplify.
2017-12-13 Peter Bergner <bergner@vnet.ibm.com>
* config/rs6000/ppc-auxv.h (PPC_FEATURE2_HTM_NO_SUSPEND): New define.
* config/rs6000/rs6000.c (cpu_supports_info): Use it.
2017-12-13 Alexandre Oliva <aoliva@redhat.com>
PR bootstrap/83396
* reload1.c (eliminate_regs_in_insn): Skip debug markers.
2017-12-13 Jakub Jelinek <jakub@redhat.com>
* tree-cfg.c (verify_gimple_in_cfg): Verify no non-label stmts
with the exception of debug begin stmt markers appear before
labels.
PR bootstrap/83396
* final.c (rest_of_handle_final): Call variable_tracking_main only
if !flag_var_tracking.
2017-12-13 Alexandre Oliva <aoliva@redhat.com>
Jakub Jelinek <jakub@redhat.com>
PR bootstrap/83396
PR debug/83391
* tree-cfgcleanup.c (remove_forwarder_block): Keep after
labels debug stmts that can only appear after labels.
2017-12-13 Alexander Monakov <amonakov@ispras.ru>
PR rtl-optimization/82398
* sel-sched.c (sel_rank_for_schedule): Fix check for zero
EXPR_USEFULNESS in priority comparison.
2017-12-13 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/83393
* combine.c (move_deaths): If reg_stat points to a too new insn in
last_death, do not use it: find the proper insn instead.
2017-12-12 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
PR target/82190
* config/rs6000/rs6000-string.c (expand_block_compare,
expand_strn_compare): Fix set_mem_size() calls.
2017-12-12 Jeff Law <law@redhat.com>
PR tree-optimization/83298
PR tree-optimization/83362
PR tree-optimization/83383
* gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Make
push_value_range a public interface. Add new argument to
record_ranges_from_stmt.
* gimple-ssa-evrp-analyze.c
(evrp_range_analyzer::record_ranges_from_stmt): Add new argument.
Update comments. Handle recording temporary equivalences.
* tree-ssa-dom.c (dom_opt_opt_walker::before_dom_children): Add
new argument to call to evrp_range_analyzer::record_ranges_from_stmt.
* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): Likewise.
* tree-ssa-threadedge.c: Include alloc-pool.h, vr-values.h and
gimple-ssa-evrp-analyze.h.
(record_temporary_equivalences_from_phis): Add new argument. When
the PHI arg is an SSA_NAME, set the result's range to the range
of the PHI arg.
(record_temporary_equivalences_from_stmts_at_dest): Record ranges
from statements too.
(thread_through_normal_block): Accept new argument, evrp_range_analyzer.
Pass it down to children as needed.
(thread_outgoing_edges): Likewise.
(thread_across_edge): Likewise. Push/pop range state as needed.
* tree-ssa-threadedge.h (thread_outgoing_edges): Update prototype.
2017-12-12 Julia Koval <julia.koval@intel.com>
* config/i386/i386.c (PTA_SKYLAKE_AVX512): Add PTA_CLWB.
(PTA_CANNONLAKE): Remove PTA_CLWB.
2017-12-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/83332
* config/rs6000/vector.md (vcondv2dfv2di): New define_expand.
(vcondv2div2df): Likewise.
(vconduv2dfv2di): Likewise.
2017-12-12 Jakub Jelinek <jakub@redhat.com>
* builtins.def (BUILT_IN_NEXTAFTER, BUILT_IN_NEXTAFTERF,
BUILT_IN_NEXTAFTERL, BUILT_IN_NEXTTOWARD, BUILT_IN_NEXTTOWARDF,
BUILT_IN_NEXTTOWARDL): Use ATTR_MATHFN_ERRNO instead of
ATTR_MATHFN_FPROUNDING_ERRNO.
2017-12-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/83385
* graphite-scop-detection.c (get_order, order): Remove.
(bb_to_rpo): New global.
(cmp_pbbs): Adjust.
(build_scops): Sort pbbs in RPO order.
2017-12-12 James Greenhalgh <james.greenhalgh@arm.com>
* combine.c (simplify_set): Do not transform subregs to zero_extends
if the destination mode is a vector mode.
2017-12-12 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83359
* tree-cfg.h (fold_loop_internal_call): Declare.
* tree-vectorizer.c (fold_loop_internal_call): Moved to ...
* tree-cfg.c (fold_loop_internal_call): ... here. No longer static.
(find_loop_dist_alias): New function.
(move_sese_region_to_fn): If any dloop->orig_loop_num value is
updated, also adjust any corresponding LOOP_DIST_ALIAS internal
calls.
PR tree-optimization/80631
* tree-vect-loop.c (get_initial_def_for_reduction): Fix comment typo.
(vect_create_epilog_for_reduction): Add INDUC_VAL and INDUC_CODE
arguments, for INTEGER_INDUC_COND_REDUCTION use INDUC_VAL instead of
hardcoding zero as the value if COND_EXPR is never true. For
INTEGER_INDUC_COND_REDUCTION don't emit the final COND_EXPR if
INDUC_VAL is equal to INITIAL_DEF, and use INDUC_CODE instead of
hardcoding MAX_EXPR as the reduction operation.
(is_nonwrapping_integer_induction): Allow negative step.
(vectorizable_reduction): Compute INDUC_VAL and INDUC_CODE for
vect_create_epilog_for_reduction, if no value is suitable, don't
use INTEGER_INDUC_COND_REDUCTION for now. Formatting fixes.
2017-12-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/81889
* tree-ssa-loop-niter.c (infer_loop_bounds_from_signedness): Use
range info from the non-wrapping IV instead of just the range
of the type.
2017-12-12 Julia Koval <julia.koval@intel.com>
* config.gcc: Add vaesintrin.h.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI_V64QI):
New type.
* config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
__builtin_ia32_vaesdec_v32qi, __builtin_ia32_vaesdec_v64qi):
New builtins.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new type.
* config/i386/immintrin.h: Include vaesintrin.h.
* config/i386/sse.md (vaesdec_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesdec_epi128, _mm512_aesdec_epi128,
_mm_aesdec_epi128): New intrinsics.
2017-12-12 Julia Koval <julia.koval@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_VAES_SET,
OPTION_MASK_ISA_VAES_UNSET): New.
(ix86_handle_option): Handle -mvaes.
* config/i386/cpuid.h: Define bit_VAES.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mvaes.
* config/i386/i386-c.c (__VAES__): New.
* config/i386/i386.c (ix86_target_string): Add -mvaes.
(ix86_valid_target_attribute_inner_p): Ditto.
* config/i386/i386.h (TARGET_VAES, TARGET_VAES_P): New.
* config/i386/i386.opt: Add -mvaes.
* doc/invoke.texi: Ditto.
2017-12-12 Alexandre Oliva <aoliva@redhat.com>
* debug.h (gcc_debug_hooks): Add inline_entry.
* dbxout.c (dbx_debug_hooks, xcoff_debug_hooks): Likewise.
* debug.c (do_nothing_debug_hooks): Likewise.
* vmsdbgout.c (vmsdbg_debug_hooks): Likewise.
* dwarf2out.c (dwarf2_debug_hooks): Likewise.
(dwarf2_lineno_debug_hooks): Likewise.
* common.opt (gstatement-frontiers): New, setting
debug_nonbind_markers_p.
* rtl.h (MAY_HAVE_DEBUG_MARKER_INSNS): Activate.
* toplev.c (process_options): Autodetect value for debug statement
frontiers option.
* tree.h (MAY_HAVE_DEBUG_MARKER_STMTS): Activate.
* doc/invoke.texi (gstatement-frontiers, gno-statement-frontiers): New.
* cfgexpand.c (expand_gimple_basic_block): Handle begin stmt
markers. Integrate source bind into debug stmt expand loop.
(pass_expand::execute): Check debug marker limit. Avoid deep
TER and expand debug locations for debug bind insns only.
* cse.c (insn_live_p): Keep nonbind markers and debug bindings
followed by them.
* df-scan.c (df_insn_delete): Accept out-of-block debug insn.
* final.c (reemit_insn_block_notes): Take current block from
nonbind markers. Declare note where it's first set.
(final_scan_insn): Handle begin stmt notes. Emit is_stmt according to
begin stmt markers if enabled.
(notice_source_line): Handle nonbind markers. Fail if their
location is unknown or that of builtins.
(rest_of_handle_final): Convert begin stmt markers to notes if
var-tracking didn't run.
(rest_of_clean_state): Skip begin stmt markers.
* gimple-pretty-print.c (dump_gimple_debug): Handle begin stmt
markers.
* function.c (allocate_struct_function): Set begin_stmt_markers.
* function.h (struct function): Add debug_marker_count counter
and debug_nonbind_markers flag.
* gimple-iterator.c (gsi_remove): Adjust debug_marker_count.
* gimple-low.c (lower_function_body): Adjust
debug_nonbind_markers.
(lower_stmt): Drop or skip gimple debug stmts.
(lower_try_catch): Skip debug stmts.
* gimple.c (gimple_build_debug_begin_stmt): New.
(gimple_copy): Increment debug_marker_count if copying one.
* gimple.h (gimple_build_debug_begin_stmt): Declare.
* gimplify.c (rexpr_location): New.
(rexpr_has_location): New.
(warn_switch_unreachable_r): Handle gimple debug stmts.
(shortcut_cond_r): Call expr_location.
(find_goto): New.
(find_goto_label): New.
(shortcut_cond_expr): Call expr_has_location, expr_location, and
find_goto_label.
(gimplify_cond_expr): Call find_goto_label, expr_has_location, and
expr_location.
(gimplify_expr): Handle begin stmt markers. Reject debug expr decls.
* langhooks-def.h (LANG_HOOKS_EMITS_BEGIN_STMT): New. Add to...
(LANG_HOOKS_INITIALIZER): ... this.
* langhooks.h (struct lang_hooks): Add emits_begin_stmt.
* lra-contraints.c (inherit_reload_reg): Tolerate between-blocks
debug insns.
(update_ebb_live_info): Skip debug insn markers.
* lra.c (debug_insn_static_data): Rename to...
(debug_bind_static_data): ... this.
(debug_marker_static_data): New.
(lra_set_insn_recog_data): Select one of the above depending
on debug insn kind.
(lra_update_isn_regno_info): Don't assume debug insns have
freqs.
(push_insns): Skip debug insns.
* lto-streamer-in.c (input_function): Drop debug stmts
depending on active options. Adjust debug_nonbind_markers.
* params.def (PARAM_MAX_DEBUG_MARKER_COUNT): New.
* print-rtl.c (rtx_writer::print_rtx_operand_code_0): Handle
begin stmt marker notes.
(print_insn): Likewise.
* recog.c (extract_insn): Recognize rtl for debug markers.
* rtl.def (DEBUG_MARKER): New.
* tree-inline.c: Include params.h.
(remap_gimple_stmt): Handle nonbind markers.
(maybe_move_debug_stmts_to_successors): Likewise.
(copy_debug_stmt): Likewise.
* tree-iterator.c (append_to_statement_list_1): Append begin stmt
markers regardless of no side effects.
(tsi_link_before): Don't update container's side effects when adding
a begin stmt marker.
(tsi_link_after): Likewise.
(expr_first): Skip begin stmt markers.
(expr_last): Likewise.
* tree-pretty-print (dump_generic_node): Handle begin stmt markers.
* tree-ssa-threadedge.c (propagate_threaded_block_debug_info):
Disregard nonbind markers.
* tree.c (make_node_stat): Don't set side effects for begin stmt
markers.
(build1_stat): Likewise.
* tree.def (DEBUG_BEGIN_STMT): New.
* tree.h (GOTO_DESTINATION): Require a GOTO_EXPR.
* var-tracking.c (delete_debug_insns): Renamed to...
(delete_vta_debug_insns): ... this.
(reemit_marker_as_note): New.
(vt_initialize): Reemit markers.
(delete_vta_debug_insns): Likewise.
(vt_debug_insns_local): Reemit or delete markers.
(variable_tracking_main_1): Likewise.
* doc/generic.texi (DEBUG_BEGIN_STMT): Document.
* doc/gimple.texi (gimple_debug_begin_stmt_p): New.
(gimple_debug_nonbind_marker_p): New.
(gimple_build_debug_bind): Adjust.
(gimple_build_debug_begin_stmt): New.
* doc/invoke.texi (max-debug-marker-count): New param.
* doc/rtl.texi (debug_implicit_ptr, entry_value): New.
(debug_parameter_ref, debug_marker): New.
(NOTE_INSN_BEGIN_STMT): New.
(DEBUG_INSN): Describe begin stmt markers.
* cfgbuild.c (find_bb_boundaries): Don't purge dead edges if,
without debug insns, we wouldn't, but clean up debug insns
after a control flow insn nevertheless.
* cfgcleanup.c (delete_unreachable_blocks): Use alternate
block removal order if MAY_HAVE_DEBUG_BIND_INSNS.
* cfgexpand.c (label_rtx_for_bb): Skip debug insns.
* cfgrtl.c (try_redirect_by_replacing_jump): Skip debug insns.
(rtl_tidy_fallthru_edge): Likewise.
(rtl_verify_fallthru): Likewise.
(rtl_verify_bb_layout): Likewise.
(skip_insns_after_block): Likewise.
(duplicate_insn_chain): Use DEBUG_BIND_INSN_P.
* dwarf2out.c: Include print-rtl.h.
(dwarf2out_next_real_insn): New.
(dwarf2out_var_location): Call it. Disregard begin stmt markers.
Dump debug binds in asm comments.
* gimple-iterator.c (gimple_find_edge_insert_loc): Skip debug stmts.
* gimple-iterator.h (gsi_start_bb_nondebug): Remove; adjust
callers to use gsi_start_nondebug_bb instead.
(gsi_after_labels): Skip gimple debug stmts.
(gsi_start_nondebug): New.
* gimple-loop-interchange.c (find_deps_in_bb_for_stmt): Adjust.
(proper_loop_form_for_interchange): Adjust.
* gimple-low.c (gimple_seq_may_fallthru): Take last nondebug stmt.
* gimple.h (gimple_seq_last_nondebug_stmt): New.
* gimplify.c (last_stmt_in_scope): Skip debug stmts.
(collect_fallthrough_labels): Likewise.
(should_warn_for_implicit_fallthrough): Likewise.
(warn_implicit_fallthrough_r): Likewise.
(expand_FALLTHROUGH_r): Likewise.
* graphite-isl-ast-to-gimple.c (gsi_insert_earliest): Adjust.
(graphite_copy_stmts_from_block): Skip nonbind markers.
* haifa-sched.c (sched_extend_bb): Skip debug insns.
* ipa-icf-gimple.c (func_checker::compare_bb): Adjust.
* jump.c (clean_barriers): Skip debug insns.
* omp-expand.c (expand_parallel_call): Skip debug insns.
(expand_task_call): Likewise.
(remove_exit_barrier): Likewise.
(expand_omp_taskreg): Likewise.
(expand_omp_for_init_counts): Likewise.
(expand_omp_for_generic): Likewise.
(expand_omp_for_static_nochunk): Likewise.
(expand_omp_for_static_chunk): Likewise.
(expand_omp_simd): Likewise.
(expand_omp_taskloop_for_outer): Likewise.
(expand_omp_taskloop_for_inner): Likewise.
(expand_oacc_for): Likewise.
(expand_omp_sections): Likewise.
(expand_omp_single): Likewise.
(expand_omp_synch): Likewise.
(expand_omp_atomic_load): Likewise.
(expand_omp_atomic_store): Likewise.
(expand_omp_atomic_fetch_op): Likewise.
(expand_omp_atomic_pipeline): Likewise.
(expand_omp_atomic_mutex): Likewise.
(expand_omp_target): Likewise.
(grid_expand_omp_for_loop): Likewise.
(grid_expand_target_grid_body): Likewise.
(build_omp_regions_1): Likewise.
* omp-low.c (check_combined_parallel): Skip debug stmts.
* postreload.c (fixup_debug_insns): Skip nonbind debug insns.
* regcprop.c (find_oldest_value_reg): Ensure REGNO is not a pseudo.
* sese.c (sese_trivially_empty_bb_p): Call is_gimple_debug in
test.
* tree-cfg.c (make_blobs_1): Skip debug stmts.
(make_edges): Likewise.
(cleanup_dead_labels): Likewise.
(gimple_can_merge_blocks_p): Likewise.
(stmt_starts_bb_p): Likewise.
(gimple_block_label): Likewise.
(gimple_redirect_edge_and_branch): Likewise.
* tree-cfgcleanup.c (remove_forwarder_block): Rearrange skipping
of debug stmts.
(execute_cleanup_cfg_post_optimizing): Dump enumerated decls with
TDF_SLIM.
* tree-pretty-print (print_declaration): Omit initializer in slim
dumps.
* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Mark begin stmt
markers.
(eliminate_unnecessary_stmts): Stabilize block removal order.
* tree-ssa-tail-merge.c (find_duplicate): Skip debug stmts.
* var-tracking.c (get_first_insn): New.
(vt_emit_notes): Call it.
(vt_initialize): Walk any insns before the first BB.
(delete_debug_insns): Likewise.
* gimple.h (enum gimple_debug_subcode): Add
GIMPLE_DEBUG_BEGIN_STMT.
(gimple_debug_begin_stmt_p): New.
(gimple_debug_nonbind_marker_p): New.
* tree.h (MAY_HAVE_DEBUG_MARKER_STMTS): New.
(MAY_HAVE_DEBUG_BIND_STMTS): Renamed from....
(MAY_HAVE_DEBUG_STMTS): ... this. Check both.
* insn-notes.def (BEGIN_STMT): New.
* rtl.h (MAY_HAVE_DEBUG_MARKER_INSNS): New.
(MAY_HAVE_DEBUG_BIND_INSNS): Renamed from....
(MAY_HAVE_DEBUG_INSNS): ... this. Check both.
(NOTE_MARKER_LOCATION, NOTE_MARKER_P): New.
(DEBUG_BIND_INSN_P, DEBUG_MARKER_INSN_P): New.
(INSN_DEBUG_MARKER_KIND): New.
(GEN_RTX_DEBUG_MARKER_BEGIN_STMT_PAT): New.
(INSN_VAR_LOCATION): Check for VAR_LOCATION.
(INSN_VAR_LOCATION_PTR): New.
* cfgexpand.c (expand_debug_locations): Handle debug bind insns
only.
(expand_gimple_basic_block): Likewise. Emit debug temps for TER
deps only if debug bind insns are enabled.
(pass_expand::execute): Avoid deep TER and expand
debug locations for debug bind insns only.
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Narrow
debug stmts special handling down to debug bind stmts.
* combine.c (try_combine): Narrow debug insns special handling
down to debug bind insns.
* cse.c (delete_trivially_dead_insns): Handle debug bindings.
Narrow debug insns preexisting special handling down to debug
bind insns.
* dce.c (rest_of_handle_ud_dce): Narrow debug insns special
handling down to debug bind insns.
* function.c (instantiate_virtual_regs): Skip debug markers,
adjust handling of debug binds.
* gimple-ssa-backprop.c (backprop::prepare_change): Try debug
temp insertion iff MAY_HAVE_DEBUG_BIND_STMTS.
* haifa-sched.c (schedule_insn): Narrow special handling of debug
insns to debug bind insns.
* ipa-param-manipulation.c (ipa_modify_call_arguments): Narrow
special handling of debug stmts to debug bind stmts.
* ipa-split.c (split_function): Likewise.
* ira.c (combine_and_move_insns): Adjust debug bind insns only.
* loop-unroll.c (apply_opt_in_copies): Adjust tests on bind
debug insns.
* reg-stack.c (convert_regs_1): Use DEBUG_BIND_INSN_P.
* regrename.c (build_def_use): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
(pass_cprop_hardreg): Narrow special casing of debug insns to
debug bind insns.
* regstat.c (regstat_init_n_sets_and_refs): Likewise.
* reload1.c (reload): Likewise.
* sese.c (sese_insert_phis_for_liveouts): Narrow special
casing of debug stmts to debug bind stmts.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* ssa-iterators.h (num_imm_uses): Likewise.
* tree-cfg.c (gimple_merge_blocks): Narrow special casing of
debug stmts to debug bind stmts.
* tree-inline.c (tree_function_versioning): Narrow special casing
of debug stmts to debug bind stmts.
* tree-loop-distribution.c (generate_loops_for_partition):
Narrow special casing of debug stmts to debug bind stmts.
* tree-sra.c (analyze_access_subtree): Narrow special casing
of debug stmts to debug bind stmts.
* tree-ssa-dce.c (remove_dead_stmt): Narrow special casing of debug
stmts to debug bind stmts.
* tree-ssa-loop-ivopt.c (remove_unused_ivs): Narrow special
casing of debug stmts to debug bind stmts.
* tree-ssa-reassoc.c (reassoc_remove_stmt): Likewise.
* tree-ssa-tail-merge.c (tail_merge_optimize): Narrow special
casing of debug stmts to debug bind stmts.
* tree-ssa-threadedge.c (propagate_threaded_block_debug_info):
Likewise.
* tree-ssa.c (flush_pending_stmts): Narrow special casing of
debug stmts to debug bind stmts.
(gimple_replace_ssa_lhs): Likewise.
(insert_debug_temp_for_var_def): Likewise.
(insert_debug_temps_for_defs): Likewise.
(reset_debug_uses): Likewise.
* tree-ssanames.c (release_ssa_name_fn): Likewise.
* tree-vect-loop-manip.c (adjust_debug_stmts_now): Likewise.
(adjust_debug_stmts): Likewise.
(adjust_phi_and_debug_stmts): Likewise.
(vect_do_peeling): Likewise.
* tree-vect-loop.c (vect_transform_loop): Likewise.
* valtrack.c (propagate_for_debug): Use BIND_DEBUG_INSN_P.
* var-tracking.c (adjust_mems): Narrow special casing of debug
insns to debug bind insns.
(dv_onepart_p, dataflow_set_clar_at_call, use_type): Likewise.
(compute_bb_dataflow, vt_find_locations): Likewise.
(vt_expand_loc, emit_notes_for_changes): Likewise.
(vt_init_cfa_base): Likewise.
(vt_emit_notes): Likewise.
(vt_initialize): Likewise.
(vt_finalize): Likewise.
* emit-rtl.c (next_nondebug_insn, prev_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn, prev_nonnote_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn_bb): New.
(prev_nonnote_nondebug_insn_bb): New.
(prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove.
* rtl.h (prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove decls.
(prev_nonnote_nondebug_insn_bb): Declare.
(next_nonnote_nondebug_insn_bb): Declare.
* cfgbuild.c (find_bb_boundaries): Adjust to skip debug insns.
* cfgrtl.c (get_last_bb_insn): Likewise.
* lra.c (push_insns): Likewise.
2017-12-11 David Malcolm <dmalcolm@redhat.com>
PR c/82050
* selftest-run-tests.c (selftest::run_tests): Move start/finish code
to...
* selftest.c (selftest::test_runner::test_runner): New ctor.
(selftest::test_runner::~test_runner): New dtor.
* selftest.h (class selftest::test_runner): New class.
2017-12-11 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h (vec_extract_fp32_from_shorth,
vec_extract_fp32_from_shortl]): Add #defines.
* config/rs6000/rs6000-builtin.def (VSLDOI_2DI): Add macro expansion.
* config/rs6000/rs6000-c.c (ALTIVEC_BUILTIN_VEC_UNPACKH,
ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VEC_AND,
ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VEC_SRL,
ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VEC_SLD,
ALTIVEC_BUILTIN_VEC_SLL): Add expansions.
* doc/extend.texi: Add documentation for the added builtins.
2017-12-11 Alexandre Oliva <aoliva@redhat.com>
PR rtl-optimization/80693
PR rtl-optimization/81019
PR rtl-optimization/81020
* combine.c (distribute_notes): Reset any REG_UNUSED REGs that
are not mentioned in i3. Place the REG_UNUSED note on i2,
possibly modified to REG_DEAD, if it did not originate in i3.
2017-12-11 Jakub Jelinek <jakub@redhat.com>
* recog.c (store_data_bypass_p_1): New function.
(store_data_bypass_p): Handle USE in a PARALLEL like CLOBBER. Use
store_data_bypass_p_1 to avoid code duplication. Formatting fixes.
2017-12-11 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/83361
* ifcvt.c (if_convert): Call fixup_partitions.
2017-12-11 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
early folding of splat_u{8,16,32}.
2017-12-11 Jakub Jelinek <jakub@redhat.com>
* config/aarch64/aarch64.c (aarch64_print_operand): Don't start
output_operand_lossage first argument with capital letter.
(aarch64_override_options): Don't start error and sorry first argument
with capital letter.
2017-12-11 Andi Kleen <ak@linux.intel.com>
PR gcov-profile/83355
* auto-profile.c (string_table::get_index_by_decl): Don't
recurse when abstract origin points to itself.
2017-12-11 Bin Cheng <bin.cheng@arm.com>
PR tree-optimization/83320
* gimple-loop-interchange.cc (free_data_refs_with_aux): Use delete.
(prune_datarefs_not_in_loop): Ditto.
2017-12-10 Gerald Pfeifer <gerald@pfeifer.com>
* doc/install.texi (Specific): Tweak link to mkssoftware.com.
2017-12-10 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83337
* gimple-loop-interchange.cc (compute_access_stride): Handle
bitfield DRs properly.
2017-12-09 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83338
* tree-vect-stmts.c (vectorizable_operation): Handle POINTER_DIFF_EXPR
vectorization as MINUS_EXPR with a subsequent VIEW_CONVERT_EXPR from
vector of unsigned integers to vector of signed integers.
2017-12-08 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/83317
* lra-constraints.c (process_address_1): Add insn code check.
2017-12-08 Michael Matz <matz@suse.de>
Fix PR tree-optimization/83323
* gimple-loop-jam (unroll_jam_possible_p): Correct test for
head-controlled loops and loop BBs.
* common.opt (funroll-and-jam): Remove, instead ...
(floop-unroll-and-jam): ... reuse this option.
* opts.c (default_options_table): Use OPT_floop_unroll_and_jam.
* doc/invoke.texi (-funroll-and-jam): Move docu to ...
(-floop-unroll-and-jam): ... this option.
2017-12-08 Jakub Jelinek <jakub@redhat.com>
* ipa-polymorphic-call.c (noncall_stmt_may_be_vtbl_ptr_store): Fix
a comment typo, get_base_ref_and_offset -> get_ref_base_and_extent.
* ipa-prop.c (stmt_may_be_vtbl_ptr_store): Likewise.
2017-12-08 Richard Biener <rguenther@suse.de>
PR middle-end/81782
* tree-ssa-uninit.c (warn_uninitialized_vars): Properly
handle accesses outside of zero-sized vars.
2017-12-08 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/83141
* tree-sra.c (contains_vce_or_bfcref_p): Move up in the file, also
test for MEM_REFs implicitely changing types with padding. Remove
inline keyword.
(build_accesses_from_assign): Added contains_vce_or_bfcref_p checks.
2017-12-08 Jakub Jelinek <jakub@redhat.com>
* config/arc/arc.c (arc_attribute_table): Add exclusions to
the comment.
* config/avr/avr.c (avr_attribute_table): Likewise.
* config/msp430/msp430.c (msp430_attribute_table): Likewise.
* config/rl78/rl78.c (rl78_attribute_table): Likewise.
* config/nds32/nds32.c (nds32_attribute_table): Likewise.
* config/darwin.h (SUBTARGET_ATTRIBUTE_TABLE): Initialize new member
of struct attribute_spec.
* config/i386/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Likewise.
2017-12-08 Ulrich Weigand <uweigand@de.ibm.com>
PR target/82960
* config/spu/spu.c (pad_bb): Only check INSN_CODE when INSN_P is true.
2017-12-08 Jan Hubicka <hubicka@ucw.cz>
PR middle-end/83609
* profile-count.c (profile_count::from_gcov_type): Move from
profile-count.h; handle overflow.
* profile-count.h (profile_count::from_gcov_type): Move offline.
2017-12-08 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/83304
* combine.c (move_deaths): If we do not know where a register died,
search for it.
2017-12-08 Richard Biener <rguenther@suse.de>
* gimple-loop-interchange.cc (tree_loop_interchange::interchange):
Provide -fopt-info-loop feedback when we interchange in a nest.
2017-06-08 Richard Earnshaw <rearnsha@arm.com>
* config/arm/driver-arm.c (arm_cpu_table): Use fp-capable product names
for armv6 ARM CPU IDs.
2017-06-08 Richard Earnshaw <rearnsha@arm.com>
* common/config/arm/arm-common.c: Include <algorithm>.
(INCLUDE_VECTOR): Define.
(compare_opt_names): New function.
(arm_rewrite_selected_arch): Only strip out extensions that can be
expressed through -mfpu. Sort the remaining extensions
alphabetically.
2017-06-08 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm.h (arm_asm_auto_mfpu): Declare.
(ASM_CPU_SPEC_FUNCTIONS): Add new rule asm_auto_mfpu.
(ASM_CPU_SPEC): Use it if -mfpu is set to auto.
* common/config/arm/arm-common.c (arm_asm_auto_mfpu): New function.
2017-06-08 Tristan Gingold <gindold@adacore.com>
PR ada/81470
* dwarf2out.c (dwarf2out_do_cfi_startproc): Only emit
.cfi_personality or .cfi_lsda if the eh data format is dwarf2.
2017-12-08 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/sol2.h (SOLARIS_ATTRIBUTE_TABLE): Initialize new member
of struct attribute_spec.
2017-12-08 Julia Koval <julia.koval@intel.com>
* config/i386/avx512vnniintrin.h (_mm512_dpwssds_epi32,
_mm512_mask_dpwssds_epi32, _mm512_maskz_dpwssds_epi32): New intrinsics.
* config/i386/avx512vnnivlintrin.h (_mm256_dpwssds_epi32,
_mm256_mask_dpwssds_epi32, _mm256_maskz_dpwssds_epi32,
_mm_dpwssds_epi32, _mm_mask_dpwssds_epi32,
_mm_maskz_dpwssds_epi32): Ditto.
2017-12-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/81303
* tree-vect-stmts.c (vect_is_simple_cond): For invariant
conditions try to create a comparison vector type matching
the data vector type.
(vectorizable_condition): Adjust.
* tree-vect-patterns.c (vect_recog_mask_conversion_pattern):
Leave invariant conditions alone in case we can vectorize those.
2017-12-08 Julia Koval <julia.koval@intel.com>
* config/i386/avx512vnniintrin.h (_mm512_dpwssd_epi32,
_mm512_mask_dpwssd_epi32, _mm512_maskz_dpwssd_epi32): New intrinsics.
* config/i386/avx512vnnivlintrin.h (_mm256_dpwssd_epi32,
_mm256_mask_dpwssd_epi32, _mm256_maskz_dpwssd_epi32, _mm_dpwssd_epi32,
_mm_mask_dpwssd_epi32, _mm_maskz_dpwssd_epi32): Ditto.
2017-12-08 Julia Koval <julia.koval@intel.com>
* config/i386/avx512vnniintrin.h (_mm512_dpbusds_epi32,
_mm512_mask_dpbusds_epi32, _mm512_maskz_dpbusds_epi32): New.
* config/i386/avx512vnnivlintrin.h (_mm256_dpbusds_epi32,
_mm256_mask_dpbusds_epi32, _mm256_maskz_dpbusds_epi32,
_mm_dpbusds_epi32, _mm_mask_dpbusds_epi32,
_mm_maskz_dpbusds_epi32): New intrinsics.
2017-12-07 Sandra Loosemore <sandra@codesourcery.com>
* config/nios2/nios2.md (ld<bhw_uns>io): Add splitter for memory
operand.
(ld<bh>io_signed): Likewise.
(st<bhw>io): Likewise.
* config/nios2/predicates.md (ldstio_memory_operand): Allow
SMALL_INT12 constant integer operand.
2017-12-07 Sandra Loosemore <sandra@codesourcery.com>
* config/nios2/nios2.c (nios2_symbolic_constant_allowed):
Rename to...
(nios2_large_constant_allowed): ...this. Adjust uses.
(nios2_plus_symbolic_constant_p): Rename to...
(nios2_plus_large_constant_p): ...this. Adjust uses.
(nios2_legitimate_address_p): Correct CONST_INT handling.
(nios2_symbolic_memory_operand_p): Rename to...
(nios2_large_constant_memory_operand_p): ...this. Adjust uses.
(nios2_large_constant_p): Check for large constant integers too.
(nios2_split_large_constant): Handle constant integers.
(nios2_split_symbolic_memory_operand): Rename to...
(nios2_split_large_constant_memory_operand): ...this. Adjust uses.
(nios2_legitimize_constant_address): Handle constant integers.
(r0rel_constant_p): Handle small constant integers.
(nios2_print_operand_address): Handle r0-relative integer addresses.
* config/nios2/nios2-protos.h: Adjust for renamed functions.
* config/nios2/nios2.md: Adjust for renamed functions.
2017-12-07 Andrew Waterman <andrew@sifive.com>
* config/riscv/riscv.c (TARGET_ASM_SELECT_SECTION): New define.
(TARGET_HAVE_SRODATA_SECTION): New define.
(riscv_select_section): New function.
2017-12-08 Joseph Myers <joseph@codesourcery.com>
Alexander Monakov <amonakov@ispras.ru>
Jakub Jelinek <jakub@redhat.com>
PR target/81906
* config/i386/i386.c (ix86_expand_rint): Handle flag_rounding_math.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* config/aarch64/aarch64.c (aarch64_print_address_internal): Return
a bool success value. Don't call output_operand_lossage here.
(aarch64_print_ldpstp_address): Return a bool success value.
(aarch64_print_operand_address): Call output_addr_const if
aarch64_print_address_internal fails.
(aarch64_print_operand): Don't assert that the mode is 16 bytes for
'y'; call output_operand_lossage instead. Call output_operand_lossage
if aarch64_print_ldpstp_address fails.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* tree-vector-builder.h
(tree_vector_builder::binary_encoded_nelts): Declare.
* tree-vector-builder.c
(tree_vector_builder::binary_encoded_nelts): New function.
* fold-const.c (negate_expr_p): Likewise.
(operand_equal_p, fold_checksum_tree): Likewise.
* tree-loop-distribution.c (const_with_all_bytes_same): Likewise.
* tree.c (integer_zerop, integer_onep, integer_all_onesp, real_zerop)
(real_onep, real_minus_onep, add_expr, initializer_zerop): Likewise.
(uniform_vector_p): Likewise.
* varasm.c (const_hash_1, compare_constant): Likewise.
* tree-ssa-ccp.c: Include tree-vector-builder.h.
(valid_lattice_transition): Operate directly on the VECTOR_CST
encoding.
* ipa-icf.c: Include tree-vector-builder.h.
(sem_variable::equals): Operate directly on the VECTOR_CST encoding.
* print-tree.c (print_node): Print encoding of VECTOR_CSTs.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* tree.c (build_vector): Delete.
* tree.h (build_vector): Make static and move into the self-testing
block.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* vector-builder.h (vector_builder::derived): New const overload.
(vector_builder::elt): New function.
* tree-vector-builder.h (tree_vector_builder::type): New function.
(tree_vector_builder::apply_step): Declare.
* tree-vector-builder.c (tree_vector_builder::apply_step): New
function.
* gimple-fold.h (tree_vector_builder): Declare.
(gimple_build_vector): Take a tree_vector_builder instead of a
type and vector of elements.
* gimple-fold.c (gimple_build_vector): Likewise.
* tree-vect-loop.c (get_initial_def_for_reduction): Update call
accordingly.
(get_initial_defs_for_reduction): Likewise.
(vectorizable_induction): Likewise.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* tree-vector-builder.h
(tree_vector_builder::new_binary_operation): Declare.
* tree-vector-builder.c
(tree_vector_builder::new_binary_operation): New function.
* fold-const.c (fold_relational_const): Use it.
(const_binop): Likewise. Check that both input vectors have
the same number of elements, thus excluding things like WIDEN_SUM.
Check whether it is possible to operate directly on the encodings
of stepped inputs.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* fold-const.c (fold_negate_expr_1): Use tree_vector_builder and
new_unary_operation, operating only on the encoded elements.
(const_unop): Likewise.
(exact_inverse): Likewise.
(distributes_over_addition_p): New function.
(const_binop): Use tree_vector_builder and new_unary_operation
for combinations of VECTOR_CST and INTEGER_CST. Operate only
on the encoded elements unless the encoding is strided and the
operation does not distribute over addition.
(fold_convert_const): Use tree_vector_builder and
new_unary_operation. Operate only on the encoded elements
for truncating integer conversions, or for non-stepped encodings.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* config/sparc/sparc.c: Include tree-vector-builder.h.
(sparc_fold_builtin): Use tree_vector_builder instead of build_vector.
* expmed.c: Include tree-vector-builder.h.
(make_tree): Use tree_vector_builder instead of build_vector.
* fold-const.c: Include tree-vector-builder.h.
(const_binop): Use tree_vector_builder instead of build_vector.
(const_unop): Likewise.
(native_interpret_vector): Likewise.
(fold_vec_perm): Likewise.
(fold_ternary_loc): Likewise.
* gimple-fold.c: Include tree-vector-builder.h.
(gimple_fold_stmt_to_constant_1): Use tree_vector_builder instead
of build_vector.
* tree-ssa-forwprop.c: Include tree-vector-builder.h.
(simplify_vector_constructor): Use tree_vector_builder instead
of build_vector.
* tree-vect-generic.c: Include tree-vector-builder.h.
(add_rshift): Use tree_vector_builder instead of build_vector.
(expand_vector_divmod): Likewise.
(optimize_vector_constructor): Likewise.
* tree-vect-loop.c: Include tree-vector-builder.h.
(vect_create_epilog_for_reduction): Use tree_vector_builder instead
of build_vector. Explicitly use a stepped encoding for
{ 1, 2, 3, ... }.
* tree-vect-slp.c: Include tree-vector-builder.h.
(vect_get_constant_vectors): Use tree_vector_builder instead
of build_vector.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c: Include tree-vector-builder.h.
(vectorizable_bswap): Use tree_vector_builder instead of build_vector.
(vect_gen_perm_mask_any): Likewise.
(vectorizable_call): Likewise. Explicitly use a stepped encoding.
* tree.c: (build_vector_from_ctor): Use tree_vector_builder instead
of build_vector.
(build_vector_from_val): Likewise. Explicitly use a duplicate
encoding.
2017-12-07 Richard Sandiford <richard.sandiford@arm.com>
* doc/generic.texi (VECTOR_CST): Describe new representation of
vector constants.
* vector-builder.h: New file.
* tree-vector-builder.h: Likewise.
* tree-vector-builder.c: Likewise.
* Makefile.in (OBJS): Add tree-vector-builder.o.
* tree.def (VECTOR_CST): Update comment to refer to generic.texi.
* tree-core.h (tree_base): Add a vector_cst field to the u union.
(tree_vector): Change the number of elements to
vector_cst_encoded_nelts.
* tree.h (VECTOR_CST_NELTS): Redefine using TYPE_VECTOR_SUBPARTS.
(VECTOR_CST_ELTS): Delete.
(VECTOR_CST_ELT): Redefine using vector_cst_elt.
(VECTOR_CST_LOG2_NPATTERNS, VECTOR_CST_NPATTERNS): New macros.
(VECTOR_CST_NELTS_PER_PATTERN, VECTOR_CST_DUPLICATE_P): Likewise.
(VECTOR_CST_STEPPED_P, VECTOR_CST_ENCODED_ELTS): Likewise.
(VECTOR_CST_ENCODED_ELT): Likewise.
(vector_cst_encoded_nelts): New function.
(make_vector): Take the values of VECTOR_CST_LOG2_NPATTERNS and
VECTOR_CST_NELTS_PER_PATTERN as arguments.
(vector_cst_int_elt, vector_cst_elt): Declare.
* tree.c: Include tree-vector-builder.h.
(tree_code_size): Abort if passed VECTOR_CST.
(tree_size): Update for new VECTOR_CST layout.
(make_vector): Take the values of VECTOR_CST_LOG2_NPATTERNS and
VECTOR_CST_NELTS_PER_PATTERN as arguments.
(build_vector): Use tree_vector_builder.
(vector_cst_int_elt, vector_cst_elt): New functions.
(drop_tree_overflow): For VECTOR_CST, drop the TREE_OVERFLOW from the
encoded elements and then create the vector in the canonical form.
(check_vector_cst, check_vector_cst_duplicate, check_vector_cst_fill)
(check_vector_cst_stepped, test_vector_cst_patterns): New functions.
(tree_c_tests): Call test_vector_cst_patterns.
* lto-streamer-out.c (DFS::DFS_write_tree_body): Handle the new
VECTOR_CST fields.
(hash_tree): Likewise.
* tree-streamer-out.c (write_ts_vector_tree_pointers): Likewise.
(streamer_write_tree_header): Likewise.
* tree-streamer-in.c (lto_input_ts_vector_tree_pointers): Likewise.
(streamer_alloc_tree): Likewise. Update call to make_vector.
* fold-const.c (fold_ternary_loc): Avoid using VECTOR_CST_ELTS.
2017-12-07 Richard Sandiford <richard.sandiford@linaro.org>
* selftest.h (ASSERT_TRUE_AT, ASSERT_FALSE_AT, ASSERT_EQ_AT)
(ASSERT_NE, ASSERT_PRED1): Add underscores to local variable names
* selftest-rtl.h (ASSERT_RTX_EQ, ASSERT_RTX_PTR_EQ): Likewise.
2017-12-07 Bin Cheng <bin.cheng@arm.com>
Richard Biener <rguenther@suse.de>
PR tree-optimization/81303
* Makefile.in (gimple-loop-interchange.o): New object file.
* common.opt (floop-interchange): Reuse the option from graphite.
* doc/invoke.texi (-floop-interchange): Ditto. New document for
-floop-interchange and mention it for -O3.
* opts.c (default_options_table): Enable -floop-interchange at -O3.
* gimple-loop-interchange.cc: New file.
* params.def (PARAM_LOOP_INTERCHANGE_MAX_NUM_STMTS): New parameter.
(PARAM_LOOP_INTERCHANGE_STRIDE_RATIO): New parameter.
* passes.def (pass_linterchange): New pass.
* timevar.def (TV_LINTERCHANGE): New time var.
* tree-pass.h (make_pass_linterchange): New declaration.
* tree-ssa-loop-ivcanon.c (create_canonical_iv): Change to external
interchange. Record IV before/after increment in new parameters.
* tree-ssa-loop-ivopts.h (create_canonical_iv): New declaration.
* tree-vect-loop.c (vect_is_simple_reduction): Factor out reduction
path check into...
(check_reduction_path): ...New function here.
* tree-vectorizer.h (check_reduction_path): New declaration.
2017-12-07 Vladimir Makarov <vmakarov@redhat.com>
PR target/83252
PR rtl-optimization/80818
* lra.c (add_regs_to_insn_regno_info): Make a hard reg in CLOBBER
always early clobbered.
* lra-lives.c (process_bb_lives): Check input hard regs for early
clobbered non-operand hard reg.
2017-12-07 Jakub Jelinek <jakub@redhat.com>
PR middle-end/83164
* tree-cfg.c (verify_gimple_assign_binary): Don't require
types_compatible_p, just that TYPE_MODE is the same.
2017-12-07 Martin Sebor <msebor@redhat.com>
PR c/81544
* attribs.c (empty_attribute_table): Initialize new member of
struct attribute_spec.
(decl_attributes): Add argument. Handle mutually exclusive
combinations of attributes.
(selftests::test_attribute_exclusions): New function.
(selftests::attribute_c_tests): Ditto.
* attribs.h (decl_attributes): Add default argument.
* selftest.h (attribute_c_tests): Declare.
* selftest-run-tests.c (selftest::run_tests): Call attribute_c_tests.
* tree-core.h (attribute_spec::exclusions, exclude): New type and
member.
* doc/extend.texi (Common Function Attributes): Update const and pure.
* config/alpha/alpha.c (vms_attribute_table): Initialize new member
of struct attribute_spec.
* config/arc/arc.c (arc_attribute_table): Same.
* config/arm/arm.c (arm_attribute_table): Same.
* config/avr/avr.c ( avr_attribute_table): Same.
* config/bfin/bfin.c (bfin_attribute_table): Same.
* config/cr16/cr16.c (cr16_attribute_table): Same.
* config/epiphany/epiphany.c (epiphany_attribute_table): Same.
* config/h8300/h8300.c (h8300_attribute_table): Same.
* config/i386/i386.c (ix86_attribute_table): Same.
* config/ia64/ia64.c (ia64_attribute_table): Same.
* config/m32c/m32c.c (m32c_attribute_table): Same.
* config/m32r/m32r.c (m32r_attribute_table): Same.
* config/m68k/m68k.c (m68k_attribute_table): Same.
* config/mcore/mcore.c (mcore_attribute_table): Same.
* config/microblaze/microblaze.c (microblaze_attribute_table): Same.
* config/mips/mips.c (mips_attribute_table): Same.
* config/msp430/msp430.c (msp430_attribute_table): Same.
* config/nds32/nds32.c (nds32_attribute_table): Same.
* config/nvptx/nvptx.c (nvptx_attribute_table): Same.
* config/powerpcspe/powerpcspe.c (rs6000_attribute_table): Same.
* config/rl78/rl78.c (rl78__attribute_table): Same.
* config/rs6000/rs6000.c (rs6000_attribute_table): Same.
* onfig/rx/rx.c (rx_attribute_table): Same.
* config/s390/s390.c (s390_handle_vectorbool_attribute): Same.
* config/sh/sh.c (sh_attribute_table): Same.
* config/sparc/sparc.c (sparc_attribute_table): Same.
* config/spu/spu.c (spu_attribute_table): Same.
* config/stormy16/stormy16.c (xstormy16_attribute_table): Same.
* config/v850/v850.c (v850_attribute_table): Same.
* config/visium/visium.c (visium_attribute_table): Same.
2017-12-07 Tamar Christina <tamar.christina@arm.com>
PR target/82641
* config/arm/arm.c (INCLUDE_STRING): Define.
(arm_last_printed_arch_string, arm_last_printed_fpu_string): New.
(arm_declare_function_name): Conservatively emit .arch, .arch_extensions
and .fpu.
2017-12-07 Michael Matz <matz@suse.de>
Add unroll and jam pass
* gimple-loop-jam.c: New file.
* Makefile.in (OBJS): Add gimple-loop-jam.o.
* common.opt (funroll-and-jam): New option.
* opts.c (default_options_table): Add unroll-and-jam at -O3.
* params.def (PARAM_UNROLL_JAM_MIN_PERCENT): New param.
(PARAM_UNROLL_JAM_MAX_UNROLL): Ditto.
* passes.def: Add pass_loop_jam.
* timevar.def (TV_LOOP_JAM): Add.
* tree-pass.h (make_pass_loop_jam): Declare.
* cfgloop.c (flow_loop_tree_node_add): Add AT argument.
* cfgloop.h (flow_loop_tree_node_add): Adjust declaration.
* cfgloopmanip.c (duplicate_loop): Add AT argument, adjust call
to flow_loop_tree_node_add.
(duplicate_subloops, copy_loops_to): Append to sibling list.
* cfgloopmanip.h: (duplicate_loop): Adjust declaration.
* doc/invoke.texi (-funroll-and-jam): Document new option.
(unroll-jam-min-percent, unroll-jam-max-unroll): Document new params.
2017-12-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/83296
PR tree-optimization/67769
* tree-ssa-phiopt.c (conditional_replacement): Do not reset
flow sensitive info in an unrelated BB.
(value_replacement): Use reset_flow_sensitive_info.
(minmax_replacement): Reset flow sensitive info on the def
we move. Do not reset flow sensitive info in the whole BB
we move the stmt to.
(abs_replacement): Likewise.
2017-12-07 Segher Boessenkool <segher@kernel.crashing.org>
PR target/43871
* config/rs6000/rs6000.c (rs6000_option_override_internal): Set
rs6000_cpu to the given -mcpu=, or to the default processor.
2017-12-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.h (rs6000_cpu_attr): Delete.
* config/rs6000/rs6000.c (rs6000_variable_issue_1): Use rs6000_tune
instead of rs6000_cpu_attr.
(rs6000_adjust_cost): Ditto.
(is_microcoded_insn): Ditto.
(rs6000_adjust_priority): Ditto.
(rs6000_issue_rate): Ditto.
(rs6000_use_sched_lookahead): Ditto.
(rs6000_use_sched_lookahead_guard): Ditto.
(rs6000_sched_reorder): Ditto.
(force_new_group): Ditto.
* config/rs6000/rs6000.md (cpu attribute): Ditto.
(group_ending_nop): Ditto.
2017-12-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.opt (rs6000_tune): New variable.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Also set
rs6000_tune. Use rs6000_tune instead of rs6000_cpu where appropriate.
(rs6000_loop_align): Use rs6000_tune instead of rs6000_cpu where
appropriate.
(rs6000_reassociation_width): Ditto.
(rs6000_emit_epilogue): Ditto.
(rs6000_adjust_cost): Ditto.
(is_microcoded_insn): Ditto.
(is_cracked_insn): Ditto.
(rs6000_adjust_priority): Ditto.
(rs6000_sched_reorder): Ditto.
(rs6000_sched_reorder2): Ditto.
(insn_must_be_first_in_group): Ditto.
(insn_must_be_last_in_group): Ditto.
(rs6000_register_move_cost): Ditto.
* config/rs6000/rs6000.h (rs6000_cpu_attr): Use rs6000_tune instead of
rs6000_cpu.
2017-12-07 Julia Koval <julia.koval@intel.com>
* config.gcc: Add vaesintrin.h.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI_V64QI):
New type.
* config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
__builtin_ia32_vaesdec_v32qi, __builtin_ia32_vaesdec_v64qi):
New builtins.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new type.
* config/i386/immintrin.h: Include vaesintrin.h.
* config/i386/sse.md (vaesdec_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesdec_epi128, _mm512_aesdec_epi128,
_mm_aesdec_epi128): New intrinsics.
2017-12-06 David Malcolm <dmalcolm@redhat.com>
* Makefile.in (C_COMMON_OBJS): Add c-family/c-spellcheck.o.
* spellcheck-tree.c (find_closest_macro_cpp_cb): Move to
c-family/c-spellcheck.cc.
(best_macro_match::best_macro_match): Likewise.
* spellcheck-tree.h
(struct edit_distance_traits<cpp_hashnode *>): Move to
c-family/c-spellcheck.h.
(class best_macro_match): Likewise.
2017-12-06 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/83293
* gimple-ssa-strength-reduction.c (insert_initializers): Use
GSI_NEW_STMT instead of GSI_SAME_STMT in gsi_insert_after that
might insert into empty bb.
PR sanitizer/81281
* match.pd ((T)(P + A) - (T)P -> (T) A): Split into separate
simplify for plus with :c added, and pointer_plus without that.
((T)P - (T)(P + A) -> -(T) A): Likewise. If type is integral
with undefined overflow and the conversion is not widening,
perform negation in utype and only convert to type afterwards.
((T)(P + A) - (T)(P + B) -> (T)A - (T)B): Split into separate
simplify for plus with :c added, and pointer_plus without that.
If type is integral with undefined overflow and the conversion is
not widening, perform minus in utype and only convert to type
afterwards. Move the last pointer_diff_expr simplify into the
two outermost ifs.
2017-12-06 Martin Sebor <msebor@redhat.com>
PR tree-optimization/82646
* builtins.c (maybe_emit_chk_warning): Use size as the bound for
strncpy, not maxlen.
2017-12-06 Martin Sebor <msebor@redhat.com>
* doc/invoke.texi (-Wstringop-truncation): Mention attribute
nonstring.
PR tree-optimization/83075
* tree-ssa-strlen.c (handle_builtin_stxncpy): Avoid assuming
strncat/strncpy don't change length of source string.
2017-12-06 Eric Botcazou <ebotcazou@adacore.com>
Revert
2017-11-29 Martin Aberg <maberg@gaisler.com>
* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
to prevent b2bst errata sequence.
(sqrtdf2_fix): Likewise.
2017-12-06 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/81945
* cfgloop.h (FOR_EACH_LOOP_FN): Use FN instead of hardcoding fn.
* tree-cfg.c (move_sese_region_to_fn): If any of the loops moved
to dest_cfun has orig_loop_num set, either remap it to the new
loop number if the loop got moved too, or clear it.
2017-12-05 Steve Ellcey <sellcey@cavium.com>
* config/aarch64/thunderx2-t99.md (thunderx2t99_branch): Add trap
to reservation.
(thunderx2t99_nothing): New insn reservation.
(thunderx2t99_mrs): New insn reservation.
(thunderx2t99_multiple): New insn reservation.
(thunderx2t99_alu_basi): Add bfx to reservation.
(thunderx2t99_fp_cmp): Add fccmps and fccmpd to reservation.
2017-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/82248
* config/arm/arm.md (probe_stack) : Use the 'o' constraint.
2017-12-05 Bin Cheng <bin.cheng@arm.com>