)]}'
{
  "commit": "3df2db36d43f8c35dc02b5bafd6e5b2f3c7dc787",
  "tree": "4ec3ff35e8a0393177183e19f30ce9f25499db0b",
  "parents": [
    "d701ec2460d2b45511ca41af13d8f634751de587"
  ],
  "author": {
    "name": "Zhongyao Chen",
    "email": "chen.zhongyao@zte.com.cn",
    "time": "Fri Jun 12 11:59:56 2026 +0800"
  },
  "committer": {
    "name": "Zhongyao Chen",
    "email": "chen.zhongyao@zte.com.cn",
    "time": "Tue Jun 16 01:20:15 2026 +0000"
  },
  "message": "RISC-V: Adjust testcase asm check for vx-[5|6]-i[8|16].c\n\nAfter commit 9f8409f2e2c, SLP discovery can retry swapped operands for\ncommutative parents before falling back to an external scalar.\nThese tests can be vectorized again, so update asm check.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Expect vadd.vx,\n\tvmul.vx, vsadd.vx and vssub.vx.\n\t* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Likewise.\n\t* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Likewise.\n\t* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Likewise.\n\nSigned-off-by: Zhongyao Chen \u003cchen.zhongyao@zte.com.cn\u003e\n",
  "tree_diff": [
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}