| # CPU, FPU and architecture specifications for ARM. |
| # |
| # Copyright (C) 2011-2021 Free Software Foundation, Inc. |
| # |
| # This file is part of GCC. |
| # |
| # GCC is free software; you can redistribute it and/or modify it under |
| # the terms of the GNU General Public License as published by the Free |
| # Software Foundation; either version 3, or (at your option) any later |
| # version. |
| # |
| # GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
| # WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| # for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with GCC; see the file COPYING3. If not see |
| # <http://www.gnu.org/licenses/>. |
| |
| # This file describes all the various CPUs, FPUs and architectures supported |
| # by the compiler. It is pre-processed by parsecpu.awk for a number of |
| # purposes. |
| # |
| # The general form is a sequence of begin..end blocks with the following |
| # syntax: |
| # begin <object-type> <name> |
| # attribute-statement* |
| # end <object-type> <name> |
| # |
| # where object type is one of "cpu" "arch" "fpu". Each object type has |
| # a specific set of permitted attributes, some of which are optional; further |
| # details can be found below. |
| # |
| # Some objects cross-reference other objects by name. Objects are permitted |
| # in any order and it is not necessary to place a cross-referenced object |
| # earlier in the file. |
| # |
| # The object names for cpu, arch and fpu objects are used for the public option |
| # names in the final compiler. The order within each group is preserved and |
| # forms the order for the list within the compiler. |
| |
| # Most objects in this file support forward references. The major |
| # exception is feature groups, which may only refer to previously |
| # defined features or feature groups. This is done to avoid the risk |
| # of feature groups recursively referencing each other and causing |
| # the parser to hang. |
| |
| # Features - general convention: all lower case. |
| |
| # Architecture rel 4 |
| define feature armv4 |
| |
| # Thumb aware. |
| define feature thumb |
| |
| # Architecture rel 5t. |
| define feature armv5t |
| |
| # Architecture rel 5te. |
| define feature armv5te |
| |
| # XScale. |
| define feature xscale |
| |
| # Architecture rel 6. |
| define feature armv6 |
| |
| # Architecture rel 6k. |
| define feature armv6k |
| |
| # Thumb-2. |
| define feature thumb2 |
| |
| # Instructions not present in 'M' profile. |
| define feature notm |
| |
| # Architecture uses be8 mode in big-endian. |
| define feature be8 |
| |
| # Thumb division instructions. |
| define feature tdiv |
| |
| # Architecture rel 7e-m. |
| define feature armv7em |
| |
| # Architecture rel 7. |
| define feature armv7 |
| |
| # MP extension to ArmV7-A |
| define feature mp |
| |
| # SEC extension to ArmV7-A |
| define feature sec |
| |
| # ARM division instructions. |
| define feature adiv |
| |
| # Architecture rel 8. |
| define feature armv8 |
| |
| # ARMv8 CRC32 instructions. |
| define feature crc32 |
| |
| # XScale v2 (Wireless MMX). |
| define feature iwmmxt |
| |
| # XScale Wireless MMX2. |
| define feature iwmmxt2 |
| |
| # Architecture rel 8.1. |
| define feature armv8_1 |
| |
| # Architecture rel 8.2. |
| define feature armv8_2 |
| |
| # Architecture rel 8.3. |
| define feature armv8_3 |
| |
| # Architecture rel 8.4. |
| define feature armv8_4 |
| |
| # Architecture rel 8.5. |
| define feature armv8_5 |
| |
| # Architecture rel 8.6. |
| define feature armv8_6 |
| |
| # M-Profile security extensions. |
| define feature cmse |
| |
| # Architecture rel 8.1-M. |
| define feature armv8_1m_main |
| |
| # Floating point and Neon extensions. |
| # VFPv1 is not supported in GCC. |
| |
| # Vector floating point v2. |
| define feature vfpv2 |
| |
| # Vector floating point v3. |
| define feature vfpv3 |
| |
| # Vector floating point v4. |
| define feature vfpv4 |
| |
| # Floating point v5. |
| define feature fpv5 |
| |
| # ARMv7-A LPAE. |
| define feature lpae |
| |
| # Advanced SIMD instructions. |
| define feature neon |
| |
| # Conversions to/from fp16 (VFPv3 extension). |
| define feature fp16conv |
| |
| # Double precision operations supported. |
| define feature fp_dbl |
| |
| # 32 Double precision registers. |
| define feature fp_d32 |
| |
| # Crypto extension to ARMv8. |
| define feature crypto |
| |
| # FP16 data processing (half-precision float). |
| define feature fp16 |
| |
| # Dot Product instructions extension to ARMv8.2-a. |
| define feature dotprod |
| |
| # Half-precision floating-point instructions in ARMv8.4-A. |
| define feature fp16fml |
| |
| # ISA Quirks (errata?). Don't forget to add this to the fgroup |
| # ALL_QUIRKS below. |
| |
| # No volatile memory in IT blocks. |
| define feature quirk_no_volatile_ce |
| |
| # Previously mis-identified by GCC. |
| define feature quirk_armv6kz |
| |
| # Cortex-M3 LDRD quirk. |
| define feature quirk_cm3_ldrd |
| |
| # v8-m/v8.1-m VLLDM errata. |
| define feature quirk_vlldm |
| |
| # Don't use .cpu assembly directive |
| define feature quirk_no_asmcpu |
| |
| # (Very) slow multiply operations. Should probably be a tuning bit. |
| define feature smallmul |
| |
| # Speculation Barrier Instruction for v8-A architectures, added by |
| # default to v8.5-A |
| define feature sb |
| |
| # Execution and Data Prediction Restriction Instruction for |
| # v8-A architectures, added by default from v8.5-A |
| define feature predres |
| |
| # M-profile Vector Extension feature bits |
| define feature mve |
| define feature mve_float |
| |
| # 8-bit Integer Matrix Multiply extension. Optional from v8.2-A. |
| define feature i8mm |
| |
| # Brain half-precision floating-point extension. Optional from v8.2-A. |
| define feature bf16 |
| |
| # Arm Custom Datapath Extension (CDE). |
| define feature cdecp0 |
| define feature cdecp1 |
| define feature cdecp2 |
| define feature cdecp3 |
| define feature cdecp4 |
| define feature cdecp5 |
| define feature cdecp6 |
| define feature cdecp7 |
| |
| # Feature groups. Conventionally all (or mostly) upper case. |
| # ALL_FPU lists all the feature bits associated with the floating-point |
| # unit; these will all be removed if the floating-point unit is disabled |
| # (eg -mfloat-abi=soft). ALL_FPU_INTERNAL must ONLY contain features that |
| # form part of a named -mfpu option; it is used to map the capabilities |
| # back to a named FPU for the benefit of the assembler. |
| # |
| # ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the |
| # construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD |
| # extensions that are either part of a named FPU or optional extensions |
| # respectively. |
| |
| |
| # List of all cryptographic extensions to stripout if crypto is |
| # disabled. Currently, that's trivial, but we define it anyway for |
| # consistency with the SIMD and FP disable lists. |
| define fgroup ALL_CRYPTO crypto |
| |
| # List of all SIMD bits to strip out if SIMD is disabled. This does |
| # strip off 32 D-registers, but does not remove support for |
| # double-precision FP. |
| define fgroup ALL_SIMD_INTERNAL fp_d32 neon ALL_CRYPTO |
| define fgroup ALL_SIMD_EXTERNAL dotprod fp16fml i8mm |
| define fgroup ALL_SIMD ALL_SIMD_INTERNAL ALL_SIMD_EXTERNAL |
| |
| # List of all FPU bits to strip out if -mfpu is used to override the |
| # default. fp16 is deliberately missing from this list. |
| define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL |
| # Similarly, but including fp16 and other extensions that aren't part of |
| # -mfpu support. |
| define fgroup ALL_FPU_EXTERNAL fp16 bf16 |
| |
| # Everything related to the FPU extensions (FP or SIMD). |
| define fgroup ALL_FP ALL_FPU_EXTERNAL ALL_FPU_INTERNAL ALL_SIMD |
| |
| define fgroup ARMv4 armv4 notm |
| define fgroup ARMv4t ARMv4 thumb |
| define fgroup ARMv5t ARMv4t armv5t |
| define fgroup ARMv5te ARMv5t armv5te |
| define fgroup ARMv5tej ARMv5te |
| define fgroup ARMv6 ARMv5te armv6 be8 |
| define fgroup ARMv6j ARMv6 |
| define fgroup ARMv6k ARMv6 armv6k |
| define fgroup ARMv6z ARMv6 |
| define fgroup ARMv6kz ARMv6k quirk_armv6kz |
| define fgroup ARMv6zk ARMv6k |
| define fgroup ARMv6t2 ARMv6 thumb2 |
| # This is suspect. ARMv6-m doesn't really pull in any useful features |
| # from ARMv5* or ARMv6. |
| define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8 |
| # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and |
| # integer SIMD instructions that are in ARMv6T2. */ |
| define fgroup ARMv7 ARMv6m thumb2 armv7 |
| |
| define fgroup ARMv7a ARMv7 notm armv6k |
| define fgroup ARMv7ve ARMv7a adiv tdiv lpae mp sec |
| define fgroup ARMv7r ARMv7a tdiv |
| define fgroup ARMv7m ARMv7 tdiv |
| define fgroup ARMv7em ARMv7m armv7em |
| define fgroup ARMv8a ARMv7ve armv8 |
| define fgroup ARMv8_1a ARMv8a crc32 armv8_1 |
| define fgroup ARMv8_2a ARMv8_1a armv8_2 |
| define fgroup ARMv8_3a ARMv8_2a armv8_3 |
| define fgroup ARMv8_4a ARMv8_3a armv8_4 |
| define fgroup ARMv8_5a ARMv8_4a armv8_5 sb predres |
| define fgroup ARMv8_6a ARMv8_5a armv8_6 |
| define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv |
| define fgroup ARMv8m_main ARMv7m armv8 cmse |
| define fgroup ARMv8r ARMv8a |
| define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main |
| |
| # Useful combinations. |
| define fgroup VFPv2 vfpv2 |
| define fgroup VFPv3 VFPv2 vfpv3 |
| define fgroup VFPv4 VFPv3 vfpv4 fp16conv |
| define fgroup FPv5 VFPv4 fpv5 |
| define fgroup MVE mve armv7em |
| define fgroup MVE_FP MVE FPv5 fp16 mve_float |
| |
| define fgroup FP_DBL fp_dbl |
| define fgroup FP_D32 FP_DBL fp_d32 |
| define fgroup FP_ARMv8 FPv5 FP_D32 |
| define fgroup NEON FP_D32 neon |
| define fgroup CRYPTO NEON crypto |
| define fgroup DOTPROD NEON dotprod |
| |
| # Implied feature bits. These are for non-named features shared between fgroups. |
| # Shared feature f belonging to fgroups A and B will be erroneously removed if: |
| # A and B are enabled by default AND A is disabled by a removal flag. |
| # To ensure that f is retained, we must add such bits to the ISA after |
| # processing the removal flags. This is implemented by 'implied bits': |
| # define implied <name> [<feature-or-fgroup>]+ |
| # This indicates that, if any of the listed features are enabled, or if any |
| # member of a listed fgroup is enabled, then <name> will be implicitly enabled. |
| |
| # Enabled for all VFP, MVE and MVE with floating point extensions. |
| define implied vfp_base MVE MVE_FP ALL_FP |
| |
| # List of all quirk bits to strip out when comparing CPU features with |
| # architectures. |
| # xscale isn't really a 'quirk', but it isn't an architecture either and we |
| # need to ignore it for matching purposes. |
| define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd quirk_vlldm xscale quirk_no_asmcpu |
| |
| define fgroup IGNORE_FOR_MULTILIB cdecp0 cdecp1 cdecp2 cdecp3 cdecp4 cdecp5 cdecp6 cdecp7 |
| |
| # Architecture entries |
| # format: |
| # begin arch <name> |
| # tune for <cpu> |
| # [tune flags <list>] |
| # base <name> |
| # [profile <A|R|M>] |
| # isa <isa-flags-list> |
| # end arch <name> |
| # |
| |
| begin arch armv4 |
| tune for arm7tdmi |
| tune flags CO_PROC |
| base 4 |
| isa ARMv4 |
| end arch armv4 |
| |
| begin arch armv4t |
| tune for arm7tdmi |
| tune flags CO_PROC |
| base 4T |
| isa ARMv4t |
| end arch armv4t |
| |
| begin arch armv5t |
| tune for arm10tdmi |
| tune flags CO_PROC |
| base 5T |
| isa ARMv5t |
| end arch armv5t |
| |
| begin arch armv5te |
| tune for arm1026ej-s |
| tune flags CO_PROC |
| base 5TE |
| isa ARMv5te |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv5te |
| |
| begin arch armv5tej |
| tune for arm1026ej-s |
| tune flags CO_PROC |
| base 5TEJ |
| isa ARMv5tej |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv5tej |
| |
| begin arch armv6 |
| tune for arm1136j-s |
| tune flags CO_PROC |
| base 6 |
| isa ARMv6 |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6 |
| |
| begin arch armv6j |
| tune for arm1136j-s |
| tune flags CO_PROC |
| base 6J |
| isa ARMv6j |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6j |
| |
| begin arch armv6k |
| tune for mpcore |
| tune flags CO_PROC |
| base 6K |
| isa ARMv6k |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6k |
| |
| begin arch armv6z |
| tune for arm1176jz-s |
| tune flags CO_PROC |
| base 6Z |
| isa ARMv6z |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6z |
| |
| begin arch armv6kz |
| tune for arm1176jz-s |
| tune flags CO_PROC |
| base 6KZ |
| isa ARMv6kz |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6kz |
| |
| begin arch armv6zk |
| tune for arm1176jz-s |
| tune flags CO_PROC |
| base 6KZ |
| isa ARMv6kz |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6zk |
| |
| begin arch armv6t2 |
| tune for arm1156t2-s |
| tune flags CO_PROC |
| base 6T2 |
| isa ARMv6t2 |
| option fp add VFPv2 FP_DBL |
| optalias vfpv2 fp |
| option nofp remove ALL_FP |
| end arch armv6t2 |
| |
| begin arch armv6-m |
| tune for cortex-m1 |
| base 6M |
| profile M |
| isa ARMv6m |
| end arch armv6-m |
| |
| # This is now equivalent to armv6-m, but we keep it because some |
| # versions of GAS still distinguish between the two. |
| begin arch armv6s-m |
| tune for cortex-m1 |
| base 6M |
| profile M |
| isa ARMv6m |
| end arch armv6s-m |
| |
| begin arch armv7 |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 7 |
| isa ARMv7 |
| # fp => VFPv3-d16 (only useful for the A+R profile subset). |
| option fp add VFPv3 FP_DBL |
| optalias vfpv3-d16 fp |
| option nofp remove ALL_FP |
| end arch armv7 |
| |
| begin arch armv7-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 7A |
| profile A |
| isa ARMv7a |
| option mp add mp |
| option sec add sec |
| # fp => VFPv3-d16, simd => neon-vfpv3 |
| option fp add VFPv3 FP_DBL |
| optalias vfpv3-d16 fp |
| option vfpv3 add VFPv3 FP_D32 |
| option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv |
| option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv |
| option vfpv4-d16 add VFPv4 FP_DBL |
| option vfpv4 add VFPv4 FP_D32 |
| option simd add VFPv3 NEON |
| optalias neon simd |
| optalias neon-vfpv3 simd |
| option neon-fp16 add VFPv3 NEON fp16conv |
| option neon-vfpv4 add VFPv4 NEON |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| end arch armv7-a |
| |
| begin arch armv7ve |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 7A |
| profile A |
| isa ARMv7ve |
| # fp => VFPv4-d16, simd => neon-vfpv4 |
| option vfpv3-d16 add VFPv3 FP_DBL |
| option vfpv3 add VFPv3 FP_D32 |
| option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv |
| option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv |
| option fp add VFPv4 FP_DBL |
| optalias vfpv4-d16 fp |
| option vfpv4 add VFPv4 FP_D32 |
| option neon add VFPv3 NEON |
| optalias neon-vfpv3 neon |
| option neon-fp16 add VFPv3 NEON fp16conv |
| option simd add VFPv4 NEON |
| optalias neon-vfpv4 simd |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| end arch armv7ve |
| |
| begin arch armv7-r |
| tune for cortex-r4 |
| tune flags CO_PROC |
| base 7R |
| profile R |
| isa ARMv7r |
| # ARMv7-r uses VFPv3-d16 |
| option fp.sp add VFPv3 |
| optalias vfpv3xd fp.sp |
| option fp add VFPv3 FP_DBL |
| optalias vfpv3-d16 fp |
| option vfpv3xd-fp16 add VFPv3 fp16conv |
| option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv |
| option idiv add adiv |
| option nofp remove ALL_FP |
| option noidiv remove adiv |
| end arch armv7-r |
| |
| begin arch armv7-m |
| tune for cortex-m3 |
| tune flags CO_PROC |
| base 7M |
| profile M |
| isa ARMv7m |
| # In theory FP is permitted in v7-m, but in practice no implementations exist. |
| # leave it out for now. |
| end arch armv7-m |
| |
| begin arch armv7e-m |
| tune for cortex-m4 |
| tune flags CO_PROC |
| base 7EM |
| profile M |
| isa ARMv7em |
| # fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16 |
| option fp add VFPv4 |
| optalias vfpv4-sp-d16 fp |
| option fpv5 add FPv5 |
| option fp.dp add FPv5 FP_DBL |
| optalias fpv5-d16 fp.dp |
| option nofp remove ALL_FP |
| end arch armv7e-m |
| |
| begin arch armv8-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8a |
| option crc add crc32 |
| option simd add FP_ARMv8 NEON |
| option crypto add FP_ARMv8 CRYPTO |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option sb add sb |
| option predres add predres |
| end arch armv8-a |
| |
| begin arch armv8.1-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_1a |
| option simd add FP_ARMv8 NEON |
| option crypto add FP_ARMv8 CRYPTO |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option sb add sb |
| option predres add predres |
| end arch armv8.1-a |
| |
| begin arch armv8.2-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_2a |
| option simd add FP_ARMv8 NEON |
| option fp16 add fp16 FP_ARMv8 NEON |
| option fp16fml add fp16fml fp16 FP_ARMv8 NEON |
| option crypto add FP_ARMv8 CRYPTO |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option dotprod add FP_ARMv8 DOTPROD |
| option sb add sb |
| option predres add predres |
| option i8mm add i8mm FP_ARMv8 NEON |
| option bf16 add bf16 FP_ARMv8 NEON |
| end arch armv8.2-a |
| |
| begin arch armv8.3-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_3a |
| option simd add FP_ARMv8 NEON |
| option fp16 add fp16 FP_ARMv8 NEON |
| option fp16fml add fp16fml fp16 FP_ARMv8 NEON |
| option crypto add FP_ARMv8 CRYPTO |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option dotprod add FP_ARMv8 DOTPROD |
| option sb add sb |
| option predres add predres |
| option i8mm add i8mm FP_ARMv8 NEON |
| option bf16 add bf16 FP_ARMv8 NEON |
| end arch armv8.3-a |
| |
| begin arch armv8.4-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_4a |
| option simd add FP_ARMv8 DOTPROD |
| option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD |
| option crypto add FP_ARMv8 CRYPTO DOTPROD |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option sb add sb |
| option predres add predres |
| option i8mm add i8mm FP_ARMv8 DOTPROD |
| option bf16 add bf16 FP_ARMv8 DOTPROD |
| end arch armv8.4-a |
| |
| begin arch armv8.5-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_5a |
| option simd add FP_ARMv8 DOTPROD |
| option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD |
| option crypto add FP_ARMv8 CRYPTO DOTPROD |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option i8mm add i8mm FP_ARMv8 DOTPROD |
| option bf16 add bf16 FP_ARMv8 DOTPROD |
| end arch armv8.5-a |
| |
| begin arch armv8.6-a |
| tune for cortex-a53 |
| tune flags CO_PROC |
| base 8A |
| profile A |
| isa ARMv8_6a |
| option simd add FP_ARMv8 DOTPROD |
| option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD |
| option crypto add FP_ARMv8 CRYPTO DOTPROD |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| option i8mm add i8mm FP_ARMv8 DOTPROD |
| option bf16 add bf16 FP_ARMv8 DOTPROD |
| end arch armv8.6-a |
| |
| begin arch armv8-m.base |
| tune for cortex-m23 |
| base 8M_BASE |
| profile M |
| isa ARMv8m_base |
| end arch armv8-m.base |
| |
| begin arch armv8-m.main |
| tune for cortex-m7 |
| tune flags CO_PROC |
| base 8M_MAIN |
| profile M |
| isa ARMv8m_main |
| option dsp add armv7em |
| # fp => FPv5-sp-d16; fp.dp => FPv5-d16 |
| option fp add FPv5 |
| option fp.dp add FPv5 FP_DBL |
| option nofp remove ALL_FP |
| option nodsp remove armv7em |
| option cdecp0 add cdecp0 |
| option cdecp1 add cdecp1 |
| option cdecp2 add cdecp2 |
| option cdecp3 add cdecp3 |
| option cdecp4 add cdecp4 |
| option cdecp5 add cdecp5 |
| option cdecp6 add cdecp6 |
| option cdecp7 add cdecp7 |
| end arch armv8-m.main |
| |
| begin arch armv8-r |
| tune for cortex-r52 |
| tune flags CO_PROC |
| base 8R |
| profile R |
| isa ARMv8r |
| option crc add crc32 |
| # fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision |
| # note: no fp option for fp-armv8 (d16) + double precision at the moment |
| option fp.sp add FPv5 |
| option simd add FP_ARMv8 NEON |
| option crypto add FP_ARMv8 CRYPTO |
| option nocrypto remove ALL_CRYPTO |
| option nofp remove ALL_FP |
| end arch armv8-r |
| |
| begin arch armv8.1-m.main |
| tune for cortex-m55 |
| tune flags CO_PROC |
| base 8M_MAIN |
| profile M |
| isa ARMv8_1m_main |
| # fp => FPv5-sp-d16; fp.dp => FPv5-d16 |
| option dsp add armv7em |
| option fp add FPv5 fp16 |
| option fp.dp add FPv5 FP_DBL fp16 |
| option nofp remove ALL_FP |
| option mve add MVE |
| option mve.fp add MVE_FP |
| option cdecp0 add cdecp0 |
| option cdecp1 add cdecp1 |
| option cdecp2 add cdecp2 |
| option cdecp3 add cdecp3 |
| option cdecp4 add cdecp4 |
| option cdecp5 add cdecp5 |
| option cdecp6 add cdecp6 |
| option cdecp7 add cdecp7 |
| end arch armv8.1-m.main |
| |
| begin arch iwmmxt |
| tune for iwmmxt |
| tune flags LDSCHED STRONG XSCALE |
| base 5TE |
| isa ARMv5te xscale iwmmxt |
| end arch iwmmxt |
| |
| begin arch iwmmxt2 |
| tune for iwmmxt2 |
| tune flags LDSCHED STRONG XSCALE |
| base 5TE |
| isa ARMv5te xscale iwmmxt iwmmxt2 |
| end arch iwmmxt2 |
| |
| # CPU entries |
| # format: |
| # begin cpu <name> |
| # [cname <c-compatible-name>] |
| # [alias <name>+] |
| # [tune for <cpu-name>] |
| # [tune flags <list>] |
| # architecture <name> |
| # [isa <additional-isa-flags-list>] |
| # [option <name> add|remove <isa-list>]* |
| # [optalias <name> <optname>]* |
| # [costs <name>] |
| # [vendor <vendor-id> |
| # [part <part-id> [minrev [maxrev]]] |
| # end cpu <name> |
| # |
| # If omitted, cname is formed from transforming the cpuname to convert |
| # non-valid punctuation characters to '_'. |
| # Any number of alias names may be specified for a CPU. If the name starts |
| # with a '!' then it will be recognized as a valid name, but will not |
| # be printed in any help text listing permitted CPUs. |
| # If specified, tune for specifies a CPU target to use for tuning this core. |
| # isa flags are appended to those defined by the architecture. |
| # Each add option must have a distinct feature set and each remove |
| # option must similarly have a distinct feature set. Option aliases can be |
| # added with the optalias statement. |
| # Vendor, part and revision information is used for native CPU and architecture |
| # detection. All values must be in hex (lower case) with the leading '0x' |
| # omitted. For example the cortex-a9 will have vendor 41 and part c09. |
| # Revision information is used to match a subrange of part |
| # revisions: minrev <= detected <= maxrev. |
| # If a minrev or maxrev are omitted then minrev defaults to zero and maxrev |
| # to infinity. |
| # Revision information is not implemented yet; no part uses it. |
| |
| # V4 Architecture Processors |
| begin cpu arm8 |
| tune flags LDSCHED |
| architecture armv4 |
| costs fastmul |
| end cpu arm8 |
| |
| begin cpu arm810 |
| tune flags LDSCHED |
| architecture armv4 |
| costs fastmul |
| end cpu arm810 |
| |
| begin cpu strongarm |
| alias strongarm110 !strongarm1100 !strongarm1110 |
| tune flags LDSCHED STRONG |
| architecture armv4 |
| costs strongarm |
| end cpu strongarm |
| |
| begin cpu fa526 |
| tune flags LDSCHED |
| architecture armv4 |
| costs fastmul |
| end cpu fa526 |
| |
| begin cpu fa626 |
| tune flags LDSCHED |
| architecture armv4 |
| costs fastmul |
| end cpu fa626 |
| |
| |
| # V4T Architecture Processors |
| begin cpu arm7tdmi |
| alias arm7tdmi-s |
| tune flags CO_PROC |
| architecture armv4t |
| costs fastmul |
| end cpu arm7tdmi |
| |
| begin cpu arm710t |
| alias arm720t arm740t |
| tune flags WBUF |
| architecture armv4t |
| costs fastmul |
| end cpu arm710t |
| |
| begin cpu arm9 |
| tune flags LDSCHED |
| architecture armv4t |
| costs fastmul |
| end cpu arm9 |
| |
| begin cpu arm9tdmi |
| tune flags LDSCHED |
| architecture armv4t |
| costs fastmul |
| end cpu arm9tdmi |
| |
| begin cpu arm920t |
| alias arm920 arm922t arm940t ep9312 |
| tune flags LDSCHED |
| architecture armv4t |
| costs fastmul |
| end cpu arm920t |
| |
| |
| # V5T Architecture Processors |
| # These used VFPv1 which isn't supported by GCC |
| begin cpu arm10tdmi |
| alias arm1020t |
| tune flags LDSCHED |
| architecture armv5t |
| costs fastmul |
| end cpu arm10tdmi |
| |
| |
| # V5TE Architecture Processors |
| begin cpu arm9e |
| alias arm946e-s arm966e-s arm968e-s |
| tune flags LDSCHED |
| architecture armv5te+fp |
| option nofp remove ALL_FP |
| costs 9e |
| end cpu arm9e |
| |
| begin cpu arm10e |
| alias arm1020e arm1022e |
| tune flags LDSCHED |
| architecture armv5te+fp |
| option nofp remove ALL_FP |
| costs fastmul |
| end cpu arm10e |
| |
| begin cpu xscale |
| tune flags LDSCHED XSCALE |
| architecture armv5te |
| isa xscale |
| costs xscale |
| end cpu xscale |
| |
| begin cpu iwmmxt |
| tune flags LDSCHED XSCALE |
| architecture iwmmxt |
| costs xscale |
| end cpu iwmmxt |
| |
| begin cpu iwmmxt2 |
| tune flags LDSCHED XSCALE |
| architecture iwmmxt2 |
| costs xscale |
| end cpu iwmmxt2 |
| |
| begin cpu fa606te |
| tune flags LDSCHED |
| architecture armv5te |
| costs 9e |
| end cpu fa606te |
| |
| begin cpu fa626te |
| tune flags LDSCHED |
| architecture armv5te |
| costs 9e |
| end cpu fa626te |
| |
| begin cpu fmp626 |
| tune flags LDSCHED |
| architecture armv5te |
| costs 9e |
| end cpu fmp626 |
| |
| begin cpu fa726te |
| tune flags LDSCHED |
| architecture armv5te |
| costs fa726te |
| end cpu fa726te |
| |
| |
| # V5TEJ Architecture Processors |
| begin cpu arm926ej-s |
| cname arm926ejs |
| tune flags LDSCHED |
| architecture armv5tej+fp |
| option nofp remove ALL_FP |
| costs 9e |
| vendor 41 |
| part 926 |
| end cpu arm926ej-s |
| |
| begin cpu arm1026ej-s |
| cname arm1026ejs |
| tune flags LDSCHED |
| architecture armv5tej+fp |
| option nofp remove ALL_FP |
| costs 9e |
| vendor 41 |
| part a26 |
| end cpu arm1026ej-s |
| |
| |
| # V6 Architecture Processors |
| begin cpu arm1136j-s |
| cname arm1136js |
| tune flags LDSCHED |
| architecture armv6j |
| costs 9e |
| end cpu arm1136j-s |
| |
| begin cpu arm1136jf-s |
| cname arm1136jfs |
| tune flags LDSCHED |
| architecture armv6j+fp |
| costs 9e |
| vendor 41 |
| part b36 |
| end cpu arm1136jf-s |
| |
| begin cpu arm1176jz-s |
| cname arm1176jzs |
| tune flags LDSCHED |
| architecture armv6kz |
| costs 9e |
| end cpu arm1176jz-s |
| |
| begin cpu arm1176jzf-s |
| cname arm1176jzfs |
| tune flags LDSCHED |
| architecture armv6kz+fp |
| costs 9e |
| vendor 41 |
| part b76 |
| end cpu arm1176jzf-s |
| |
| begin cpu mpcorenovfp |
| tune flags LDSCHED |
| architecture armv6k |
| costs 9e |
| end cpu mpcorenovfp |
| |
| begin cpu mpcore |
| tune flags LDSCHED |
| architecture armv6k+fp |
| costs 9e |
| vendor 41 |
| part b02 |
| end cpu mpcore |
| |
| begin cpu arm1156t2-s |
| cname arm1156t2s |
| tune flags LDSCHED |
| architecture armv6t2 |
| costs v6t2 |
| end cpu arm1156t2-s |
| |
| begin cpu arm1156t2f-s |
| cname arm1156t2fs |
| tune flags LDSCHED |
| architecture armv6t2+fp |
| costs v6t2 |
| vendor 41 |
| part b56 |
| end cpu arm1156t2f-s |
| |
| |
| # V6M Architecture Processors |
| begin cpu cortex-m1 |
| cname cortexm1 |
| tune flags LDSCHED |
| architecture armv6s-m |
| costs v6m |
| vendor 41 |
| part c21 |
| end cpu cortex-m1 |
| |
| begin cpu cortex-m0 |
| cname cortexm0 |
| tune flags LDSCHED |
| architecture armv6s-m |
| costs v6m |
| vendor 41 |
| part c20 |
| end cpu cortex-m0 |
| |
| begin cpu cortex-m0plus |
| cname cortexm0plus |
| tune flags LDSCHED |
| architecture armv6s-m |
| costs v6m |
| end cpu cortex-m0plus |
| |
| |
| # V6M Architecture Processors for small-multiply implementations. |
| begin cpu cortex-m1.small-multiply |
| cname cortexm1smallmultiply |
| tune for cortex-m1 |
| tune flags LDSCHED SMALLMUL |
| architecture armv6s-m |
| costs v6m |
| end cpu cortex-m1.small-multiply |
| |
| begin cpu cortex-m0.small-multiply |
| cname cortexm0smallmultiply |
| tune for cortex-m0 |
| tune flags LDSCHED SMALLMUL |
| architecture armv6s-m |
| costs v6m |
| end cpu cortex-m0.small-multiply |
| |
| begin cpu cortex-m0plus.small-multiply |
| cname cortexm0plussmallmultiply |
| tune for cortex-m0plus |
| tune flags LDSCHED SMALLMUL |
| architecture armv6s-m |
| costs v6m |
| end cpu cortex-m0plus.small-multiply |
| |
| |
| # V7 Architecture Processors |
| begin cpu generic-armv7-a |
| cname genericv7a |
| tune flags LDSCHED |
| architecture armv7-a+fp |
| isa quirk_no_asmcpu |
| option mp add mp |
| option sec add sec |
| option vfpv3-d16 add VFPv3 FP_DBL |
| option vfpv3 add VFPv3 FP_D32 |
| option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv |
| option vfpv3-fp16 add VFPv3 FP_D32 fp16conv |
| option vfpv4-d16 add VFPv4 FP_DBL |
| option vfpv4 add VFPv4 FP_D32 |
| option simd add VFPv3 NEON |
| optalias neon simd |
| optalias neon-vfpv3 simd |
| option neon-fp16 add VFPv3 NEON fp16conv |
| option neon-vfpv4 add VFPv4 NEON |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| costs cortex |
| end cpu generic-armv7-a |
| |
| begin cpu cortex-a5 |
| cname cortexa5 |
| tune flags LDSCHED |
| architecture armv7-a+mp+sec+neon-fp16 |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| costs cortex_a5 |
| vendor 41 |
| part c05 |
| end cpu cortex-a5 |
| |
| begin cpu cortex-a7 |
| cname cortexa7 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| costs cortex_a7 |
| vendor 41 |
| part c07 |
| end cpu cortex-a7 |
| |
| begin cpu cortex-a8 |
| cname cortexa8 |
| tune flags LDSCHED |
| architecture armv7-a+sec+simd |
| option nofp remove ALL_FP |
| costs cortex_a8 |
| vendor 41 |
| part c08 |
| end cpu cortex-a8 |
| |
| begin cpu cortex-a9 |
| cname cortexa9 |
| tune flags LDSCHED |
| architecture armv7-a+mp+sec+neon-fp16 |
| option nosimd remove ALL_SIMD |
| option nofp remove ALL_FP |
| costs cortex_a9 |
| vendor 41 |
| part c09 |
| end cpu cortex-a9 |
| |
| begin cpu cortex-a12 |
| cname cortexa12 |
| tune for cortex-a17 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nofp remove ALL_FP |
| costs cortex_a12 |
| vendor 41 |
| part c0d |
| end cpu cortex-a12 |
| |
| begin cpu cortex-a15 |
| cname cortexa15 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nofp remove ALL_FP |
| costs cortex_a15 |
| vendor 41 |
| part c0f |
| end cpu cortex-a15 |
| |
| begin cpu cortex-a17 |
| cname cortexa17 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nofp remove ALL_FP |
| costs cortex_a12 |
| vendor 41 |
| part c0e |
| end cpu cortex-a17 |
| |
| begin cpu cortex-r4 |
| cname cortexr4 |
| tune flags LDSCHED |
| architecture armv7-r |
| costs cortex |
| end cpu cortex-r4 |
| |
| begin cpu cortex-r4f |
| cname cortexr4f |
| tune flags LDSCHED |
| architecture armv7-r+fp |
| costs cortex |
| vendor 41 |
| part c14 |
| end cpu cortex-r4f |
| |
| begin cpu cortex-r5 |
| cname cortexr5 |
| tune flags LDSCHED |
| architecture armv7-r+idiv+fp |
| option nofp.dp remove FP_DBL |
| option nofp remove ALL_FP |
| costs cortex |
| vendor 41 |
| part c15 |
| end cpu cortex-r5 |
| |
| begin cpu cortex-r7 |
| cname cortexr7 |
| tune flags LDSCHED |
| architecture armv7-r+idiv+vfpv3-d16-fp16 |
| option nofp.dp remove FP_DBL |
| option nofp remove ALL_FP |
| costs cortex |
| vendor 41 |
| part c17 |
| end cpu cortex-r7 |
| |
| begin cpu cortex-r8 |
| cname cortexr8 |
| tune for cortex-r7 |
| tune flags LDSCHED |
| architecture armv7-r+idiv+vfpv3-d16-fp16 |
| option nofp.dp remove FP_DBL |
| option nofp remove ALL_FP |
| costs cortex |
| vendor 41 |
| part c18 |
| end cpu cortex-r8 |
| |
| begin cpu cortex-m7 |
| cname cortexm7 |
| tune flags LDSCHED |
| architecture armv7e-m+fp.dp |
| isa quirk_no_volatile_ce |
| option nofp.dp remove FP_DBL |
| option nofp remove ALL_FP |
| costs cortex_m7 |
| end cpu cortex-m7 |
| |
| begin cpu cortex-m4 |
| cname cortexm4 |
| tune flags LDSCHED |
| architecture armv7e-m+fp |
| option nofp remove ALL_FP |
| costs v7m |
| vendor 41 |
| part c24 |
| end cpu cortex-m4 |
| |
| begin cpu cortex-m3 |
| cname cortexm3 |
| tune flags LDSCHED |
| architecture armv7-m |
| isa quirk_cm3_ldrd |
| costs v7m |
| vendor 41 |
| part c23 |
| end cpu cortex-m3 |
| |
| begin cpu marvell-pj4 |
| tune flags LDSCHED |
| architecture armv7-a+mp+sec+fp |
| costs marvell_pj4 |
| end cpu marvell-pj4 |
| |
| |
| # V7 big.LITTLE implementations |
| begin cpu cortex-a15.cortex-a7 |
| cname cortexa15cortexa7 |
| tune for cortex-a7 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nofp remove ALL_FP |
| costs cortex_a15 |
| end cpu cortex-a15.cortex-a7 |
| |
| begin cpu cortex-a17.cortex-a7 |
| cname cortexa17cortexa7 |
| tune for cortex-a7 |
| tune flags LDSCHED |
| architecture armv7ve+simd |
| option nofp remove ALL_FP |
| costs cortex_a12 |
| end cpu cortex-a17.cortex-a7 |
| |
| |
| # V8 A-profile Architecture Processors |
| begin cpu cortex-a32 |
| cname cortexa32 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| option nofp remove ALL_FP |
| costs cortex_a35 |
| vendor 41 |
| part d01 |
| end cpu cortex-a32 |
| |
| begin cpu cortex-a35 |
| cname cortexa35 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| option nofp remove ALL_FP |
| costs cortex_a35 |
| vendor 41 |
| part d04 |
| end cpu cortex-a35 |
| |
| begin cpu cortex-a53 |
| cname cortexa53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| option nofp remove ALL_FP |
| costs cortex_a53 |
| vendor 41 |
| part d03 |
| end cpu cortex-a53 |
| |
| begin cpu cortex-a57 |
| cname cortexa57 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d07 |
| end cpu cortex-a57 |
| |
| begin cpu cortex-a72 |
| cname cortexa72 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d08 |
| end cpu cortex-a72 |
| |
| begin cpu cortex-a73 |
| cname cortexa73 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a73 |
| vendor 41 |
| part d09 |
| end cpu cortex-a73 |
| |
| begin cpu exynos-m1 |
| cname exynosm1 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs exynosm1 |
| end cpu exynos-m1 |
| |
| begin cpu xgene1 |
| tune flags LDSCHED |
| architecture armv8-a+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs xgene1 |
| end cpu xgene1 |
| |
| # V8 A-profile big.LITTLE implementations |
| begin cpu cortex-a57.cortex-a53 |
| cname cortexa57cortexa53 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| end cpu cortex-a57.cortex-a53 |
| |
| begin cpu cortex-a72.cortex-a53 |
| cname cortexa72cortexa53 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| end cpu cortex-a72.cortex-a53 |
| |
| begin cpu cortex-a73.cortex-a35 |
| cname cortexa73cortexa35 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a73 |
| end cpu cortex-a73.cortex-a35 |
| |
| begin cpu cortex-a73.cortex-a53 |
| cname cortexa73cortexa53 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8-a+crc+simd |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a73 |
| end cpu cortex-a73.cortex-a53 |
| |
| |
| # ARMv8.2 A-profile Architecture Processors |
| begin cpu cortex-a55 |
| cname cortexa55 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| option nofp remove ALL_FP |
| costs cortex_a53 |
| vendor 41 |
| part d05 |
| end cpu cortex-a55 |
| |
| begin cpu cortex-a75 |
| cname cortexa75 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a73 |
| vendor 41 |
| part d0a |
| end cpu cortex-a75 |
| |
| begin cpu cortex-a76 |
| cname cortexa76 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d0b |
| end cpu cortex-a76 |
| |
| begin cpu cortex-a76ae |
| cname cortexa76ae |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d0e |
| end cpu cortex-a76ae |
| |
| begin cpu cortex-a77 |
| cname cortexa77 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d0d |
| end cpu cortex-a77 |
| |
| begin cpu cortex-a78 |
| cname cortexa78 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d41 |
| end cpu cortex-a78 |
| |
| begin cpu cortex-a78ae |
| cname cortexa78ae |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d42 |
| end cpu cortex-a78ae |
| |
| begin cpu cortex-a78c |
| cname cortexa78c |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d4b |
| end cpu cortex-a78c |
| |
| begin cpu cortex-x1 |
| cname cortexx1 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d44 |
| end cpu cortex-x1 |
| |
| begin cpu neoverse-n1 |
| cname neoversen1 |
| alias !ares |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part d0c |
| end cpu neoverse-n1 |
| |
| # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations |
| begin cpu cortex-a75.cortex-a55 |
| cname cortexa75cortexa55 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a73 |
| end cpu cortex-a75.cortex-a55 |
| |
| begin cpu cortex-a76.cortex-a55 |
| cname cortexa76cortexa55 |
| tune for cortex-a53 |
| tune flags LDSCHED |
| architecture armv8.2-a+fp16+dotprod |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| end cpu cortex-a76.cortex-a55 |
| |
| # Armv8.4 A-profile Architecture Processors |
| begin cpu neoverse-v1 |
| cname neoversev1 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.4-a+fp16+bf16+i8mm |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part 0xd40 |
| end cpu neoverse-v1 |
| |
| # Armv8.5 A-profile Architecture Processors |
| begin cpu neoverse-n2 |
| cname neoversen2 |
| tune for cortex-a57 |
| tune flags LDSCHED |
| architecture armv8.5-a+fp16+bf16+i8mm |
| option crypto add FP_ARMv8 CRYPTO |
| costs cortex_a57 |
| vendor 41 |
| part 0xd49 |
| end cpu neoverse-n2 |
| |
| # V8 M-profile implementations. |
| begin cpu cortex-m23 |
| cname cortexm23 |
| tune flags LDSCHED |
| architecture armv8-m.base |
| costs v6m |
| end cpu cortex-m23 |
| |
| begin cpu cortex-m33 |
| cname cortexm33 |
| tune flags LDSCHED |
| architecture armv8-m.main+dsp+fp |
| option nofp remove ALL_FP |
| option nodsp remove armv7em |
| isa quirk_vlldm |
| costs v7m |
| end cpu cortex-m33 |
| |
| begin cpu cortex-m35p |
| cname cortexm35p |
| tune flags LDSCHED |
| architecture armv8-m.main+dsp+fp |
| option nofp remove ALL_FP |
| option nodsp remove armv7em |
| isa quirk_vlldm |
| costs v7m |
| end cpu cortex-m35p |
| |
| begin cpu cortex-m55 |
| cname cortexm55 |
| tune flags LDSCHED |
| architecture armv8.1-m.main+mve.fp+fp.dp |
| option nomve.fp remove mve_float |
| option nomve remove mve mve_float |
| option nofp remove ALL_FP mve_float |
| option nodsp remove MVE mve_float |
| isa quirk_no_asmcpu quirk_vlldm |
| costs v7m |
| vendor 41 |
| end cpu cortex-m55 |
| |
| # V8 R-profile implementations. |
| begin cpu cortex-r52 |
| cname cortexr52 |
| tune flags LDSCHED |
| architecture armv8-r+crc+simd |
| option nofp.dp remove FP_DBL ALL_SIMD |
| costs cortex |
| vendor 41 |
| part d13 |
| end cpu cortex-r52 |
| |
| begin cpu cortex-r52plus |
| cname cortexr52plus |
| tune flags LDSCHED |
| architecture armv8-r+crc+simd |
| option nofp.dp remove FP_DBL ALL_SIMD |
| costs cortex |
| vendor 41 |
| part d16 |
| end cpu cortex-r52plus |
| |
| # FPU entries |
| # format: |
| # begin fpu <name> |
| # isa <isa-flags-list> |
| # end fpu <name> |
| |
| begin fpu vfp |
| isa VFPv2 FP_DBL |
| end fpu vfp |
| |
| begin fpu vfpv2 |
| isa VFPv2 FP_DBL |
| end fpu vfpv2 |
| |
| begin fpu vfpv3 |
| isa VFPv3 FP_D32 |
| end fpu vfpv3 |
| |
| begin fpu vfpv3-fp16 |
| isa VFPv3 FP_D32 fp16conv |
| end fpu vfpv3-fp16 |
| |
| begin fpu vfpv3-d16 |
| isa VFPv3 FP_DBL |
| end fpu vfpv3-d16 |
| |
| begin fpu vfpv3-d16-fp16 |
| isa VFPv3 FP_DBL fp16conv |
| end fpu vfpv3-d16-fp16 |
| |
| begin fpu vfpv3xd |
| isa VFPv3 |
| end fpu vfpv3xd |
| |
| begin fpu vfpv3xd-fp16 |
| isa VFPv3 fp16conv |
| end fpu vfpv3xd-fp16 |
| |
| begin fpu neon |
| isa VFPv3 NEON |
| end fpu neon |
| |
| begin fpu neon-vfpv3 |
| isa VFPv3 NEON |
| end fpu neon-vfpv3 |
| |
| begin fpu neon-fp16 |
| isa VFPv3 NEON fp16conv |
| end fpu neon-fp16 |
| |
| begin fpu vfpv4 |
| isa VFPv4 FP_D32 |
| end fpu vfpv4 |
| |
| begin fpu neon-vfpv4 |
| isa VFPv4 NEON |
| end fpu neon-vfpv4 |
| |
| begin fpu vfpv4-d16 |
| isa VFPv4 FP_DBL |
| end fpu vfpv4-d16 |
| |
| begin fpu fpv4-sp-d16 |
| isa VFPv4 |
| end fpu fpv4-sp-d16 |
| |
| begin fpu fpv5-sp-d16 |
| isa FPv5 |
| end fpu fpv5-sp-d16 |
| |
| begin fpu fpv5-d16 |
| isa FPv5 FP_DBL |
| end fpu fpv5-d16 |
| |
| begin fpu fp-armv8 |
| isa FP_ARMv8 |
| end fpu fp-armv8 |
| |
| begin fpu neon-fp-armv8 |
| isa FP_ARMv8 NEON |
| end fpu neon-fp-armv8 |
| |
| begin fpu crypto-neon-fp-armv8 |
| isa FP_ARMv8 CRYPTO |
| end fpu crypto-neon-fp-armv8 |
| |
| # Compatibility aliases. |
| begin fpu vfp3 |
| isa VFPv3 FP_D32 |
| end fpu vfp3 |