)]}'
{
  "commit": "82cc62b51dcbc74298424c2e9540dd479ca5f26f",
  "tree": "c1ac58ace2e02bbdaae6133e84f2130bc17de96d",
  "parents": [
    "6d0aa946d27feff108ac651becc578600b25cb4f"
  ],
  "author": {
    "name": "liuhongt",
    "email": "hongtao.liu@intel.com",
    "time": "Tue Jul 29 00:01:37 2025 -0700"
  },
  "committer": {
    "name": "liuhongt",
    "email": "hongtao.liu@intel.com",
    "time": "Wed Jul 30 18:23:08 2025 -0700"
  },
  "message": "Eliminate redundant vpextrq/vpinsrq when move TI to V4SI.\n\nr14-1902-g96c3539f2a3813 split TImode move with 2 DImode move, it\u0027s\nsupposed to optimize TImode in parameter/return since accoring to\npsABI it\u0027s stored into 2 general registers.\n\nBut when TImode is not in parameter/return, it could create redundancy\nin the PR.\n\nThe patch add a splitter to handle that.\n\n.i.e.\n(insn 10 9 14 2 (set (subreg:V2DI (reg:V4SI 98 [ \u003cretval\u003e ]) 0)\n\t\t     (vec_concat:V2DI (subreg:DI (reg:TI 101) 0)\n\t\t\t (subreg:DI (reg:TI 101) 8)))\n\t\t\t 8442 {vec_concatv2di}\n\t\t\t(expr_list:REG_DEAD (reg:TI 101)\n\ngcc/ChangeLog:\n\n\tPR target/121274\n\t* config/i386/sse.md (*vec_concatv2di_0): Add a splitter\n\tbefore it.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/i386/pr121274.c: New test.\n\n(cherry picked from commit 6a466839340dce3b596b3ae5ce85bd05a067ae00)\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b280676eee6b2a2e1036115bb1d8eca22f12012e",
      "old_mode": 33188,
      "old_path": "gcc/config/i386/sse.md",
      "new_id": "606c253384222ef0b622854a73ac107665e02474",
      "new_mode": 33188,
      "new_path": "gcc/config/i386/sse.md"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "16760cfcbace498792007d57de9f7d3944b3b480",
      "new_mode": 33188,
      "new_path": "gcc/testsuite/gcc.target/i386/pr121274.c"
    }
  ]
}