| ; Options for the IA-32 and AMD64 ports of the compiler. |
| |
| ; Copyright (C) 2005-2015 Free Software Foundation, Inc. |
| ; |
| ; This file is part of GCC. |
| ; |
| ; GCC is free software; you can redistribute it and/or modify it under |
| ; the terms of the GNU General Public License as published by the Free |
| ; Software Foundation; either version 3, or (at your option) any later |
| ; version. |
| ; |
| ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
| ; WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| ; for more details. |
| ; |
| ; You should have received a copy of the GNU General Public License |
| ; along with GCC; see the file COPYING3. If not see |
| ; <http://www.gnu.org/licenses/>. |
| |
| HeaderInclude |
| config/i386/i386-opts.h |
| |
| ; Bit flags that specify the ISA we are compiling for. |
| Variable |
| HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT |
| |
| ; A mask of ix86_isa_flags that includes bit X if X was set or cleared |
| ; on the command line. |
| Variable |
| HOST_WIDE_INT ix86_isa_flags_explicit |
| |
| TargetVariable |
| int recip_mask = RECIP_MASK_DEFAULT |
| |
| Variable |
| int recip_mask_explicit |
| |
| TargetSave |
| int x_recip_mask_explicit |
| |
| ;; Definitions to add to the cl_target_option structure |
| ;; -march= processor |
| TargetSave |
| unsigned char arch |
| |
| ;; -mtune= processor |
| TargetSave |
| unsigned char tune |
| |
| ;; -march= processor-string |
| TargetSave |
| const char *x_ix86_arch_string |
| |
| ;; -mtune= processor-string |
| TargetSave |
| const char *x_ix86_tune_string |
| |
| ;; CPU schedule model |
| TargetSave |
| unsigned char schedule |
| |
| ;; True if processor has SSE prefetch instruction. |
| TargetSave |
| unsigned char prefetch_sse |
| |
| ;; branch cost |
| TargetSave |
| unsigned char branch_cost |
| |
| ;; which flags were passed by the user |
| TargetSave |
| HOST_WIDE_INT x_ix86_isa_flags_explicit |
| |
| ;; which flags were passed by the user |
| Variable |
| int ix86_target_flags_explicit |
| |
| ;; which flags were passed by the user |
| TargetSave |
| HOST_WIDE_INT x_ix86_target_flags_explicit |
| |
| ;; whether -mtune was not specified |
| TargetSave |
| unsigned char tune_defaulted |
| |
| ;; whether -march was specified |
| TargetSave |
| unsigned char arch_specified |
| |
| ;; -mcmodel= model |
| TargetSave |
| enum cmodel x_ix86_cmodel |
| |
| ;; -mabi= |
| TargetSave |
| enum calling_abi x_ix86_abi |
| |
| ;; -masm= |
| TargetSave |
| enum asm_dialect x_ix86_asm_dialect |
| |
| ;; -mbranch-cost= |
| TargetSave |
| int x_ix86_branch_cost |
| |
| ;; -mdump-tune-features= |
| TargetSave |
| int x_ix86_dump_tunes |
| |
| ;; -mstackrealign= |
| TargetSave |
| int x_ix86_force_align_arg_pointer |
| |
| ;; -mforce-drap= |
| TargetSave |
| int x_ix86_force_drap |
| |
| ;; -mincoming-stack-boundary= |
| TargetSave |
| int x_ix86_incoming_stack_boundary_arg |
| |
| ;; -maddress-mode= |
| TargetSave |
| enum pmode x_ix86_pmode |
| |
| ;; -mpreferred-stack-boundary= |
| TargetSave |
| int x_ix86_preferred_stack_boundary_arg |
| |
| ;; -mrecip= |
| TargetSave |
| const char *x_ix86_recip_name |
| |
| ;; -mregparm= |
| TargetSave |
| int x_ix86_regparm |
| |
| ;; -mlarge-data-threshold= |
| TargetSave |
| int x_ix86_section_threshold |
| |
| ;; -msse2avx= |
| TargetSave |
| int x_ix86_sse2avx |
| |
| ;; -mstack-protector-guard= |
| TargetSave |
| enum stack_protector_guard x_ix86_stack_protector_guard |
| |
| ;; -mstringop-strategy= |
| TargetSave |
| enum stringop_alg x_ix86_stringop_alg |
| |
| ;; -mtls-dialect= |
| TargetSave |
| enum tls_dialect x_ix86_tls_dialect |
| |
| ;; -mtune-ctrl= |
| TargetSave |
| const char *x_ix86_tune_ctrl_string |
| |
| ;; -mmemcpy-strategy= |
| TargetSave |
| const char *x_ix86_tune_memcpy_strategy |
| |
| ;; -mmemset-strategy= |
| TargetSave |
| const char *x_ix86_tune_memset_strategy |
| |
| ;; -mno-default= |
| TargetSave |
| int x_ix86_tune_no_default |
| |
| ;; -mveclibabi= |
| TargetSave |
| enum ix86_veclibabi x_ix86_veclibabi_type |
| |
| ;; x86 options |
| m128bit-long-double |
| Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save |
| sizeof(long double) is 16 |
| |
| m80387 |
| Target Report Mask(80387) Save |
| Use hardware fp |
| |
| m96bit-long-double |
| Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save |
| sizeof(long double) is 12 |
| |
| mlong-double-80 |
| Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save |
| Use 80-bit long double |
| |
| mlong-double-64 |
| Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save |
| Use 64-bit long double |
| |
| mlong-double-128 |
| Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save |
| Use 128-bit long double |
| |
| maccumulate-outgoing-args |
| Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save |
| Reserve space for outgoing arguments in the function prologue |
| |
| malign-double |
| Target Report Mask(ALIGN_DOUBLE) Save |
| Align some doubles on dword boundary |
| |
| malign-functions= |
| Target RejectNegative Joined UInteger |
| Function starts are aligned to this power of 2 |
| |
| malign-jumps= |
| Target RejectNegative Joined UInteger |
| Jump targets are aligned to this power of 2 |
| |
| malign-loops= |
| Target RejectNegative Joined UInteger |
| Loop code aligned to this power of 2 |
| |
| malign-stringops |
| Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save |
| Align destination of the string operations |
| |
| malign-data= |
| Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) |
| Use the given data alignment |
| |
| Enum |
| Name(ix86_align_data) Type(enum ix86_align_data) |
| Known data alignment choices (for use with the -malign-data= option): |
| |
| EnumValue |
| Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) |
| |
| EnumValue |
| Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) |
| |
| EnumValue |
| Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) |
| |
| march= |
| Target RejectNegative Joined Var(ix86_arch_string) |
| Generate code for given CPU |
| |
| masm= |
| Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) |
| Use given assembler dialect |
| |
| Enum |
| Name(asm_dialect) Type(enum asm_dialect) |
| Known assembler dialects (for use with the -masm-dialect= option): |
| |
| EnumValue |
| Enum(asm_dialect) String(intel) Value(ASM_INTEL) |
| |
| EnumValue |
| Enum(asm_dialect) String(att) Value(ASM_ATT) |
| |
| mbranch-cost= |
| Target RejectNegative Joined UInteger Var(ix86_branch_cost) |
| Branches are this expensive (1-5, arbitrary units) |
| |
| mlarge-data-threshold= |
| Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) |
| Data greater than given threshold will go into .ldata section in x86-64 medium model |
| |
| mcmodel= |
| Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) |
| Use given x86-64 code model |
| |
| Enum |
| Name(cmodel) Type(enum cmodel) |
| Known code models (for use with the -mcmodel= option): |
| |
| EnumValue |
| Enum(cmodel) String(small) Value(CM_SMALL) |
| |
| EnumValue |
| Enum(cmodel) String(medium) Value(CM_MEDIUM) |
| |
| EnumValue |
| Enum(cmodel) String(large) Value(CM_LARGE) |
| |
| EnumValue |
| Enum(cmodel) String(32) Value(CM_32) |
| |
| EnumValue |
| Enum(cmodel) String(kernel) Value(CM_KERNEL) |
| |
| maddress-mode= |
| Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) |
| Use given address mode |
| |
| Enum |
| Name(pmode) Type(enum pmode) |
| Known address mode (for use with the -maddress-mode= option): |
| |
| EnumValue |
| Enum(pmode) String(short) Value(PMODE_SI) |
| |
| EnumValue |
| Enum(pmode) String(long) Value(PMODE_DI) |
| |
| mcpu= |
| Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) |
| |
| mfancy-math-387 |
| Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save |
| Generate sin, cos, sqrt for FPU |
| |
| mforce-drap |
| Target Report Var(ix86_force_drap) |
| Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack |
| |
| mfp-ret-in-387 |
| Target Report Mask(FLOAT_RETURNS) Save |
| Return values of functions in FPU registers |
| |
| mfpmath= |
| Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save |
| Generate floating point mathematics using given instruction set |
| |
| Enum |
| Name(fpmath_unit) Type(enum fpmath_unit) |
| Valid arguments to -mfpmath=: |
| |
| EnumValue |
| Enum(fpmath_unit) String(387) Value(FPMATH_387) |
| |
| EnumValue |
| Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) |
| |
| EnumValue |
| Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) |
| |
| EnumValue |
| Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) |
| |
| EnumValue |
| Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) |
| |
| EnumValue |
| Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) |
| |
| EnumValue |
| Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) |
| |
| mhard-float |
| Target RejectNegative Mask(80387) Save |
| Use hardware fp |
| |
| mieee-fp |
| Target Report Mask(IEEE_FP) Save |
| Use IEEE math for fp comparisons |
| |
| minline-all-stringops |
| Target Report Mask(INLINE_ALL_STRINGOPS) Save |
| Inline all known string operations |
| |
| minline-stringops-dynamically |
| Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save |
| Inline memset/memcpy string operations, but perform inline version only for small blocks |
| |
| mintel-syntax |
| Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) |
| ;; Deprecated |
| |
| mms-bitfields |
| Target Report Mask(MS_BITFIELD_LAYOUT) Save |
| Use native (MS) bitfield layout |
| |
| mno-align-stringops |
| Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save |
| |
| mno-fancy-math-387 |
| Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save |
| |
| mno-push-args |
| Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save |
| |
| mno-red-zone |
| Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save |
| |
| momit-leaf-frame-pointer |
| Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save |
| Omit the frame pointer in leaf functions |
| |
| mpc32 |
| Target RejectNegative Report |
| Set 80387 floating-point precision to 32-bit |
| |
| mpc64 |
| Target RejectNegative Report |
| Set 80387 floating-point precision to 64-bit |
| |
| mpc80 |
| Target RejectNegative Report |
| Set 80387 floating-point precision to 80-bit |
| |
| mpreferred-stack-boundary= |
| Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) |
| Attempt to keep stack aligned to this power of 2 |
| |
| mincoming-stack-boundary= |
| Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) |
| Assume incoming stack aligned to this power of 2 |
| |
| mpush-args |
| Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save |
| Use push instructions to save outgoing arguments |
| |
| mred-zone |
| Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save |
| Use red-zone in the x86-64 code |
| |
| mregparm= |
| Target RejectNegative Joined UInteger Var(ix86_regparm) |
| Number of registers used to pass integer arguments |
| |
| mrtd |
| Target Report Mask(RTD) Save |
| Alternate calling convention |
| |
| msoft-float |
| Target InverseMask(80387) Save |
| Do not use hardware fp |
| |
| msseregparm |
| Target RejectNegative Mask(SSEREGPARM) Save |
| Use SSE register passing conventions for SF and DF mode |
| |
| mstackrealign |
| Target Report Var(ix86_force_align_arg_pointer) Init(-1) |
| Realign stack in prologue |
| |
| mstack-arg-probe |
| Target Report Mask(STACK_PROBE) Save |
| Enable stack probing |
| |
| mmemcpy-strategy= |
| Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) |
| Specify memcpy expansion strategy when expected size is known |
| |
| mmemset-strategy= |
| Target RejectNegative Joined Var(ix86_tune_memset_strategy) |
| Specify memset expansion strategy when expected size is known |
| |
| mstringop-strategy= |
| Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) |
| Chose strategy to generate stringop using |
| |
| Enum |
| Name(stringop_alg) Type(enum stringop_alg) |
| Valid arguments to -mstringop-strategy=: |
| |
| EnumValue |
| Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) |
| |
| EnumValue |
| Enum(stringop_alg) String(libcall) Value(libcall) |
| |
| EnumValue |
| Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) |
| |
| EnumValue |
| Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) |
| |
| EnumValue |
| Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) |
| |
| EnumValue |
| Enum(stringop_alg) String(loop) Value(loop) |
| |
| EnumValue |
| Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) |
| |
| EnumValue |
| Enum(stringop_alg) String(vector_loop) Value(vector_loop) |
| |
| mtls-dialect= |
| Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) |
| Use given thread-local storage dialect |
| |
| Enum |
| Name(tls_dialect) Type(enum tls_dialect) |
| Known TLS dialects (for use with the -mtls-dialect= option): |
| |
| EnumValue |
| Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) |
| |
| EnumValue |
| Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) |
| |
| mtls-direct-seg-refs |
| Target Report Mask(TLS_DIRECT_SEG_REFS) |
| Use direct references against %gs when accessing tls data |
| |
| mtune= |
| Target RejectNegative Joined Var(ix86_tune_string) |
| Schedule code for given CPU |
| |
| mtune-ctrl= |
| Target RejectNegative Joined Var(ix86_tune_ctrl_string) |
| Fine grain control of tune features |
| |
| mno-default |
| Target RejectNegative Var(ix86_tune_no_default) Init(0) |
| Clear all tune features |
| |
| mdump-tune-features |
| Target RejectNegative Var(ix86_dump_tunes) Init(0) |
| |
| mabi= |
| Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) |
| Generate code that conforms to the given ABI |
| |
| Enum |
| Name(calling_abi) Type(enum calling_abi) |
| Known ABIs (for use with the -mabi= option): |
| |
| EnumValue |
| Enum(calling_abi) String(sysv) Value(SYSV_ABI) |
| |
| EnumValue |
| Enum(calling_abi) String(ms) Value(MS_ABI) |
| |
| mveclibabi= |
| Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) |
| Vector library ABI to use |
| |
| Enum |
| Name(ix86_veclibabi) Type(enum ix86_veclibabi) |
| Known vectorization library ABIs (for use with the -mveclibabi= option): |
| |
| EnumValue |
| Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) |
| |
| EnumValue |
| Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) |
| |
| mvect8-ret-in-mem |
| Target Report Mask(VECT8_RETURNS) Save |
| Return 8-byte vectors in memory |
| |
| mrecip |
| Target Report Mask(RECIP) Save |
| Generate reciprocals instead of divss and sqrtss. |
| |
| mrecip= |
| Target Report RejectNegative Joined Var(ix86_recip_name) |
| Control generation of reciprocal estimates. |
| |
| mcld |
| Target Report Mask(CLD) Save |
| Generate cld instruction in the function prologue. |
| |
| mvzeroupper |
| Target Report Mask(VZEROUPPER) Save |
| Generate vzeroupper instruction before a transfer of control flow out of |
| the function. |
| |
| mdispatch-scheduler |
| Target RejectNegative Var(flag_dispatch_scheduler) |
| Do dispatch scheduling if processor is bdver1 or bdver2 or bdver3 or bdver4 and Haifa scheduling |
| is selected. |
| |
| mprefer-avx128 |
| Target Report Mask(PREFER_AVX128) SAVE |
| Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. |
| |
| ;; ISA support |
| |
| m32 |
| Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save |
| Generate 32bit i386 code |
| |
| m64 |
| Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save |
| Generate 64bit x86-64 code |
| |
| mx32 |
| Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save |
| Generate 32bit x86-64 code |
| |
| m16 |
| Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save |
| Generate 16bit i386 code |
| |
| mmmx |
| Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save |
| Support MMX built-in functions |
| |
| m3dnow |
| Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save |
| Support 3DNow! built-in functions |
| |
| m3dnowa |
| Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save |
| Support Athlon 3Dnow! built-in functions |
| |
| msse |
| Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save |
| Support MMX and SSE built-in functions and code generation |
| |
| msse2 |
| Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save |
| Support MMX, SSE and SSE2 built-in functions and code generation |
| |
| msse3 |
| Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation |
| |
| mssse3 |
| Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation |
| |
| msse4.1 |
| Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation |
| |
| msse4.2 |
| Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation |
| |
| msse4 |
| Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation |
| |
| mno-sse4 |
| Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save |
| Do not support SSE4.1 and SSE4.2 built-in functions and code generation |
| |
| msse5 |
| Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) |
| ;; Deprecated |
| |
| mavx |
| Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation |
| |
| mavx2 |
| Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation |
| |
| mavx512f |
| Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation |
| |
| mavx512pf |
| Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation |
| |
| mavx512er |
| Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation |
| |
| mavx512cd |
| Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation |
| |
| mavx512dq |
| Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation |
| |
| mavx512bw |
| Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation |
| |
| mavx512vl |
| Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation |
| |
| mavx512ifma |
| Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation |
| |
| mavx512vbmi |
| Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation |
| |
| mfma |
| Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation |
| |
| msse4a |
| Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save |
| Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation |
| |
| mfma4 |
| Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save |
| Support FMA4 built-in functions and code generation |
| |
| mxop |
| Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save |
| Support XOP built-in functions and code generation |
| |
| mlwp |
| Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save |
| Support LWP built-in functions and code generation |
| |
| mabm |
| Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save |
| Support code generation of Advanced Bit Manipulation (ABM) instructions. |
| |
| mpopcnt |
| Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save |
| Support code generation of popcnt instruction. |
| |
| mbmi |
| Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save |
| Support BMI built-in functions and code generation |
| |
| mbmi2 |
| Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save |
| Support BMI2 built-in functions and code generation |
| |
| mlzcnt |
| Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save |
| Support LZCNT built-in function and code generation |
| |
| mhle |
| Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save |
| Support Hardware Lock Elision prefixes |
| |
| mrdseed |
| Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save |
| Support RDSEED instruction |
| |
| mprfchw |
| Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save |
| Support PREFETCHW instruction |
| |
| madx |
| Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save |
| Support flag-preserving add-carry instructions |
| |
| mclflushopt |
| Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save |
| Support CLFLUSHOPT instructions |
| |
| mclwb |
| Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save |
| Support CLWB instruction |
| |
| mpcommit |
| Target Undocumented Warn(%<-mpcommit%> was deprecated) |
| ;; Deprecated |
| |
| mfxsr |
| Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save |
| Support FXSAVE and FXRSTOR instructions |
| |
| mxsave |
| Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save |
| Support XSAVE and XRSTOR instructions |
| |
| mxsaveopt |
| Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save |
| Support XSAVEOPT instruction |
| |
| mxsavec |
| Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save |
| Support XSAVEC instructions |
| |
| mxsaves |
| Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save |
| Support XSAVES and XRSTORS instructions |
| |
| mtbm |
| Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save |
| Support TBM built-in functions and code generation |
| |
| mcx16 |
| Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save |
| Support code generation of cmpxchg16b instruction. |
| |
| msahf |
| Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save |
| Support code generation of sahf instruction in 64bit x86-64 code. |
| |
| mmovbe |
| Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save |
| Support code generation of movbe instruction. |
| |
| mcrc32 |
| Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save |
| Support code generation of crc32 instruction. |
| |
| maes |
| Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save |
| Support AES built-in functions and code generation |
| |
| msha |
| Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save |
| Support SHA1 and SHA256 built-in functions and code generation |
| |
| mpclmul |
| Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save |
| Support PCLMUL built-in functions and code generation |
| |
| msse2avx |
| Target Report Var(ix86_sse2avx) |
| Encode SSE instructions with VEX prefix |
| |
| mfsgsbase |
| Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save |
| Support FSGSBASE built-in functions and code generation |
| |
| mrdrnd |
| Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save |
| Support RDRND built-in functions and code generation |
| |
| mf16c |
| Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save |
| Support F16C built-in functions and code generation |
| |
| mprefetchwt1 |
| Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save |
| Support PREFETCHWT1 built-in functions and code generation |
| |
| mfentry |
| Target Report Var(flag_fentry) Init(-1) |
| Emit profiling counter call at function entry before prologue. |
| |
| mrecord-mcount |
| Target Report Var(flag_record_mcount) Init(0) |
| Generate __mcount_loc section with all mcount or __fentry__ calls. |
| |
| mnop-mcount |
| Target Report Var(flag_nop_mcount) Init(0) |
| Generate mcount/__fentry__ calls as nops. To activate they need to be |
| patched in. |
| |
| mskip-rax-setup |
| Target Report Var(flag_skip_rax_setup) Init(0) |
| Skip setting up RAX register when passing variable arguments. |
| |
| m8bit-idiv |
| Target Report Mask(USE_8BIT_IDIV) Save |
| Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check |
| |
| mavx256-split-unaligned-load |
| Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save |
| Split 32-byte AVX unaligned load |
| |
| mavx256-split-unaligned-store |
| Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save |
| Split 32-byte AVX unaligned store |
| |
| mrtm |
| Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save |
| Support RTM built-in functions and code generation |
| |
| mmpx |
| Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save |
| Support MPX code generation |
| |
| mmwaitx |
| Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save |
| Support MWAITX and MONITORX built-in functions and code generation |
| |
| mstack-protector-guard= |
| Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) |
| Use given stack-protector guard |
| |
| Enum |
| Name(stack_protector_guard) Type(enum stack_protector_guard) |
| Known stack protector guard (for use with the -mstack-protector-guard= option): |
| |
| EnumValue |
| Enum(stack_protector_guard) String(tls) Value(SSP_TLS) |
| |
| EnumValue |
| Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) |
