gcc/config/rs6000/rs64.md

;; GCC is free software; you can redistribute it and/or modify it ;; under the terms of the GNU General Public License as published ;; by the Free Software Foundation; either version 3, or (at your ;; option) any later version.

;; GCC is distributed in the hope that it will be useful, but WITHOUT ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ;; License for more details.

;; You should have received a copy of the GNU General Public License ;; along with GCC; see the file COPYING3. If not see ;; http://www.gnu.org/licenses/.

(define_automaton “rs64,rs64fp”) (define_cpu_unit “iu_rs64” “rs64”) (define_cpu_unit “mciu_rs64” “rs64”) (define_cpu_unit “fpu_rs64” “rs64fp”) (define_cpu_unit “lsu_rs64,bpu_rs64” “rs64”)

;; RS64a 64-bit IU, LSU, FPU, BPU

(define_insn_reservation “rs64a-load” 2 (and (eq_attr “type” “load”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-store” 2 (and (eq_attr “type” “store,fpstore”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-fpload” 3 (and (eq_attr “type” “fpload”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-llsc” 2 (and (eq_attr “type” “load_l,store_c”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-integer” 1 (and (ior (eq_attr “type” “integer,insert,trap,cntlz,isel”) (and (eq_attr “type” “add,logical,shift,exts”) (eq_attr “dot” “no”))) (eq_attr “cpu” “rs64a”)) “iu_rs64”)

(define_insn_reservation “rs64a-two” 1 (and (eq_attr “type” “two”) (eq_attr “cpu” “rs64a”)) “iu_rs64,iu_rs64”)

(define_insn_reservation “rs64a-three” 1 (and (eq_attr “type” “three”) (eq_attr “cpu” “rs64a”)) “iu_rs64,iu_rs64,iu_rs64”)

(define_insn_reservation “rs64a-imul” 20 (and (eq_attr “type” “mul”) (eq_attr “size” “32”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*13”)

(define_insn_reservation “rs64a-imul2” 12 (and (eq_attr “type” “mul”) (eq_attr “size” “16”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*5”)

(define_insn_reservation “rs64a-imul3” 8 (and (eq_attr “type” “mul”) (eq_attr “size” “8”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*2”)

(define_insn_reservation “rs64a-lmul” 34 (and (eq_attr “type” “mul”) (eq_attr “size” “64”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*34”)

(define_insn_reservation “rs64a-idiv” 66 (and (eq_attr “type” “div”) (eq_attr “size” “32”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*66”)

(define_insn_reservation “rs64a-ldiv” 66 (and (eq_attr “type” “div”) (eq_attr “size” “64”) (eq_attr “cpu” “rs64a”)) “mciu_rs64*66”)

(define_insn_reservation “rs64a-compare” 3 (and (ior (eq_attr “type” “cmp”) (and (eq_attr “type” “add,logical,shift,exts”) (eq_attr “dot” “yes”))) (eq_attr “cpu” “rs64a”)) “iu_rs64,nothing,bpu_rs64”)

(define_insn_reservation “rs64a-fpcompare” 5 (and (eq_attr “type” “fpcompare”) (eq_attr “cpu” “rs64a”)) “mciu_rs64,fpu_rs64,bpu_rs64”)

(define_insn_reservation “rs64a-fp” 4 (and (eq_attr “type” “fp,fpsimple,dmul”) (eq_attr “cpu” “rs64a”)) “mciu_rs64,fpu_rs64”)

(define_insn_reservation “rs64a-sdiv” 31 (and (eq_attr “type” “sdiv,ddiv”) (eq_attr “cpu” “rs64a”)) “mciu_rs64,fpu_rs64*31”)

(define_insn_reservation “rs64a-sqrt” 49 (and (eq_attr “type” “ssqrt,dsqrt”) (eq_attr “cpu” “rs64a”)) “mciu_rs64,fpu_rs64*49”)

(define_insn_reservation “rs64a-mfcr” 2 (and (eq_attr “type” “mfcr”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-mtcr” 3 (and (eq_attr “type” “mtcr”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-mtjmpr” 3 (and (eq_attr “type” “mtjmpr”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-mfjmpr” 2 (and (eq_attr “type” “mfjmpr”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)

(define_insn_reservation “rs64a-jmpreg” 1 (and (eq_attr “type” “jmpreg,branch,cr_logical”) (eq_attr “cpu” “rs64a”)) “bpu_rs64”)

(define_insn_reservation “rs64a-isync” 6 (and (eq_attr “type” “isync”) (eq_attr “cpu” “rs64a”)) “bpu_rs64”)

(define_insn_reservation “rs64a-sync” 1 (and (eq_attr “type” “sync”) (eq_attr “cpu” “rs64a”)) “lsu_rs64”)