)]}'
{
  "commit": "cc621069b211cccbb7b8e0e7fc5c1138ffd4704a",
  "tree": "ade3b113c3178583cfd2b9109d13c130de361181",
  "parents": [
    "e45e4854b81b9fe75ebf2c0af7f9004cb1ea87d0"
  ],
  "author": {
    "name": "Pan Li",
    "email": "pan2.li@intel.com",
    "time": "Wed Jul 08 13:57:43 2026 +0800"
  },
  "committer": {
    "name": "Pan Li",
    "email": "pan2.li@intel.com",
    "time": "Fri Jul 10 09:55:30 2026 +0800"
  },
  "message": "RISC-V: Adjust the scan asm for v[sz]ext.vf2 for v1 and v12\n\nThe previous match v1 may match the v12 as well, therefore\nadd the non-num boundary.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c:\n\t* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c:\n\nSigned-off-by: Pan Li \u003cpan2.li@intel.com\u003e\n",
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