gcc/testsuite/gcc.target/aarch64/simd/extq_s32_1.c - gcc - Git at Google

 /* Test the `vextQs32' AArch64 SIMD intrinsic.  */

 /* { dg-do run } */
 /* { dg-options "-save-temps -O3 -fno-inline" } */

 #include "arm_neon.h"
 #include "extq_s32.x"

 /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
	/* Test the `vextQs32' AArch64 SIMD intrinsic. */

	/* { dg-do run } */
	/* { dg-options "-save-temps -O3 -fno-inline" } */

	#include "arm_neon.h"
	#include "extq_s32.x"

	/* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */