)]}'
{
  "commit": "e07e140680c717cfc59a11bf2287ff6433ebddd2",
  "tree": "bc861959923d1254c9d43ae8cf4cfd910d3567d4",
  "parents": [
    "7817a32b45103871d9fc42776704321bbbc46402"
  ],
  "author": {
    "name": "Jeff Law",
    "email": "jeffrey.law@oss.qualcomm.com",
    "time": "Thu Jul 02 22:36:47 2026 -0600"
  },
  "committer": {
    "name": "Jeff Law",
    "email": "jeffrey.law@oss.qualcomm.com",
    "time": "Thu Jul 02 22:36:47 2026 -0600"
  },
  "message": "[RISC-V] Improve IOR/XOR synthesis for expensive constant cases\n\nSo much like the changes to add_synthesis, this adjusts xor/ior synthesis to\nuse riscv_integer_cost rather than riscv_const_insns.  For those that didn\u0027t\nread the add_synthesis patch, what happens is riscv_const_insns returns 0 for\nconstants requiring more than 3 insns to synthesize.  So imagine if the\noriginal constant had cost 5, it\u0027s bit inversion has cost 4.  Both get\nconverted to \"0\" because they\u0027re over the maximal value and thus we can\u0027t\ndistinguish between them and we fail to use C\u0027 with XNOR, ORN or ANDN to\nimprove the resulting code.\n\nThe constants here were actually from the AND cases, but given the common ISA\ncapability and GCC structure I suspected the AND cases would apply to IOR/XOR,\nand they do.\n\nTested without regression on riscv32-elf and riscv64-elf, also bootstrapped and\nregression tested on the k3 and c920.  I\u0027ll obviously be waiting for pre-commit\nCI to do its thing before moving forward.\n\ngcc/\n\n\t* config/riscv/riscv.cc (synthesize_ior_xor): Use riscv_integer_cost\n\trather than riscv_const_insns.\n\ngcc/testsuite\n\n\t* gcc.target/riscv/xor-synthesis-4.c: New test.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "09dc41930aa7e33c5e79a33af306bb30101aa41e",
      "old_mode": 33188,
      "old_path": "gcc/config/riscv/riscv.cc",
      "new_id": "d31d4a8aeabf855d97d29c3debdbbe2e545d9b18",
      "new_mode": 33188,
      "new_path": "gcc/config/riscv/riscv.cc"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "4fc6c526faf28882694973dd5b42b47dfcfb4b8a",
      "new_mode": 33188,
      "new_path": "gcc/testsuite/gcc.target/riscv/xor-synthesis-4.c"
    }
  ]
}
