| /* Description of target passes for ARC. |
| Copyright (C) 2019-2022 Free Software Foundation, Inc. */ |
| |
| /* This file is part of GCC. |
| |
| GCC is free software; you can redistribute it and/or modify it under |
| the terms of the GNU General Public License as published by the Free |
| Software Foundation; either version 3, or (at your option) any later |
| version. |
| |
| GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
| WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| for more details. |
| |
| You should have received a copy of the GNU General Public License |
| along with GCC; see the file COPYING3. If not see |
| <http://www.gnu.org/licenses/>. */ |
| |
| /* First target dependent ARC if-conversion pass. */ |
| INSERT_PASS_AFTER (pass_delay_slots, 1, pass_arc_ifcvt); |
| |
| /* Second target dependent ARC if-conversion pass. */ |
| INSERT_PASS_BEFORE (pass_shorten_branches, 1, pass_arc_ifcvt); |
| |
| /* Find annulled delay insns and convert them to use the appropriate |
| predicate. This allows branch shortening to size up these |
| instructions properly. */ |
| INSERT_PASS_AFTER (pass_delay_slots, 1, pass_arc_predicate_delay_insns); |