)]}'
{
  "commit": "ee30b1af53bb4ac6ca3c69596d75eef32ec187b1",
  "tree": "2f780b6654174c08d7d15964a99365bae9e35545",
  "parents": [
    "78215710ccafc31fdacc2c6f3080303b5f2d1358"
  ],
  "author": {
    "name": "Kishan Parmar",
    "email": "kishan@linux.ibm.com",
    "time": "Wed Jul 22 13:38:12 2026 +0530"
  },
  "committer": {
    "name": "Kishan Parmar",
    "email": "kishan@linux.ibm.com",
    "time": "Wed Jul 22 13:38:12 2026 +0530"
  },
  "message": "rs6000: Build DMF accumulators using DMR insert operations\n\nA future PowerPC processor may provide the Dense Math Facility (DMF),\nwhere accumulators are backed by dedicated Dense Math Registers (DMRs).\nUpdate accumulator assembly to build accumulators in DMRs using the new\nDMR insert operations rather than xxmtacc/xxmfacc.\n\nAdd DMR register predicate support, enable the required OOmode VSX pair\npatterns under TARGET_DMF, use accumulator operands for MMA accumulator\nassembly and disassembly, and avoid emitting xxmtacc/xxmfacc during\ninternal accumulator moves and GIMPLE folding when DMF is enabled.\nAdd DMF instruction type and ISA attributes for instruction scheduling\nand enablement.\n\n2026-07-22  Kishan Parmar  \u003ckishan@linux.ibm.com\u003e\n\ngcc/\n\n\t* config/rs6000/mma.md (UNSPEC_DMF_INSERT512): New unspec.\n\t(UNSPEC_DMF_INSERT1024): Likewise.\n\t(movoo): Enable for TARGET_DMF.\n\t(*movoo): Likewise.\n\t(vsx_assemble_pair): Likewise.\n\t(*vsx_assemble_pair): Likewise.\n\t(vsx_disassemble_pair): Likewise.\n\t(*vsx_disassemble_pair): Likewise.\n\t(dm_insert512): New insn.\n\t(dm_insert1024): Likewise.\n\t(mma_assemble_acc): Use accumulator_operand.\n\tBuild accumulators via DMR insert operations when TARGET_DMF.\n\t(*mma_assemble_acc): Use accumulator_operand.\n\t(mma_\u003cacc\u003e): New define_expand treating xxmtacc/xxmfacc as no-ops\n\tfor TARGET_DMF.\n\t(*mma_\u003cacc\u003e): Restrict to !TARGET_DMF and use accumulator_operand.\n\t(mma_disassemble_acc): Use accumulator_operand.\n\t* config/rs6000/predicates.md (dmr_register_operand): New predicate.\n\t(gpc_reg_operand): Accept DMR registers.\n\t* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Do\n\tnot emit xxmfacc for DISASSEMBLE_ACC when TARGET_DMF.\n\t* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow\n\tOOmode in VSX register pairs for TARGET_DMF.\n\t(rs6000_split_multireg_move): Avoid emitting xxmtacc/xxmfacc when\n\tTARGET_DMF.\n\t* config/rs6000/rs6000.md (type): Add dmf type.\n\t(isa): Add mma and dmf ISA attributes.\n\t(enabled): Add mma and dmf enable conditions.\n\ngcc/testsuite/\n\n\t* gcc.target/powerpc/dmf-xxacc.c: New test.\n\t* gcc.target/powerpc/nodmf-xxacc.c: New test.\n",
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