)]}'
{
  "commit": "f1fb9dec32d5194b54ac05f7a5423213deabee81",
  "tree": "9d810a86bbb3ba39e5a7e3a018ff15b61103b735",
  "parents": [
    "52756251f755dc8aefe44e5026e555c93b2c783b"
  ],
  "author": {
    "name": "Artemiy Volkov",
    "email": "artemiy.volkov@arm.com",
    "time": "Wed Jan 14 13:32:58 2026 +0000"
  },
  "committer": {
    "name": "Artemiy Volkov",
    "email": "artemiy.volkov@arm.com",
    "time": "Fri May 29 11:33:17 2026 +0000"
  },
  "message": "aarch64: add zeroing forms for predicated SVE FP-to-integer conversions\n\nSVE2.2 (or in streaming mode, SME2.2) adds support for zeroing predication\nfor all variants of the following FP-to-integer conversion instructions:\n\n- FCVTZU (Floating-point convert to unsigned integer, rounding toward zero\n  (predicated))\n- FCVTZS (Floating-point convert to signed integer, rounding toward zero\n  (predicated))\n\nTo implement this change, this patch adds a new alternative to patterns\ninvolving the SVE_COND_FCVTI iterator and accepting an independent value\nas the merge operand.  The new alternative has the new zeroing-predication\nforms as the output string and is only enabled when sve2p2_or_sme2p2 is\ntrue in the target architecture.\n\nThe new ASM tests only cover the \"_z\" versions of the intrinsics and as\nsuch all have the \"_z\" suffix in their name, and are grouped by type of\nthe destination operand.\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-sve.md\n\t(*cond_\u003coptab\u003e_nontrunc\u003cSVE_FULL_F:mode\u003e\u003cSVE_FULL_HSDI:mode\u003e_relaxed):\n\tNew alternative for zeroing predication.  Add `arch` attribute\n\tto every alternative.\n\t(*cond_\u003coptab\u003e_nontrunc\u003cSVE_PARTIAL_F:mode\u003e\u003cSVE_HSDI:mode\u003e_relaxed):\n\tLikewise.\n\t(*cond_\u003coptab\u003e_nontrunc\u003cSVE_FULL_F:mode\u003e\u003cSVE_FULL_HSDI:mode\u003e_strict):\n\tLikewise.\n\t(*cond_\u003coptab\u003e_trunc\u003cVNx2DF_ONLY:mode\u003e\u003cVNx4SI_ONLY:mode\u003e):\n\tLikewise.\n\t(*cond_\u003coptab\u003e_trunc\u003cVNx2DF_ONLY:mode\u003e\u003cVNx2SI_ONLY:mode\u003e_relaxed):\n\tLikewise.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_s16_z.c: New test.\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_s32_z.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_s64_z.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_u16_z.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_u32_z.c: Likewise.\n\t* gcc.target/aarch64/sve2/acle/asm/cvt_u64_z.c: Likewise.\n",
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