)]}'
{
  "commit": "f49cb8938ef3ab032fe01c6a39b4baf8e4e8fa49",
  "tree": "b26bde81dd4f7ffc35358376d6e2681a1f452393",
  "parents": [
    "75f572322c011229794476502f52a9ae530107f8"
  ],
  "author": {
    "name": "Abhishek Kaushik",
    "email": "abhishek.kaushik@arm.com",
    "time": "Mon Aug 10 12:29:45 2026 +0000"
  },
  "committer": {
    "name": "Abhishek Kaushik",
    "email": "abhishek.kaushik@arm.com",
    "time": "Wed Aug 12 11:46:52 2026 +0000"
  },
  "message": "aarch64: Add SME2p3/SVE2p3 x2 narrowing right shift intrinsics\n\nThis patch adds support for the following SME2p3/SVE2p3 x2 narrowing\nright shift intrinsics:\n\n  - svqrshrn_s8_s16\n  - svqrshrn_u8_u16\n  - svqrshrun_u8_s16\n  - svqshrn_s8_s16\n  - svqshrn_s16_s32\n  - svqshrn_u8_u16\n  - svqshrn_u16_u32\n  - svqshrun_u8_s16\n  - svqshrun_u16_s32\n\nBootstrapped and regression tested on aarch64-linux-gnu.\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-acle-builtins.h\n\t(TYPES_qshr_x2): New macro.\n\t(TYPES_qrshr_x2_8): Likewise.\n\t(TYPES_qshru_x2): Likewise.\n\t(TYPES_qrshrun_x2): Likewise.\n\t(DEF_SVE_TYPES_ARRAY): Add qshr_x2, qrshr_x2_8,\tqrshrun_x2\n\tand qshru_x2.\n\t* config/aarch64/aarch64-sve-builtins-sve2.cc (svqshrn): New\n\tfunction.\n\t(svqshrun): Likewise.\n\t* config/aarch64/aarch64-sve-builtins-sve2.def (svqrshrn): Add\n\tSVE2p3/SME2p3 x2 form.\n\t(svqrshrun): Likewise.\n\t(svqshrn): Add SVE2p3/SME2p3 x2 form.\n\t(svqshrun): Likewise.\n\t* config/aarch64/aarch64-sve-builtins-sve2.h (svqshrn): Declare.\n\t(svqshrun): Likewise.\n\t* config/aarch64/aarch64-sve2.md\n\t(@aarch64_sve_\u003csve_int_op\u003e\u003cmode\u003e): New define_insn.\n\t* config/aarch64/iterators.md (SVE_FULL_HIx2): New mode iterator.\n\t(UNSPEC_SQSHRN, UNSPEC_SQSHRUN, UNSPEC_UQSHRN): New unspecs.\n\t(VNARROW): Add VNx16HI mapping.\n\t(Ventype): Likewise.\n\t(SVE2_INT_SHIFT_IMM_NARROWxN): Add UNSPEC_SQSHRN,\n\tUNSPEC_SQSHRUN and UNSPEC_UQSHRN.\n\t(sve_int_op): Add sqshrn, sqshrun and uqshrn.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/sme2/acle-asm/qrshrn_s8_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qrshrn_u8_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qrshrun_u8_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrn_s16_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrn_s8_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrn_u16_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrn_u8_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrun_u16_x2.c: New test.\n\t* gcc.target/aarch64/sme2/acle-asm/qshrun_u8_x2.c: New test.\n",
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