tree 8030437028dcb64569040294b7667ec997d2b6e6
parent dcba59a336f5307d577fd3bacae65258447d1803
author Philipp Tomsich <philipp.tomsich@vrull.eu> 1774023255 +0100
committer Philipp Tomsich <philipp.tomsich@vrull.eu> 1779902451 +0200

ext-dce: narrow sign-extending loads to zero-extending when upper bits are dead

The ext-dce pass tracks bit-level liveness and can replace sign extensions
with zero extensions when the upper bits are dead.  However,
ext_dce_try_optimize_extension bails out when the inner operand is MEM
rather than REG, missing the opportunity to narrow sign-extending loads
(e.g. lh -> lhu on RISC-V, ldrsh -> ldrh on AArch64).

Add handling for SIGN_EXTEND of MEM: when the liveness analysis has
already determined the sign bits are dead, replace the sign-extending
load with a zero-extending load via validate_change, which ensures the
target has a matching instruction pattern.

gcc/ChangeLog:

	* ext-dce.cc (ext_dce_try_optimize_extension): Handle
	SIGN_EXTEND of MEM by replacing with ZERO_EXTEND of MEM
	when upper bits are dead.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/ext-dce-1.c: New test.
	* gcc.target/riscv/ext-dce-3.c: New test.
	* gcc.target/riscv/ext-dce-4.c: New test.

Co-authored-by: Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>