| 2022-10-31 Guillermo E. Martinez <guillermo.e.martinez@oracle.com> |
| |
| * btfout.cc (btf_calc_num_vbytes): Compute enumeration size depending of |
| enumerator type btf_enum{,64}. |
| (btf_asm_type): Update btf_kflag according to enumeration type sign |
| using dtd_enum_unsigned field for both: BTF_KIND_ENUM{,64}. |
| (btf_asm_enum_const): New argument to represent the size of |
| the BTF enum type, writing the enumerator constant value for |
| 32 bits, if it's 64 bits then explicitly writes lower 32-bits |
| value and higher 32-bits value. |
| (output_asm_btf_enum_list): Add enumeration size argument. |
| * ctfc.cc (ctf_add_enum): New argument to represent CTF enum |
| basic information. |
| (ctf_add_generic): Use of ei_{name. size, unsigned} to build the |
| dtd structure containing enumeration information. |
| (ctf_add_enumerator): Update comment mention support for BTF |
| enumeration in 64-bits. |
| * dwarf2ctf.cc (gen_ctf_enumeration_type): Extract signedness |
| for enumeration type and use it in ctf_add_enum. |
| * ctfc.h (ctf_dmdef): Update dmd_value to HOST_WIDE_INT to allow |
| use 32/64 bits enumerators. |
| information. |
| (ctf_dtdef): New field to describe enum signedness. |
| |
| 2022-10-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins-bases.cc: Change constexpr back to CONSTEXPR. |
| * config/riscv/riscv-vector-builtins-shapes.cc (SHAPE): Ditto. |
| * config/riscv/riscv-vector-builtins.cc (struct registered_function_hasher): Ditto. |
| * config/riscv/riscv-vector-builtins.h (struct rvv_arg_type_info): Ditto. |
| |
| 2022-10-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (fminmaxop): New iterator. |
| (<fexpander><mode>3): New define_expand. |
| (<fexpander><mode>3<exec>): Likewise. |
| (reduc_<fexpander>_scal_<mode>): Likewise. |
| * config/gcn/gcn.md (fexpander): New attribute. |
| |
| 2022-10-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (V64_SI): Delete iterator. |
| (V64_DI): Likewise. |
| (V64_1REG): Likewise. |
| (V64_INT_1REG): Likewise. |
| (V64_2REG): Likewise. |
| (V64_ALL): Likewise. |
| (V64_FP): Likewise. |
| (reduc_<reduc_op>_scal_<mode>): Use V_ALL. Use gen_vec_extract. |
| (fold_left_plus_<mode>): Use V_FP. |
| (*<reduc_op>_dpp_shr_<mode>): Use V_1REG. |
| (*<reduc_op>_dpp_shr_<mode>): Use V_DI. |
| (*plus_carry_dpp_shr_<mode>): Use V_INT_1REG. |
| (*plus_carry_in_dpp_shr_<mode>): Use V_SI. |
| (*plus_carry_dpp_shr_<mode>): Use V_DI. |
| (mov_from_lane63_<mode>): Delete. |
| (mov_from_lane63_<mode>): Delete. |
| * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Support partial vectors. |
| * config/gcn/gcn.md (unspec): Remove UNSPEC_MOV_FROM_LANE63. |
| |
| 2022-10-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.cc (gcn_simd_clone_compute_vecsize_and_simdlen): |
| Set base_type as ARG_UNUSED. |
| |
| 2022-10-31 Jakub Jelinek <jakub@redhat.com> |
| |
| * builtin-types.def (BT_COMPLEX_FLOAT16, BT_COMPLEX_FLOAT32, |
| BT_COMPLEX_FLOAT64, BT_COMPLEX_FLOAT128, BT_COMPLEX_FLOAT32X, |
| BT_COMPLEX_FLOAT64X, BT_COMPLEX_FLOAT128X, |
| BT_FN_COMPLEX_FLOAT16_COMPLEX_FLOAT16, |
| BT_FN_COMPLEX_FLOAT32_COMPLEX_FLOAT32, |
| BT_FN_COMPLEX_FLOAT64_COMPLEX_FLOAT64, |
| BT_FN_COMPLEX_FLOAT128_COMPLEX_FLOAT128, |
| BT_FN_COMPLEX_FLOAT32X_COMPLEX_FLOAT32X, |
| BT_FN_COMPLEX_FLOAT64X_COMPLEX_FLOAT64X, |
| BT_FN_COMPLEX_FLOAT128X_COMPLEX_FLOAT128X, |
| BT_FN_FLOAT16_COMPLEX_FLOAT16, BT_FN_FLOAT32_COMPLEX_FLOAT32, |
| BT_FN_FLOAT64_COMPLEX_FLOAT64, BT_FN_FLOAT128_COMPLEX_FLOAT128, |
| BT_FN_FLOAT32X_COMPLEX_FLOAT32X, BT_FN_FLOAT64X_COMPLEX_FLOAT64X, |
| BT_FN_FLOAT128X_COMPLEX_FLOAT128X, |
| BT_FN_COMPLEX_FLOAT16_COMPLEX_FLOAT16_COMPLEX_FLOAT16, |
| BT_FN_COMPLEX_FLOAT32_COMPLEX_FLOAT32_COMPLEX_FLOAT32, |
| BT_FN_COMPLEX_FLOAT64_COMPLEX_FLOAT64_COMPLEX_FLOAT64, |
| BT_FN_COMPLEX_FLOAT128_COMPLEX_FLOAT128_COMPLEX_FLOAT128, |
| BT_FN_COMPLEX_FLOAT32X_COMPLEX_FLOAT32X_COMPLEX_FLOAT32X, |
| BT_FN_COMPLEX_FLOAT64X_COMPLEX_FLOAT64X_COMPLEX_FLOAT64X, |
| BT_FN_COMPLEX_FLOAT128X_COMPLEX_FLOAT128X_COMPLEX_FLOAT128X): New. |
| * builtins.def (CABS_TYPE, CACOSH_TYPE, CARG_TYPE, CASINH_TYPE, |
| CPOW_TYPE, CPROJ_TYPE): Define and undefine later. |
| (BUILT_IN_CABS, BUILT_IN_CACOSH, BUILT_IN_CACOS, BUILT_IN_CARG, |
| BUILT_IN_CASINH, BUILT_IN_CASIN, BUILT_IN_CATANH, BUILT_IN_CATAN, |
| BUILT_IN_CCOSH, BUILT_IN_CCOS, BUILT_IN_CEXP, BUILT_IN_CLOG, |
| BUILT_IN_CPOW, BUILT_IN_CPROJ, BUILT_IN_CSINH, BUILT_IN_CSIN, |
| BUILT_IN_CSQRT, BUILT_IN_CTANH, BUILT_IN_CTAN): Add |
| DEF_EXT_LIB_FLOATN_NX_BUILTINS. |
| * fold-const-call.cc (fold_const_call_sc, fold_const_call_cc, |
| fold_const_call_ccc): Add various CASE_CFN_*_FN: cases when |
| CASE_CFN_* is present. |
| * gimple-ssa-backprop.cc (backprop::process_builtin_call_use): |
| Likewise. |
| * builtins.cc (expand_builtin, fold_builtin_1): Likewise. |
| * fold-const.cc (negate_mathfn_p, tree_expr_finite_p, |
| tree_expr_maybe_signaling_nan_p, tree_expr_maybe_nan_p, |
| tree_expr_maybe_real_minus_zero_p, tree_call_nonnegative_warnv_p): |
| Likewise. |
| |
| 2022-10-31 Jakub Jelinek <jakub@redhat.com> |
| |
| * builtin-types.def (BT_FN_BFLOAT16_BFLOAT16_BFLOAT16): New. |
| * builtins.def (BUILT_IN_NEXTAFTERF16B): New builtin. |
| * fold-const-call.cc (fold_const_call_sss): Handle |
| CFN_BUILT_IN_NEXTAFTERF16B. |
| |
| 2022-10-31 Jakub Jelinek <jakub@redhat.com> |
| |
| * builtin-types.def (BT_FLOAT16_PTR, BT_FLOAT32_PTR, BT_FLOAT64_PTR, |
| BT_FLOAT128_PTR, BT_FLOAT32X_PTR, BT_FLOAT64X_PTR, BT_FLOAT128X_PTR): |
| New DEF_PRIMITIVE_TYPE. |
| (BT_FN_INT_FLOAT16, BT_FN_INT_FLOAT32, BT_FN_INT_FLOAT64, |
| BT_FN_INT_FLOAT128, BT_FN_INT_FLOAT32X, BT_FN_INT_FLOAT64X, |
| BT_FN_INT_FLOAT128X, BT_FN_LONG_FLOAT16, BT_FN_LONG_FLOAT32, |
| BT_FN_LONG_FLOAT64, BT_FN_LONG_FLOAT128, BT_FN_LONG_FLOAT32X, |
| BT_FN_LONG_FLOAT64X, BT_FN_LONG_FLOAT128X, BT_FN_LONGLONG_FLOAT16, |
| BT_FN_LONGLONG_FLOAT32, BT_FN_LONGLONG_FLOAT64, |
| BT_FN_LONGLONG_FLOAT128, BT_FN_LONGLONG_FLOAT32X, |
| BT_FN_LONGLONG_FLOAT64X, BT_FN_LONGLONG_FLOAT128X): New |
| DEF_FUNCTION_TYPE_1. |
| (BT_FN_FLOAT16_FLOAT16_FLOAT16PTR, BT_FN_FLOAT32_FLOAT32_FLOAT32PTR, |
| BT_FN_FLOAT64_FLOAT64_FLOAT64PTR, BT_FN_FLOAT128_FLOAT128_FLOAT128PTR, |
| BT_FN_FLOAT32X_FLOAT32X_FLOAT32XPTR, |
| BT_FN_FLOAT64X_FLOAT64X_FLOAT64XPTR, |
| BT_FN_FLOAT128X_FLOAT128X_FLOAT128XPTR, BT_FN_FLOAT16_FLOAT16_INT, |
| BT_FN_FLOAT32_FLOAT32_INT, BT_FN_FLOAT64_FLOAT64_INT, |
| BT_FN_FLOAT128_FLOAT128_INT, BT_FN_FLOAT32X_FLOAT32X_INT, |
| BT_FN_FLOAT64X_FLOAT64X_INT, BT_FN_FLOAT128X_FLOAT128X_INT, |
| BT_FN_FLOAT16_FLOAT16_INTPTR, BT_FN_FLOAT32_FLOAT32_INTPTR, |
| BT_FN_FLOAT64_FLOAT64_INTPTR, BT_FN_FLOAT128_FLOAT128_INTPTR, |
| BT_FN_FLOAT32X_FLOAT32X_INTPTR, BT_FN_FLOAT64X_FLOAT64X_INTPTR, |
| BT_FN_FLOAT128X_FLOAT128X_INTPTR, BT_FN_FLOAT16_FLOAT16_LONG, |
| BT_FN_FLOAT32_FLOAT32_LONG, BT_FN_FLOAT64_FLOAT64_LONG, |
| BT_FN_FLOAT128_FLOAT128_LONG, BT_FN_FLOAT32X_FLOAT32X_LONG, |
| BT_FN_FLOAT64X_FLOAT64X_LONG, BT_FN_FLOAT128X_FLOAT128X_LONG): New |
| DEF_FUNCTION_TYPE_2. |
| (BT_FN_FLOAT16_FLOAT16_FLOAT16_INTPTR, |
| BT_FN_FLOAT32_FLOAT32_FLOAT32_INTPTR, |
| BT_FN_FLOAT64_FLOAT64_FLOAT64_INTPTR, |
| BT_FN_FLOAT128_FLOAT128_FLOAT128_INTPTR, |
| BT_FN_FLOAT32X_FLOAT32X_FLOAT32X_INTPTR, |
| BT_FN_FLOAT64X_FLOAT64X_FLOAT64X_INTPTR, |
| BT_FN_FLOAT128X_FLOAT128X_FLOAT128X_INTPTR): New DEF_FUNCTION_TYPE_3. |
| * builtins.def (ACOSH_TYPE, ATAN2_TYPE, ATANH_TYPE, COSH_TYPE, |
| FDIM_TYPE, HUGE_VAL_TYPE, HYPOT_TYPE, ILOGB_TYPE, LDEXP_TYPE, |
| LGAMMA_TYPE, LLRINT_TYPE, LOG10_TYPE, LRINT_TYPE, MODF_TYPE, |
| NEXTAFTER_TYPE, REMQUO_TYPE, SCALBLN_TYPE, SCALBN_TYPE, SINH_TYPE): |
| Define and undefine later. |
| (FMIN_TYPE, SQRT_TYPE): Undefine at a later line. |
| (INF_TYPE): Define at a later line. |
| (BUILT_IN_ACOSH, BUILT_IN_ACOS, BUILT_IN_ASINH, BUILT_IN_ASIN, |
| BUILT_IN_ATAN2, BUILT_IN_ATANH, BUILT_IN_ATAN, BUILT_IN_CBRT, |
| BUILT_IN_COSH, BUILT_IN_COS, BUILT_IN_ERFC, BUILT_IN_ERF, |
| BUILT_IN_EXP2, BUILT_IN_EXP, BUILT_IN_EXPM1, BUILT_IN_FDIM, |
| BUILT_IN_FMOD, BUILT_IN_FREXP, BUILT_IN_HYPOT, BUILT_IN_ILOGB, |
| BUILT_IN_LDEXP, BUILT_IN_LGAMMA, BUILT_IN_LLRINT, BUILT_IN_LLROUND, |
| BUILT_IN_LOG10, BUILT_IN_LOG1P, BUILT_IN_LOG2, BUILT_IN_LOGB, |
| BUILT_IN_LOG, BUILT_IN_LRINT, BUILT_IN_LROUND, BUILT_IN_MODF, |
| BUILT_IN_NEXTAFTER, BUILT_IN_POW, BUILT_IN_REMAINDER, BUILT_IN_REMQUO, |
| BUILT_IN_SCALBLN, BUILT_IN_SCALBN, BUILT_IN_SINH, BUILT_IN_SIN, |
| BUILT_IN_TANH, BUILT_IN_TAN, BUILT_IN_TGAMMA): Add |
| DEF_EXT_LIB_FLOATN_NX_BUILTINS. |
| (BUILT_IN_HUGE_VAL): Use HUGE_VAL_TYPE instead of INF_TYPE in |
| DEF_GCC_FLOATN_NX_BUILTINS. |
| * fold-const-call.cc (fold_const_call_ss): Add various CASE_CFN_*_FN: |
| cases when CASE_CFN_* is present. |
| (fold_const_call_sss): Likewise. |
| * builtins.cc (mathfn_built_in_2): Use CASE_MATHFN_FLOATN instead of |
| CASE_MATHFN for various builtins in SEQ_OF_CASE_MATHFN macro. |
| (builtin_with_linkage_p): Add CASE_FLT_FN_FLOATN_NX for various |
| builtins next to CASE_FLT_FN. |
| * fold-const.cc (tree_call_nonnegative_warnv_p): Add CASE_CFN_*_FN: |
| next to CASE_CFN_*: for various builtins. |
| * tree-call-cdce.cc (can_test_argument_range): Add |
| CASE_FLT_FN_FLOATN_NX next to CASE_FLT_FN for various builtins. |
| (edom_only_function): Likewise. |
| |
| 2022-10-31 konglin1 <lingling.kong@intel.com> |
| |
| * common/config/i386/i386-common.cc |
| (OPTION_MASK_ISA2_AVXNECONVERT_SET, |
| OPTION_MASK_ISA2_AVXNECONVERT_UNSET): New. |
| (ix86_handle_option): Handle -mavxneconvert, unset |
| avxneconvert when avx2 is disabled. |
| * common/config/i386/i386-cpuinfo.h (processor_types): Add |
| FEATURE_AVXNECONVERT. |
| * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for |
| avxneconvert. |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect avxneconvert. |
| * config.gcc: Add avxneconvertintrin.h |
| * config/i386/avxneconvertintrin.h: New. |
| * config/i386/avx512bf16vlintrin.h (_mm256_cvtneps_pbh): |
| Unified builtin with avxneconvert. |
| (_mm_cvtneps_pbh): Ditto. |
| * config/i386/cpuid.h (bit_AVXNECONVERT): New. |
| * config/i386/i386-builtin-types.def: Add |
| DEF_POINTER_TYPE (PCV8HF, V8HF, CONST), |
| DEF_POINTER_TYPE (PCV8BF, V8BF, CONST), |
| DEF_POINTER_TYPE (PCV16HF, V16HF, CONST), |
| DEF_POINTER_TYPE (PCV16BF, V16BF, CONST), |
| DEF_FUNCTION_TYPE (V4SF, PCBFLOAT16), |
| DEF_FUNCTION_TYPE (V4SF, PCFLOAT16), |
| DEF_FUNCTION_TYPE (V8SF, PCBFLOAT16), |
| DEF_FUNCTION_TYPE (V8SF, PCFLOAT16), |
| DEF_FUNCTION_TYPE (V4SF, PCV8BF), |
| DEF_FUNCTION_TYPE (V4SF, PCV8HF), |
| DEF_FUNCTION_TYPE (V8SF, PCV16HF), |
| DEF_FUNCTION_TYPE (V8SF, PCV16BF), |
| * config/i386/i386-builtin.def: Add new builtins. |
| * config/i386/i386-c.cc (ix86_target_macros_internal): Define |
| __AVXNECONVERT__. |
| * config/i386/i386-expand.cc (ix86_expand_special_args_builtin): |
| Handle V4SF_FTYPE_PCBFLOAT16,V8SF_FTYPE_PCBFLOAT16, V4SF_FTYPE_PCFLOAT16, |
| V8SF_FTYPE_PCFLOAT16,V4SF_FTYPE_PCV8BF, |
| V4SF_FTYPE_PCV8HF,V8SF_FTYPE_PCV16BF,V8SF_FTYPE_PCV16HF. |
| * config/i386/i386-isa.def : Add DEF_PTA(AVXNECONVERT) New. |
| * config/i386/i386-options.cc (isa2_opts): Add -mavxneconvert. |
| (ix86_valid_target_attribute_inner_p): Handle avxneconvert. |
| * config/i386/i386.md: Add attr avx512bf16vl and avxneconvert. |
| * config/i386/i386.opt: Add option -mavxneconvert. |
| * config/i386/immintrin.h: Inculde avxneconvertintrin.h. |
| * config/i386/sse.md (vbcstnebf162ps_<mode>): New define_insn. |
| (vbcstnesh2ps_<mode>): Ditto. |
| (vcvtnee<bf16_ph>2ps_<mode>):Ditto. |
| (vcvtneo<bf16_ph>2ps_<mode>):Ditto. |
| (vcvtneps2bf16_v4sf): Ditto. |
| (*vcvtneps2bf16_v4sf): Ditto. |
| (vcvtneps2bf16_v8sf): Ditto. |
| * doc/invoke.texi: Document -mavxneconvert. |
| * doc/extend.texi: Document avxneconvert. |
| * doc/sourcebuild.texi: Document target avxneconvert. |
| |
| 2022-10-31 konglin1 <lingling.kong@intel.com> |
| |
| * config/i386/avx512bf16intrin.h (__attribute__): Change short to bf16. |
| (_mm_cvtsbh_ss): Ditto. |
| (_mm512_cvtne2ps_pbh): Ditto. |
| (_mm512_mask_cvtne2ps_pbh): Ditto. |
| (_mm512_maskz_cvtne2ps_pbh): Ditto. |
| * config/i386/avx512bf16vlintrin.h (__attribute__): Ditto. |
| (_mm256_cvtne2ps_pbh): Ditto. |
| (_mm256_mask_cvtne2ps_pbh): Ditto. |
| (_mm256_maskz_cvtne2ps_pbh): Ditto. |
| (_mm_cvtne2ps_pbh): Ditto. |
| (_mm_mask_cvtne2ps_pbh): Ditto. |
| (_mm_maskz_cvtne2ps_pbh): Ditto. |
| (_mm_cvtness_sbh): Ditto. |
| * config/i386/i386-builtin-types.def (V8BF): Add new |
| DEF_VECTOR_TYPE for BFmode. |
| (V16BF): Ditto. |
| (V32BF): Ditto. |
| * config/i386/i386-builtin.def (BDESC): Fixed builtins. |
| * config/i386/i386-expand.cc (ix86_expand_args_builtin): Changed |
| avx512bf16 ix86_builtin_func_type included HI to BF. |
| * config/i386/immintrin.h: Add SSE2 depend for avx512bf16. |
| * config/i386/sse.md (TARGET_AVX512VL): Changed HI vector to BF |
| vector. |
| (avx512f_cvtneps2bf16_v4sf): New define_expand. |
| (*avx512f_cvtneps2bf16_v4sf): New define_insn. |
| (avx512f_cvtneps2bf16_v4sf_maskz):Ditto. |
| (avx512f_cvtneps2bf16_v4sf_mask): Ditto. |
| (avx512f_cvtneps2bf16_v4sf_mask_1): Ditto. |
| |
| 2022-10-31 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/107261 |
| * config/i386/i386-modes.def (VECTOR_MODE): Support V2BFmode. |
| * config/i386/i386.cc (classify_argument): Handle V4BFmode and |
| V2BFmode. |
| (ix86_convert_const_vector_to_integer): Ditto. |
| * config/i386/i386.h (VALID_AVX512FP16_REG_MODE): Remove |
| V2BFmode. |
| (VALID_SSE2_REG_MODE): Add V4BFmode and V2BFmode. |
| (VALID_MMX_REG_MODE): Add V4BFmode. |
| * config/i386/i386.md (mode): Add V4BF and V2BF. |
| (MODE_SIZE): Ditto. |
| * config/i386/mmx.md (MMXMODE) Add V4BF. |
| (V_32): Add V2BF. |
| (V_16_32_64): Add V4BF and V2BF. |
| (mmxinsnmode): Add V4BF and V2BF. |
| (*mov<mode>_internal): Hanlde V4BFmode and V2BFmode. |
| |
| 2022-10-29 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * configure.ac (sjlj-exceptions): Restore dropped line. |
| * configure: Regenerate. |
| |
| 2022-10-29 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * alias.cc (init_alias_analysis): Do not record sets to the hard |
| frame pointer if the frame pointer has not been eliminated. |
| |
| 2022-10-29 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config/darwin-d.cc (TARGET_D_MINFO_START_NAME): Rename to ... |
| (TARGET_D_MINFO_SECTION_START): ...this. |
| (TARGET_D_MINFO_END_NAME): Rename to ... |
| (TARGET_D_MINFO_SECTION_END): ... this. |
| * config/elfos.h (TARGET_D_MINFO_SECTION): Remove. |
| (TARGET_D_MINFO_START_NAME): Remove. |
| (TARGET_D_MINFO_END_NAME): Remove. |
| * config/i386/cygwin-d.cc (TARGET_D_MINFO_SECTION): Remove. |
| (TARGET_D_MINFO_START_NAME): Remove. |
| (TARGET_D_MINFO_END_NAME): Remove. |
| * config/i386/winnt-d.cc (TARGET_D_MINFO_SECTION): Remove. |
| (TARGET_D_MINFO_START_NAME): Remove. |
| (TARGET_D_MINFO_END_NAME): Remove. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in (TARGET_D_MINFO_START_NAME): Rename to ... |
| (TARGET_D_MINFO_SECTION_START): ...this. |
| (TARGET_D_MINFO_END_NAME): Rename to ... |
| (TARGET_D_MINFO_SECTION_END): ...this. |
| |
| 2022-10-29 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config.gcc: Split out glibc-d.o into linux-d.o, kfreebsd-d.o, |
| kopensolaris-d.o, and gnu-d.o. Split out cygwin-d.o from winnt-d.o. |
| * config/arm/linux-eabi.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. |
| * config/gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. |
| * config/i386/cygwin.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. |
| * config/i386/linux-common.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. |
| * config/i386/mingw32.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. |
| * config/i386/t-cygming: Add cygwin-d.o. |
| * config/i386/winnt-d.cc (winnt_d_os_builtins): Only add |
| MinGW-specific version condition. |
| * config/kfreebsd-gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. |
| * config/kopensolaris-gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. |
| * config/linux-android.h (ANDROID_TARGET_D_OS_VERSIONS): Remove. |
| * config/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. |
| * config/mips/linux-common.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. |
| * config/t-glibc: Remove glibc-d.o, add gnu-d.o, kfreebsd-d.o, |
| kopensolaris-d.o. |
| * config/t-linux: Add linux-d.o. |
| * config/glibc-d.cc: Remove file. |
| * config/gnu-d.cc: New file. |
| * config/i386/cygwin-d.cc: New file. |
| * config/kfreebsd-d.cc: New file. |
| * config/kopensolaris-d.cc: New file. |
| * config/linux-d.cc: New file. |
| |
| 2022-10-29 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/h8300.cc (pre_incdec_with_reg): Make reg argument |
| an unsigned int |
| * config/h8300/h8300-protos.h (pre_incdec_with_reg): Adjust prototype. |
| |
| 2022-10-28 Joseph Myers <joseph@codesourcery.com> |
| |
| * config/aarch64/aarch64.cc (aarch64_setup_incoming_varargs): |
| Check TYPE_NO_NAMED_ARGS_STDARG_P. |
| * config/alpha/alpha.cc (alpha_setup_incoming_varargs): Likewise. |
| * config/arc/arc.cc (arc_setup_incoming_varargs): Likewise. |
| * config/arm/arm.cc (arm_setup_incoming_varargs): Likewise. |
| * config/csky/csky.cc (csky_setup_incoming_varargs): Likewise. |
| * config/epiphany/epiphany.cc (epiphany_setup_incoming_varargs): |
| Likewise. |
| * config/fr30/fr30.cc (fr30_setup_incoming_varargs): Likewise. |
| * config/frv/frv.cc (frv_setup_incoming_varargs): Likewise. |
| * config/ft32/ft32.cc (ft32_setup_incoming_varargs): Likewise. |
| * config/i386/i386.cc (ix86_setup_incoming_varargs): Likewise. |
| * config/ia64/ia64.cc (ia64_setup_incoming_varargs): Likewise. |
| * config/loongarch/loongarch.cc |
| (loongarch_setup_incoming_varargs): Likewise. |
| * config/m32r/m32r.cc (m32r_setup_incoming_varargs): Likewise. |
| * config/mcore/mcore.cc (mcore_setup_incoming_varargs): Likewise. |
| * config/mips/mips.cc (mips_setup_incoming_varargs): Likewise. |
| * config/mmix/mmix.cc (mmix_setup_incoming_varargs): Likewise. |
| * config/nds32/nds32.cc (nds32_setup_incoming_varargs): Likewise. |
| * config/nios2/nios2.cc (nios2_setup_incoming_varargs): Likewise. |
| * config/riscv/riscv.cc (riscv_setup_incoming_varargs): Likewise. |
| * config/rs6000/rs6000-call.cc (setup_incoming_varargs): Likewise. |
| * config/sh/sh.cc (sh_setup_incoming_varargs): Likewise. |
| * config/visium/visium.cc (visium_setup_incoming_varargs): |
| Likewise. |
| * config/vms/vms-c.cc (vms_c_common_override_options): Do not set |
| flag_allow_parameterless_variadic_functions. |
| * doc/invoke.texi (-fallow-parameterless-variadic-functions): Do |
| not document option. |
| * function.cc (assign_parms): Call assign_parms_setup_varargs for |
| TYPE_NO_NAMED_ARGS_STDARG_P case. |
| * ginclude/stdarg.h [__STDC_VERSION__ > 201710L] (va_start): Make |
| variadic macro. Pass second argument of 0 to __builtin_va_start. |
| * target.def (setup_incoming_varargs): Update documentation. |
| * doc/tm.texi: Regenerate. |
| * tree-core.h (struct tree_type_common): Add |
| no_named_args_stdarg_p. |
| * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Unpack |
| TYPE_NO_NAMED_ARGS_STDARG_P. |
| * tree-streamer-out.cc (pack_ts_type_common_value_fields): Pack |
| TYPE_NO_NAMED_ARGS_STDARG_P. |
| * tree.cc (type_cache_hasher::equal): Compare |
| TYPE_NO_NAMED_ARGS_STDARG_P. |
| (build_function_type): Add argument no_named_args_stdarg_p. |
| (build_function_type_list_1, build_function_type_array_1) |
| (reconstruct_complex_type): Update calls to build_function_type. |
| (stdarg_p, prototype_p): Return true for (...) functions. |
| (gimple_canonical_types_compatible_p): Compare |
| TYPE_NO_NAMED_ARGS_STDARG_P. |
| * tree.h (TYPE_NO_NAMED_ARGS_STDARG_P): New. |
| (build_function_type): Update prototype. |
| |
| 2022-10-28 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/107346 |
| * tree-vect-data-refs.cc (vect_check_gather_scatter): Reject offsets |
| that aren't multiples of BITS_PER_UNIT. |
| |
| 2022-10-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107407 |
| * tree-ssa-dse.cc (dse_classify_store): Perform backedge |
| varying index check when collecting PHI uses rather than |
| after optimizing processing of the candidate defs. |
| |
| 2022-10-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107447 |
| * tree-ssa-loop-im.cc (determine_max_movement): Do not |
| hoist returns-twice calls. |
| |
| 2022-10-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107435 |
| * tree-vect-loop.cc (vectorizable_recurr): Convert initial |
| value to vector component type. |
| |
| 2022-10-28 Julian Brown <julian@codesourcery.com> |
| Thomas Schwinge <thomas@codesourcery.com> |
| |
| PR middle-end/90115 |
| * omp-low.cc (oacc_privatization_candidate_p): Artificial vars are not |
| privatization candidates. |
| |
| 2022-10-28 Martin Liska <mliska@suse.cz> |
| |
| PR sanitizer/107298 |
| * doc/invoke.texi: Document sanitizers can trigger warnings. |
| |
| 2022-10-28 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * doc/makefile.texi (Makefile Targets): Document |
| 'distclean-stage[N]'. |
| |
| 2022-10-28 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (range_tests_floats): Use HONOR_INFINITIES. |
| |
| 2022-10-27 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * config/aarch64/aarch64.h (DONT_USE_BUILTIN_SETJMP): Delete. |
| |
| 2022-10-27 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/107172 |
| * config/i386/i386.md (UNSPEC_CC_NE): New. |
| Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns. |
| |
| 2022-10-27 Andrew Pinski <apinski@marvell.com> |
| |
| * tree-ssa-phiopt.cc: Include tree-ssa-dce.h |
| (replace_phi_edge_with_variable): |
| New argument, dce_ssa_names. Call simple_dce_from_worklist. |
| (match_simplify_replacement): If we inserted a sequence, |
| mark the lhs of the new sequence to be possible dce. |
| Always move the statement and mark the lhs (if it is a name) |
| as possible to remove. |
| |
| 2022-10-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h: Replace constexpr with |
| CONSTEXPR. |
| * config/aarch64/aarch64-sve-builtins-base.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins-functions.h: Likewise. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins.cc: Likewise. |
| * config/aarch64/aarch64.cc: Likewise. |
| * config/aarch64/driver-aarch64.cc: Likewise |
| |
| 2022-10-27 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107394 |
| * value-range-storage.cc (frange_storage_slot::get_frange): Use |
| frange constructor. |
| |
| 2022-10-27 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * optc-save-gen.awk: Clarify 'Init' option property usage for |
| streaming optimization. |
| |
| 2022-10-27 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> |
| Yvan ROUX <yvan.roux@foss.st.com> |
| |
| * ira.cc: Resize array after reg number increased. |
| |
| 2022-10-27 Jiawei <jiawei@iscas.ac.cn> |
| Sinan Lin <sinan@isrc.iscas.ac.cn> |
| |
| * config/riscv/constraints.md (TARGET_ZFINX ? GR_REGS): Set GPRS |
| use while Zfinx is enable. |
| * config/riscv/riscv.cc (riscv_hard_regno_mode_ok): Limit odd |
| registers use when Zdinx enable in RV32 cases. |
| (riscv_option_override): New target enable MASK_FDIV. |
| (riscv_libgcc_floating_mode_supported_p): New error info when |
| use incompatible arch&abi. |
| (riscv_excess_precision): New target enable FLOAT16. |
| |
| 2022-10-27 Jiawei <jiawei@iscas.ac.cn> |
| |
| * config/riscv/iterators.md (TARGET_ZFINX):New target. |
| (TARGET_ZDINX): Ditto. |
| (TARGET_ZHINX): Ditto. |
| * config/riscv/riscv-builtins.cc (AVAIL): Ditto. |
| (riscv_atomic_assign_expand_fenv): Ditto. |
| * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Ditto. |
| * config/riscv/riscv.md: Ditto. |
| |
| 2022-10-27 Jiawei <jiawei@iscas.ac.cn> |
| Sinan Lin <sinan@isrc.iscas.ac.cn> |
| |
| * common/config/riscv/riscv-common.cc: New extensions. |
| * config/riscv/arch-canonicalize: New imply relations. |
| * config/riscv/riscv-opts.h (MASK_ZFINX): New mask. |
| (MASK_ZDINX): Ditto. |
| (MASK_ZHINX): Ditto. |
| (MASK_ZHINXMIN): Ditto. |
| (TARGET_ZFINX): New target. |
| (TARGET_ZDINX): Ditto. |
| (TARGET_ZHINX): Ditto. |
| (TARGET_ZHINXMIN): Ditto. |
| * config/riscv/riscv.opt: New target variable. |
| |
| 2022-10-26 David Faust <david.faust@oracle.com> |
| |
| * config/bpf/bpf.cc: Support __builtin_preserve_field_info. |
| (enum bpf_builtins): Add new builtin. |
| (bpf_init_builtins): Likewise. |
| (bpf_core_field_info): New function. |
| (bpf_expand_builtin): Accomodate new builtin. Refactor adding new |
| relocation to... |
| (maybe_make_core_relo): ... here. New function. |
| (bpf_resolve_overloaded_builtin): Accomodate new builtin. |
| (bpf_core_newdecl): Likewise. |
| (bpf_core_walk): Likewise. |
| (bpf_core_is_maybe_aggregate_access): Improve logic. |
| (struct core_walk_data): New. |
| * config/bpf/coreout.cc (bpf_core_reloc_add): Allow adding different |
| relocation kinds. |
| * config/bpf/coreout.h: Analogous change. |
| * doc/extend.texi: Document BPF __builtin_preserve_field_info. |
| |
| 2022-10-26 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/106393 |
| * doc/invoke.texi: Document -Wdangling-reference. |
| |
| 2022-10-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> |
| |
| * config/xtensa/xtensa.md (movdi): |
| Copy operands[0...1] to ops[0...3] and then use the latter before |
| calling xtensa_split_DI_reg_imm() and emitting insns. |
| |
| 2022-10-26 Alexander Monakov <amonakov@ispras.ru> |
| |
| PR other/107353 |
| * ipa-visibility.cc (function_and_variable_visibility): |
| Conditionally upgrade TLS model instead of asserting. |
| |
| 2022-10-26 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (fold_using_range::fold_stmt): Check if |
| stmt is non-negative and adjust the range. |
| |
| 2022-10-26 Martin Liska <mliska@suse.cz> |
| |
| * common/config/i386/cpuinfo.h (has_cpu_feature): Add comment. |
| (reset_cpu_feature): New. |
| (get_zhaoxin_cpu): Use reset_cpu_feature. |
| |
| 2022-10-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv.cc (riscv_expand_epilogue): Fix statement. |
| |
| 2022-10-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| PR target/107357 |
| * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Set to minimum size. |
| (ADJUST_NUNITS): Adjust according to -march. |
| (ADJUST_BYTESIZE): Ditto. |
| * config/riscv/riscv-protos.h (riscv_v_ext_enabled_vector_mode_p): |
| Remove. |
| (riscv_v_ext_vector_mode_p): Change function implementation. |
| * config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher): |
| Change to riscv_v_ext_vector_mode_p. |
| (register_builtin_type): Ditto. |
| * config/riscv/riscv.cc (riscv_v_ext_vector_mode_p): Change to enabled |
| modes. |
| (ENTRY): Ditto. |
| (riscv_v_ext_enabled_vector_mode_p): Remove. |
| (riscv_v_adjust_nunits): New function. |
| (riscv_vector_mode_supported_p): Use riscv_v_ext_vector_mode_p instead. |
| * config/riscv/riscv.h (riscv_v_adjust_nunits): New function. |
| |
| 2022-10-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config.gcc (riscv*): Add riscv-v.o to extra_objs. |
| * config/riscv/constraints.md (vu): New constraint. |
| (vi): Ditto. |
| (Wc0): Ditto. |
| (Wc1): Ditto. |
| * config/riscv/predicates.md (vector_length_operand): New. |
| (reg_or_mem_operand): Ditto. |
| (vector_move_operand): Ditto. |
| (vector_mask_operand): Ditto. |
| (vector_merge_operand): Ditto. |
| * config/riscv/riscv-protos.h (riscv_regmode_natural_size) New. |
| (riscv_vector::const_vec_all_same_in_range_p): Ditto. |
| (riscv_vector::legitimize_move): Ditto. |
| (tail_policy): Ditto. |
| (mask_policy): Ditto. |
| * config/riscv/riscv-v.cc: New. |
| * config/riscv/riscv-vector-builtins-bases.cc |
| (vsetvl::expand): Refactor how LMUL encoding. |
| * config/riscv/riscv.cc (riscv_print_operand): Update how LMUL |
| print and mask operand print. |
| (riscv_regmode_natural_size): New. |
| * config/riscv/riscv.h (REGMODE_NATURAL_SIZE): New. |
| * config/riscv/riscv.md (mode): Add vector modes. |
| * config/riscv/t-riscv (riscv-v.o) New. |
| * config/riscv/vector-iterators.md: New. |
| * config/riscv/vector.md (vundefined<mode>): New. |
| (mov<mode>): New. |
| (*mov<mode>): New. |
| (@vsetvl<mode>_no_side_effects): New. |
| (@pred_mov<mode>): New. |
| |
| 2022-10-26 Monk Chiang <monk.chiang@sifive.com> |
| |
| * common/config/riscv/riscv-common.cc (riscv_ext_version_table): |
| Add svinval and svnapot extension. |
| (riscv_ext_flag_table): Ditto. |
| * config/riscv/riscv-opts.h (MASK_SVINVAL): New. |
| (MASK_SVNAPOT): Ditto. |
| (TARGET_SVINVAL): Ditto. |
| (TARGET_SVNAPOT): Ditto. |
| * config/riscv/riscv.opt (riscv_sv_subext): New. |
| |
| 2022-10-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-modes.def: Adjust table indentation in commnet. |
| |
| 2022-10-26 Martin Liska <mliska@suse.cz> |
| |
| * configure: Regenerate. |
| |
| 2022-10-26 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Use HONOR_*. |
| (frange::verify_range): Same. |
| * value-range.h (frange_val_min): Same. |
| (frange_val_max): Same. |
| |
| 2022-10-26 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| PR target/106460 |
| * config/rs6000/rs6000.cc (rs6000_cannot_force_const_mem): Return true |
| for HIGH code rtx. |
| |
| 2022-10-26 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.cc (riscv_ext_version_table): |
| Add `h`. |
| (riscv_supported_std_ext): Ditto. |
| (multi_letter_subset_rank): Remove `h`. |
| (riscv_subset_list::parse_std_ext): Handle `h` as single letter |
| extension. |
| (riscv_subset_list::parse): Ditto. |
| |
| 2022-10-25 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * auto-profile.cc (get_combined_location): Include discriminator in the |
| returned combined location. |
| (read_function_instance): Read discriminators from profiles. |
| |
| 2022-10-25 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/107304 |
| * expr.cc (get_inner_reference): Always use TYPE_MODE for vector |
| field with vector raw mode. |
| |
| 2022-10-25 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (CCEITHER): Delete. |
| (CCANY): New. |
| (un): Delete. |
| (isel_<un>signed_<GPR:mode>): Rename to... |
| (isel_<CCANY:mode>_<GPR:mode>): ... this. Adjust. |
| (*isel_reversed_<un>signed_<GPR:mode>): Rename to... |
| (*isel_reversed_<CCANY:mode>_<GPR:mode>): ... this. Adjust. |
| (setbc_<un>signed_<GPR:mode>): Rename to... |
| (setbc_<CCANY:mode>_<GPR:mode>C): ... this. Adjust." |
| (*setbcr_<un>signed_<GPR:mode>): Rename to ... |
| (*setbcr_<CCANY:mode>_<GPR:mode>): ... this. Adjust. |
| (*setnbc_<un>signed_<GPR:mode>): Rename to ... |
| (*setnbc_<CCANY:mode>_<GPR:mode>): ... this. Adjust. |
| (*setnbcr_<un>signed_<GPR:mode>): Rename to ... |
| (*setnbcr_<CCANY:mode>_<GPR:mode>): ... this. Adjust. |
| (eq<mode>3 for GPR): Adjust. |
| (ne<mode>3 for GPR): Adjust. |
| * config/rs6000/rs6000-string.cc (do_isel): Adjust. |
| * config/rs6000/rs6000.cc (rs6000_emit_int_cmove): Adjust. |
| |
| 2022-10-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107176 |
| PR tree-optimization/66375 |
| PR tree-optimization/42512 |
| * tree-scalar-evolution.cc (follow_ssa_edge_expr): Revert |
| the PR66375 fix, do not not associate PLUS_EXPR to be able |
| to use tail-recursion. |
| (follow_ssa_edge_binary): Likewise. |
| (interpret_loop_phi): Revert PR42512 fix, do not throw |
| away analyze_evolution_in_loop result after the fact. |
| (follow_ssa_edge_expr): When reaching halting_phi initalize |
| the evolution to the symbolic value of the PHI result. |
| (add_to_evolution_1): When adding the first evolution verify |
| we can handle the expression wrapping the symbolic evolution |
| and replace that in full using the initial condition. |
| (class scev_dfs): New, contains ... |
| (follow_ssa_edge_expr, follow_ssa_edge_binary, |
| follow_ssa_edge_in_condition_phi_branch, |
| follow_ssa_edge_in_condition_phi, |
| follow_ssa_edge_inner_loop_phi, |
| add_to_evolution, add_to_evolution_1): ... these with |
| loop and halting_phi arguments in class data. |
| (scev_dfs::get_ev): New toplevel DFS entry, start with |
| a chrec_dont_know evolution. |
| (analyze_evolution_in_loop): Use scev_dfs. |
| |
| 2022-10-25 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * profile.cc (branch_prob): Be prepared for ignored functions with |
| DECL_SOURCE_LOCATION set to UNKNOWN_LOCATION. |
| |
| 2022-10-25 Richard Biener <rguenther@suse.de> |
| |
| * tree-scalar-evolution.cc (follow_ssa_edge_expr): Move |
| STRIP_USELESS_TYPE_CONVERSIONS to where it matters. |
| |
| 2022-10-25 Tejas Joshi <TejasSanjay.Joshi@amd.com> |
| |
| * common/config/i386/i386-common.cc (processor_alias_table): Use |
| CPU_ZNVER3 for znver4. |
| * config/i386/znver.md: Remove znver4 reservations. |
| |
| 2022-10-25 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.cc (gimple_boolify): Fix comment typos, prduce -> produce |
| and There -> These. |
| |
| 2022-10-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/107368 |
| * gimplify.cc (gimplify_call_expr): For complex IFN_ASSUME |
| conditions call gimple_boolify on the condition. |
| |
| 2022-10-25 YunQiang Su <yunqiang.su@cipunited.com> |
| |
| * config.gcc: add -with-compact-branches=policy build option. |
| * doc/install.texi: Likewise. |
| * config/mips/mips.h: Likewise. |
| |
| 2022-10-25 YunQiang Su <yunqiang.su@cipunited.com> |
| |
| * config/mips/mips.cc (mips_option_override): not trigger error |
| for compact-branches=always for pre-R6. |
| * config/mips/mips.h (TARGET_RTP_PIC): not trigger error for |
| compact-branches=always for pre-R6. |
| (TARGET_CB_NEVER): Likewise. |
| (TARGET_CB_ALWAYS): Likewise. |
| (struct mips_cpu_info): define macros for compact branch policy. |
| * doc/invoke.texi: Document "always" with pre-R6. |
| |
| 2022-10-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/107369 |
| * gimplify.cc (gimplify_call_expr): If seen_error, handle complex |
| IFN_ASSUME the same as for -O0. |
| |
| 2022-10-25 YunQiang Su <yunqiang.su@cipunited.com> |
| |
| * configure.ac: AC_DEFINE(ENABLE_MULTIARCH, 1) |
| * configure: Regenerated. |
| * config.in: Regenerated. |
| * config/mips/mips.h: don't define STANDARD_STARTFILE_PREFIX_1 |
| if ENABLE_MULTIARCH is defined. |
| * config/mips/t-linux64: define correct multiarch path when |
| multiarch is enabled. |
| |
| 2022-10-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/100756 |
| * tree-ssa-loop-niter.cc (expand_simple_operations): Also |
| expand multiplications by invariants. |
| |
| 2022-10-25 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR tree-optimization/107338 |
| * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Move |
| shfit_n calculation before the adjustments for widening loads. |
| |
| 2022-10-25 Martin Liska <mliska@suse.cz> |
| |
| * common/config/riscv/riscv-common.cc |
| (riscv_get_valid_option_values): Get out of ifdef. |
| |
| 2022-10-25 Martin Liska <mliska@suse.cz> |
| |
| PR target/107364 |
| * common/config/i386/i386-cpuinfo.h (enum processor_vendor): |
| Fix pedantic warning. |
| |
| 2022-10-24 Martin Liska <mliska@suse.cz> |
| |
| PR analyzer/107366 |
| * diagnostic-format-sarif.cc |
| (sarif_builder::maybe_make_physical_location_object): Gracefully |
| reject locations with NULL filename. |
| |
| 2022-10-24 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/106300 |
| * doc/invoke.texi (Static Analyzer Options): Add "pipe" and |
| "pipe2" to the list of functions the analyzer has hardcoded |
| knowledge of. |
| |
| 2022-10-24 Jason Merrill <jason@redhat.com> |
| |
| * tree.h (build_string_literal): New one-argument overloads that |
| take tree (identifier) and const char *. |
| * builtins.cc (fold_builtin_FILE) |
| (fold_builtin_FUNCTION) |
| * gimplify.cc (gimple_add_init_for_auto_var) |
| * vtable-verify.cc (verify_bb_vtables): Simplify calls. |
| |
| 2022-10-24 Martin Liska <mliska@suse.cz> |
| |
| PR target/107364 |
| * common/config/i386/i386-cpuinfo.h (enum processor_vendor): |
| Reorder enum values as BUILTIN_VENDOR_MAX should not point |
| in the middle of the valid enum values. |
| |
| 2022-10-24 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/107276 |
| * tree.cc (maybe_wrap_with_location): Don't create a location wrapper |
| when the type is erroneous. |
| |
| 2022-10-24 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR target/106583 |
| * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate) |
| Add support for a bitmask immediate with 2 MOVKs. |
| (aarch64_check_bitmask): New function after refactorization. |
| (aarch64_bitmask_imm): Simplify replication of small modes. |
| Split function into 64-bit only version for efficiency. |
| (aarch64_move_imm): Move near other immediate functions. |
| (aarch64_uimm12_shift): Likewise. |
| (aarch64_clamp_to_uimm12_shift): Likewise. |
| (aarch64_movk_shift): Likewise. |
| (aarch64_replicate_bitmask_imm): Likewise. |
| (aarch64_and_split_imm1): Likewise. |
| (aarch64_and_split_imm2): Likewise. |
| (aarch64_and_bitmask_imm): Likewise. |
| (aarch64_movw_imm): Likewise. |
| |
| 2022-10-24 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107355 |
| * range-op-float.cc (foperator_abs::op1_range): Handle NAN. |
| |
| 2022-10-24 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR middle-end/107236 |
| * omp-expand.cc (expand_omp_target): Set calls_declare_variant_alt |
| in DECL_CONTEXT and not to cfun->decl. |
| * cgraphclones.cc (cgraph_node::create_clone): Copy also the |
| node's calls_declare_variant_alt value. |
| |
| 2022-10-24 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.cc (riscv_tunes): New. |
| (riscv_get_valid_option_values): New. |
| (TARGET_GET_VALID_OPTION_VALUES): New. |
| * config/riscv/riscv-cores.def (RISCV_TUNE): New, define options |
| for tune here. |
| (RISCV_CORE): Fix comment. |
| * config/riscv/riscv.cc (riscv_tune_info_table): Move definition to |
| riscv-cores.def. |
| |
| 2022-10-24 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107365 |
| * value-range.cc (frange::verify_range): Predicate NAN check in |
| VARYING range on HONOR_NANS instead of flag_finite_math_only. |
| (range_tests_floats): Same. |
| (range_tests_floats_various): New. |
| (range_tests): Call range_tests_floats_various. |
| |
| 2022-10-24 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> |
| Yvan ROUX <yvan.roux@foss.st.com> |
| |
| * lto-wrapper.cc: Quote paths in makefile. |
| |
| 2022-10-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv.cc (riscv_legitimize_move): Support (set (mem) (const_poly_int)). |
| |
| 2022-10-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins-bases.cc: Replace CONSTEXPR |
| with constexpr throughout. |
| * config/riscv/riscv-vector-builtins-shapes.cc (SHAPE): Likewise. |
| * config/riscv/riscv-vector-builtins.cc |
| (struct registered_function_hasher): Likewise. |
| * config/riscv/riscv-vector-builtins.h (struct rvv_arg_type_info): |
| Likewise. |
| |
| 2022-10-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes. |
| |
| 2022-10-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv.h (REG_CLASS_CONTENTS): Fix ALL_REGS. |
| |
| 2022-10-22 Michael Eager <eager@eagercon.com> |
| |
| * config/microblaze/microblaze.cc |
| (microblaze_legitimize_address): Initialize 'reg' to NULL, check for NULL. |
| (microblaze_address_insns): Replace abort() with gcc_unreachable(). |
| (print_operand_address): Same. |
| (microblaze_expand_move): Initialize 'p1' to NULL, check for NULL. |
| (get_branch_target): Replace abort() with gcc_unreachable(). |
| |
| 2022-10-22 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (range_tests_floats): Predicate [-Inf, +Inf] test |
| with !flag_finite_math_only. |
| |
| 2022-10-22 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> |
| |
| * config/xtensa/xtensa.cc (xtensa_conditional_register_usage): |
| Remove register A0 from FIXED_REGS if the CALL0 ABI. |
| (xtensa_expand_epilogue): Change to emit '(use (reg:SI A0_REG))' |
| unconditionally after restoring callee-saved registers for |
| sibling-call functions, in order to prevent misleading that |
| register A0 is free to use. |
| |
| 2022-10-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/107322 |
| * config/i386/i386-expand.cc (ix86_prepare_fp_compare_args): For |
| BFmode comparisons promote arguments to SFmode and recurse. |
| (ix86_expand_int_movcc, ix86_expand_fp_movcc): Return false early |
| if comparison operands are BFmode and operands[1] is not |
| ix86_fp_comparison_operator. |
| |
| 2022-10-21 Tejas Joshi <TejasSanjay.Joshi@amd.com> |
| |
| * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver4. |
| * common/config/i386/i386-common.cc (processor_names): Add znver4. |
| (processor_alias_table): Add znver4 and modularize old znvers. |
| * common/config/i386/i386-cpuinfo.h (processor_subtypes): |
| AMDFAM19H_ZNVER4. |
| * config.gcc (x86_64-*-* |...): Likewise. |
| * config/i386/driver-i386.cc (host_detect_local_cpu): Let |
| -march=native recognize znver4 cpus. |
| * config/i386/i386-c.cc (ix86_target_macros_internal): Add znver4. |
| * config/i386/i386-options.cc (m_ZNVER4): New definition. |
| (m_ZNVER): Include m_ZNVER4. |
| (processor_cost_table): Add znver4. |
| * config/i386/i386.cc (ix86_reassociation_width): Likewise. |
| * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER4. |
| (PTA_ZNVER1): New definition. |
| (PTA_ZNVER2): Likewise. |
| (PTA_ZNVER3): Likewise. |
| (PTA_ZNVER4): Likewise. |
| * config/i386/i386.md (define_attr "cpu"): Add znver4 and rename |
| md file. |
| * config/i386/x86-tune-costs.h (znver4_cost): New definition. |
| * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver4. |
| (ix86_adjust_cost): Likewise. |
| * config/i386/znver1.md: Rename to znver.md. |
| * config/i386/znver.md: Add new reservations for znver4. |
| * doc/extend.texi: Add details about znver4. |
| * doc/invoke.texi: Likewise. |
| |
| 2022-10-21 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107323 |
| * tree-loop-distribution.cc (pg_unmark_merged_alias_ddrs): |
| New function. |
| (loop_distribution::break_alias_scc_partitions): Revert |
| postorder save/restore from the PR94125 fix. Instead |
| make sure to not ignore edges from SCCs we are going to |
| merge. |
| |
| 2022-10-21 Monk Chiang <monk.chiang@sifive.com> |
| |
| * config/riscv/riscv.md: Add atomic type attribute. |
| * config/riscv/sync.md: Add atomic type for atomic instructions. |
| |
| 2022-10-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/54346 |
| * match.pd ((vec_perm (vec_perm@0 @1 @2 VECTOR_CST) @0 VECTOR_CST)): |
| Optimize nested VEC_PERM_EXPRs even if target can't handle the |
| new one provided we don't increase number of VEC_PERM_EXPRs the |
| target can't handle. |
| |
| 2022-10-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config.gcc: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o |
| * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro. |
| (DEF_RVV_FUNCTION): Ditto. |
| (handle_pragma_vector): Add intrinsic framework. |
| * config/riscv/riscv.cc (riscv_print_operand): Add operand print for vsetvl/vsetvlmax. |
| * config/riscv/riscv.md: include vector.md. |
| * config/riscv/t-riscv: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o |
| * config/riscv/riscv-vector-builtins-bases.cc: New file. |
| * config/riscv/riscv-vector-builtins-bases.h: New file. |
| * config/riscv/riscv-vector-builtins-functions.def: New file. |
| * config/riscv/riscv-vector-builtins-shapes.cc: New file. |
| * config/riscv/riscv-vector-builtins-shapes.h: New file. |
| * config/riscv/riscv-vector-builtins-types.def: New file. |
| * config/riscv/vector.md: New file. |
| |
| 2022-10-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config.gcc: Add gt files since function_instance is GTY ((user)). |
| * config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV intrinsic framework. |
| (riscv_builtin_decl): Ditto. |
| (riscv_expand_builtin): Ditto. |
| * config/riscv/riscv-protos.h (builtin_decl): New function. |
| (expand_builtin): Ditto. |
| (enum riscv_builtin_class): New enum to classify RVV intrinsic and RISC-V general built-in. |
| * config/riscv/riscv-vector-builtins.cc (class GTY): New declaration. |
| (struct registered_function_hasher): New struct. |
| (DEF_RVV_OP_TYPE): New macro. |
| (DEF_RVV_TYPE): Ditto. |
| (DEF_RVV_PRED_TYPE): Ditto. |
| (GTY): New declaration. |
| (add_attribute): New function. |
| (check_required_extensions): Ditto. |
| (rvv_arg_type_info::get_tree_type): Ditto. |
| (function_instance::function_instance): Ditto. |
| (function_instance::operator==): Ditto. |
| (function_instance::any_type_float_p): Ditto. |
| (function_instance::get_return_type): Ditto. |
| (function_instance::get_arg_type): Ditto. |
| (function_instance::hash): Ditto. |
| (function_instance::call_properties): Ditto. |
| (function_instance::reads_global_state_p): Ditto. |
| (function_instance::modifies_global_state_p): Ditto. |
| (function_instance::could_trap_p): Ditto. |
| (function_builder::function_builder): Ditto. |
| (function_builder::~function_builder): Ditto. |
| (function_builder::allocate_argument_types): Ditto. |
| (function_builder::register_function_group): Ditto. |
| (function_builder::append_name): Ditto. |
| (function_builder::finish_name): Ditto. |
| (function_builder::get_attributes): Ditto. |
| (function_builder::add_function): Ditto. |
| (function_builder::add_unique_function): Ditto. |
| (function_call_info::function_call_info): Ditto. |
| (function_expander::function_expander): Ditto. |
| (function_expander::add_input_operand): Ditto. |
| (function_expander::generate_insn): Ditto. |
| (registered_function_hasher::hash): Ditto. |
| (registered_function_hasher::equal): Ditto. |
| (builtin_decl): Ditto. |
| (expand_builtin): Ditto. |
| (gt_ggc_mx): Define for using GCC garbage collect. |
| (gt_pch_nx): Define for using GCC garbage collect. |
| * config/riscv/riscv-vector-builtins.def (DEF_RVV_OP_TYPE): New macro. |
| (DEF_RVV_PRED_TYPE): Ditto. |
| (vbool64_t): Add suffix. |
| (vbool32_t): Ditto. |
| (vbool16_t): Ditto. |
| (vbool8_t): Ditto. |
| (vbool4_t): Ditto. |
| (vbool2_t): Ditto. |
| (vbool1_t): Ditto. |
| (vint8mf8_t): Ditto. |
| (vuint8mf8_t): Ditto. |
| (vint8mf4_t): Ditto. |
| (vuint8mf4_t): Ditto. |
| (vint8mf2_t): Ditto. |
| (vuint8mf2_t): Ditto. |
| (vint8m1_t): Ditto. |
| (vuint8m1_t): Ditto. |
| (vint8m2_t): Ditto. |
| (vuint8m2_t): Ditto. |
| (vint8m4_t): Ditto. |
| (vuint8m4_t): Ditto. |
| (vint8m8_t): Ditto. |
| (vuint8m8_t): Ditto. |
| (vint16mf4_t): Ditto. |
| (vuint16mf4_t): Ditto. |
| (vint16mf2_t): Ditto. |
| (vuint16mf2_t): Ditto. |
| (vint16m1_t): Ditto. |
| (vuint16m1_t): Ditto. |
| (vint16m2_t): Ditto. |
| (vuint16m2_t): Ditto. |
| (vint16m4_t): Ditto. |
| (vuint16m4_t): Ditto. |
| (vint16m8_t): Ditto. |
| (vuint16m8_t): Ditto. |
| (vint32mf2_t): Ditto. |
| (vuint32mf2_t): Ditto. |
| (vint32m1_t): Ditto. |
| (vuint32m1_t): Ditto. |
| (vint32m2_t): Ditto. |
| (vuint32m2_t): Ditto. |
| (vint32m4_t): Ditto. |
| (vuint32m4_t): Ditto. |
| (vint32m8_t): Ditto. |
| (vuint32m8_t): Ditto. |
| (vint64m1_t): Ditto. |
| (vuint64m1_t): Ditto. |
| (vint64m2_t): Ditto. |
| (vuint64m2_t): Ditto. |
| (vint64m4_t): Ditto. |
| (vuint64m4_t): Ditto. |
| (vint64m8_t): Ditto. |
| (vuint64m8_t): Ditto. |
| (vfloat32mf2_t): Ditto. |
| (vfloat32m1_t): Ditto. |
| (vfloat32m2_t): Ditto. |
| (vfloat32m4_t): Ditto. |
| (vfloat32m8_t): Ditto. |
| (vfloat64m1_t): Ditto. |
| (vfloat64m2_t): Ditto. |
| (vfloat64m4_t): Ditto. |
| (vfloat64m8_t): Ditto. |
| (vv): Ditto. |
| (vx): Ditto. |
| (v): Ditto. |
| (wv): Ditto. |
| (wx): Ditto. |
| (x_x_v): Ditto. |
| (vf2): Ditto. |
| (vf4): Ditto. |
| (vf8): Ditto. |
| (vvm): Ditto. |
| (vxm): Ditto. |
| (x_x_w): Ditto. |
| (v_v): Ditto. |
| (v_x): Ditto. |
| (vs): Ditto. |
| (mm): Ditto. |
| (m): Ditto. |
| (vf): Ditto. |
| (vm): Ditto. |
| (wf): Ditto. |
| (vfm): Ditto. |
| (v_f): Ditto. |
| (ta): Ditto. |
| (tu): Ditto. |
| (ma): Ditto. |
| (mu): Ditto. |
| (tama): Ditto. |
| (tamu): Ditto. |
| (tuma): Ditto. |
| (tumu): Ditto. |
| (tam): Ditto. |
| (tum): Ditto. |
| * config/riscv/riscv-vector-builtins.h (GCC_RISCV_VECTOR_BUILTINS_H): New macro. |
| (RVV_REQUIRE_RV64BIT): Ditto. |
| (RVV_REQUIRE_ZVE64): Ditto. |
| (RVV_REQUIRE_ELEN_FP_32): Ditto. |
| (RVV_REQUIRE_ELEN_FP_64): Ditto. |
| (enum operand_type_index): New enum. |
| (DEF_RVV_OP_TYPE): New macro. |
| (enum predication_type_index): New enum. |
| (DEF_RVV_PRED_TYPE): New macro. |
| (enum rvv_base_type): New enum. |
| (struct rvv_builtin_suffixes): New struct. |
| (struct rvv_arg_type_info): Ditto. |
| (struct rvv_type_info): Ditto. |
| (struct rvv_op_info): Ditto. |
| (class registered_function): New class. |
| (class function_base): Ditto. |
| (class function_shape): Ditto. |
| (struct function_group_info): New struct. |
| (class GTY): New class. |
| (class function_builder): Ditto. |
| (class function_call_info): Ditto. |
| (function_call_info::function_returns_void_p): New function. |
| (class function_expander): New class. |
| (function_instance::operator!=): New function. |
| (function_expander::expand): Ditto. |
| (function_expander::add_input_operand): Ditto. |
| (function_base::call_properties): Ditto. |
| |
| 2022-10-21 Haochen Jiang <haochen.jiang@intel.com> |
| |
| * config/i386/sse.md (ssedvecmode): Rename from VI1SI. |
| (ssedvecmodelower): Rename from vi1si. |
| (sdot_prod<mode>): New define_expand. |
| (udot_prod<mode>): Ditto. |
| |
| 2022-10-21 Kong Lingling <lingling.kong@intel.com> |
| Hongyu Wang <hongyu.wang@intel.com> |
| Haochen Jiang <haochen.jiang@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): Detect |
| avxvnniint8. |
| * common/config/i386/i386-common.cc |
| (OPTION_MASK_ISA2_AVXVNNIINT8_SET): New. |
| (OPTION_MASK_ISA2_AVXVNNIINT8_UNSET): Ditto. |
| (ix86_handle_option): Handle -mavxvnniint8. |
| * common/config/i386/i386-cpuinfo.h (enum processor_features): |
| Add FEATURE_AVXVNNIINT8. |
| * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for |
| avxvnniint8. |
| * config.gcc: Add avxvnniint8intrin.h. |
| * config/i386/avxvnniint8intrin.h: New file. |
| * config/i386/cpuid.h (bit_AVXVNNIINT8): New. |
| * config/i386/i386-builtin.def: Add new builtins. |
| * config/i386/i386-c.cc (ix86_target_macros_internal): Define |
| __AVXVNNIINT8__. |
| * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint8. |
| (ix86_valid_target_attribute_inner_p): Handle avxvnniint8. |
| * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT8) New.. |
| * config/i386/i386.opt: Add option -mavxvnniint8. |
| * config/i386/immintrin.h: Include avxvnniint8intrin.h. |
| * config/i386/sse.md (UNSPEC_VPMADDUBSWACCD |
| UNSPEC_VPMADDUBSWACCSSD,UNSPEC_VPMADDWDACCD, |
| UNSPEC_VPMADDWDACCSSD): Rename according to new style. |
| (vpdp<vpdotprodtype>_<mode>): New define_insn. |
| * doc/extend.texi: Document avxvnniint8. |
| * doc/invoke.texi: Document -mavxvnniint8. |
| * doc/sourcebuild.texi: Document target avxvnniint8. |
| |
| 2022-10-21 Hongyu Wang <hongyu.wang@intel.com> |
| |
| * common/config/i386/i386-common.cc |
| (OPTION_MASK_ISA_AVXIFMA_SET, OPTION_MASK_ISA2_AVXIFMA_UNSET, |
| OPTION_MASK_ISA2_AVX2_UNSET): New macro. |
| (ix86_handle_option): Handle -mavxifma. |
| * common/config/i386/i386-cpuinfo.h (processor_types): Add |
| FEATURE_AVXIFMA. |
| * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for |
| avxifma. |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect avxifma. |
| * config.gcc: Add avxifmaintrin.h |
| * config/i386/avx512ifmavlintrin.h: (_mm_madd52lo_epu64): Change |
| to macro. |
| (_mm_madd52hi_epu64): Likewise. |
| (_mm256_madd52lo_epu64): Likewise. |
| (_mm256_madd52hi_epu64): Likewise. |
| * config/i386/avxifmaintrin.h: New header. |
| * config/i386/cpuid.h (bit_AVXIFMA): New. |
| * config/i386/i386-builtin.def: Add new builtins, and correct |
| pattern names for AVX512IFMA. |
| * config/i386/i386-builtins.cc (def_builtin): Handle AVX-IFMA |
| builtins like AVX-VNNI. |
| * config/i386/i386-c.cc (ix86_target_macros_internal): Define |
| __AVXIFMA__. |
| * config/i386/i386-expand.cc (ix86_check_builtin_isa_match): |
| Relax ISA masks for AVXIFMA. |
| * config/i386/i386-isa.def: Add AVXIFMA. |
| * config/i386/i386-options.cc (isa2_opts): Add -mavxifma. |
| (ix86_valid_target_attribute_inner_p): Handle avxifma. |
| * config/i386/i386.md (isa): Add attr avxifma and avxifmavl. |
| * config/i386/i386.opt: Add option -mavxifma. |
| * config/i386/immintrin.h: Inculde avxifmaintrin.h. |
| * config/i386/sse.md (avx_vpmadd52<vpmadd52type>_<mode>): |
| Remove. |
| (vpamdd52<vpmadd52type><mode><sd_maskz_name>): Remove. |
| (vpamdd52huq<mode>_maskz): Rename to ... |
| (vpmadd52huq<mode>_maskz): ... this. |
| (vpamdd52luq<mode>_maskz): Rename to ... |
| (vpmadd52luq<mode>_maskz): ... this. |
| (vpmadd52<vpmadd52type><mode>): New define_insn. |
| (vpmadd52<vpmadd52type>v8di): Likewise. |
| (vpmadd52<vpmadd52type><mode>_maskz_1): Likewise. |
| (vpamdd52<vpmadd52type><mode>_mask): Rename to ... |
| (vpmadd52<vpmadd52type><mode>_mask): ... this. |
| * doc/invoke.texi: Document -mavxifma. |
| * doc/extend.texi: Document avxifma. |
| * doc/sourcebuild.texi: Document target avxifma. |
| |
| 2022-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR c++/106654 |
| * value-query.cc (get_range_global): Handle non integer ranges for |
| default def SSA names. |
| |
| 2022-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_unordered_lt::op1_range): New. |
| (foperator_unordered_lt::op2_range): New. |
| |
| 2022-10-20 Artem Klimov <jakmobius@gmail.com> |
| Alexander Monakov <amonakov@gcc.gnu.org> |
| |
| PR middle-end/99619 |
| * ipa-visibility.cc (function_and_variable_visibility): Promote |
| TLS access model afer visibility optimizations. |
| * varasm.cc (have_optimized_refs): New helper. |
| (optimize_dyn_tls_for_decl_p): New helper. Use it ... |
| (decl_default_tls_model): ... here in place of 'optimize' check. |
| |
| 2022-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_unordered_le::op1_range): Adjust |
| false side with a NAN operand. |
| (foperator_unordered_le::op2_range): Same. |
| (foperator_unordered_gt::op1_range): Same. |
| (foperator_unordered_gt::op2_range): Same. |
| (foperator_unordered_ge::op1_range): Same. |
| (foperator_unordered_ge::op2_range): Same. |
| (foperator_unordered_equal::op1_range): Same. |
| |
| 2022-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/107326 |
| * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Change |
| vectype when widening container. |
| |
| 2022-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (frange::set_varying): Do not set NAN flags for |
| !HONOR_NANS. |
| * value-range.cc (frange::normalize_kind): Adjust for no NAN when |
| !HONOR_NANS. |
| (frange::verify_range): Same. |
| * range-op-float.cc (maybe_isnan): Remove flag_finite_math_only check. |
| |
| 2022-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (finite_operand_p): Remove. |
| (finite_operands_p): Rename to... |
| (maybe_isnan): ...this. |
| (frelop_early_resolve): Use maybe_isnan instead of finite_operands_p. |
| (foperator_equal::fold_range): Same. |
| (foperator_equal::op1_range): Same. |
| (foperator_not_equal::fold_range): Same. |
| (foperator_lt::fold_range): Same. |
| (foperator_le::fold_range): Same. |
| (foperator_gt::fold_range): Same. |
| (foperator_ge::fold_range): Same. |
| |
| 2022-10-20 Jakub Jelinek <jakub@redhat.com> |
| |
| * passes.cc (pass_manager::register_pass): Fix a comment |
| typo - copmilation -> compilation. |
| |
| 2022-10-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.cc (vect_phi_first_order_recurrence_p): |
| Disallow latch PHI defs. |
| (vectorizable_recurr): Revert previous change. |
| |
| 2022-10-20 Julian Brown <julian@codesourcery.com> |
| |
| PR target/105421 |
| * config/gcn/gcn.cc (gcn_detect_incoming_pointer_arg): Any pointer |
| argument forces FLAT addressing mode, not just |
| pointer-to-non-aggregate. |
| |
| 2022-10-20 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * configure.ac (AC_CONFIG_MACRO_DIRS): Instantiate. |
| * configure: Regenerate. |
| |
| 2022-10-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins.h |
| (gimple_folder::fold_to_cstu): New member function. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (gimple_folder::fold_to_cstu): Define. |
| * config/aarch64/aarch64-sve-builtins-base.cc |
| (svcnt_bhwd_impl::fold): Use it. |
| |
| 2022-10-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-functions.h (quiet) |
| (rtx_code_function, rtx_code_function_rotated, unspec_based_function) |
| (unspec_based_function_rotated, unspec_based_function_exact_insn) |
| (unspec_based_fused_function, unspec_based_fused_lane_function): |
| Replace constructors with using directives. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svcnt_bhwd_pat_impl) |
| (svcreate_impl, svdotprod_lane_impl, svget_impl, svld1_extend_impl) |
| (svld1_gather_extend_impl, svld234_impl, svldff1_gather_extend) |
| (svset_impl, svst1_scatter_truncate_impl, svst1_truncate_impl) |
| (svst234_impl, svundef_impl): Likewise. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc |
| (svldnt1_gather_extend_impl, svmovl_lb_impl): Likewise. |
| (svstnt1_scatter_truncate_impl): Likewise. |
| |
| 2022-10-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-base.cc: Replace CONSTEXPR |
| with constexpr throughout. |
| * config/aarch64/aarch64-sve-builtins-functions.h: Likewise. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins.cc: Likewise. |
| |
| 2022-10-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (*aarch64_brk<brk_op>_cc): Remove |
| merging alternative. |
| (*aarch64_brk<brk_op>_ptest): Likewise. |
| |
| 2022-10-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/iterators.md (SVE_BRKP): New iterator. |
| * config/aarch64/aarch64-sve.md (*aarch64_brkn_cc): New pattern. |
| (*aarch64_brkn_ptest): Likewise. |
| (*aarch64_brk<brk_op>_cc): Restrict to SVE_BRKP. |
| (*aarch64_brk<brk_op>_ptest): Likewise. |
| |
| 2022-10-20 Richard Biener <rguenther@suse.de> |
| |
| PR c/107305 |
| PR c/107306 |
| * tree-cfg.h (verify_gimple_in_seq): Add parameter to |
| indicate whether to emit an ICE. Add return value. |
| (verify_gimple_in_cfg): Likewise. |
| * tree-cfg.cc (verify_gimple_in_seq): Likewise. |
| (verify_gimple_in_cfg): Likewise. |
| |
| 2022-10-20 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107240 |
| * tree-vect-patterns.cc (vect_recog_bit_insert_pattern): Attempt to |
| simplify shifted value first. |
| |
| 2022-10-20 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-gori.h (compute_operand_range): Make public. |
| * gimple-range-infer.cc (gimple_infer_range::check_assume_func): New. |
| (gimple_infer_range::gimple_infer_range): Check for assume calls. |
| * gimple-range-infer.h (check_assume_func): Add prototype. |
| * gimple-range.cc (assume_query::assume_range_p): New. |
| (assume_query::range_of_expr): New. |
| (assume_query::assume_query): New. |
| (assume_query::calculate_op): New. |
| (assume_query::calculate_phi): New. |
| (assume_query::check_taken_edge): New. |
| (assume_query::calculate_stmt): New. |
| (assume_query::dump): New. |
| * gimple-range.h (class assume_query): New. |
| * tree-vrp.cc (pass_assumptions::execute): Add processing. |
| |
| 2022-10-19 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (build_le): Document result. |
| (build_lt): Same. |
| (build_ge): Same. |
| (foperator_ge::op2_range): Check result of build_*. |
| (foperator_unordered_le::op1_range): Same. |
| (foperator_unordered_le::op2_range): Same. |
| (foperator_unordered_gt::op1_range): Same. |
| (foperator_unordered_gt::op2_range): Same. |
| (foperator_unordered_ge::op1_range): Same. |
| (foperator_unordered_ge::op2_range): Same. |
| |
| 2022-10-19 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/85043 |
| * doc/invoke.texi: Update documentation of -Wuseless-cast. |
| |
| 2022-10-19 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-cache.cc (ranger_cache::range_from_dom): Use |
| Value_Range not int_range_max. |
| |
| 2022-10-19 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107312 |
| * range.h (range_true_and_false): Special case 1-bit signed types. |
| * value-range.cc (range_tests_misc): New test. |
| |
| 2022-10-19 LIU Hao <lh_mouse@126.com> |
| |
| * config/i386/mingw-mcfgthread.h: New file |
| * config/i386/mingw32.h: Add builtin macro and default libraries |
| for mcfgthread when thread model is `mcf` |
| * config.gcc: Include 'i386/mingw-mcfgthread.h' when thread model |
| is `mcf` |
| * configure.ac: Recognize `mcf` as a valid thread model |
| * config.in: Regenerate |
| * configure: Regenerate |
| |
| 2022-10-19 Lewis Hyatt <lhyatt@gmail.com> |
| |
| * gengtype.cc (output_escaped_param): Add missing const. |
| (get_string_option): Add missing check for option type. |
| (walk_type): Support new "string_length" GTY option. |
| (write_types_process_field): Likewise. |
| * ggc-common.cc (gt_pch_note_object): Add optional length argument. |
| * ggc.h (gt_pch_note_object): Adjust prototype for new argument. |
| (gt_pch_n_S2): Declare... |
| * stringpool.cc (gt_pch_n_S2): ...new function. |
| * doc/gty.texi: Document new GTY((string_length)) option. |
| |
| 2022-10-19 Martin Liska <mliska@suse.cz> |
| |
| * doc/extend.texi: Remove useless @tie{} directives. |
| |
| 2022-10-19 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/107206 |
| * tree-sra.cc (struct access): New field grp_result_of_prop_from_lhs. |
| (analyze_access_subtree): Do not create replacements for accesses with |
| this flag when not toally scalarizing. |
| (propagate_subaccesses_from_lhs): Set the new flag. |
| |
| 2022-10-19 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| PR target/106355 |
| * config/s390/s390.cc (s390_call_saved_register_used): For a |
| parameter with BLKmode fix determining number of consecutive |
| registers. |
| |
| 2022-10-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> |
| |
| * config/xtensa/xtensa-protos.h |
| (xtensa_split1_finished_p, xtensa_split_DI_reg_imm): New prototypes. |
| * config/xtensa/xtensa.cc |
| (xtensa_split1_finished_p, xtensa_split_DI_reg_imm, xtensa_lra_p): |
| New functions. |
| (TARGET_LRA_P): Replace the dummy hook with xtensa_lra_p. |
| (xt_true_regnum): Rework. |
| * config/xtensa/xtensa.h (CALL_REALLY_USED_REGISTERS): |
| Switch from CALL_USED_REGISTERS, and revise the comment. |
| * config/xtensa/constraints.md (Y): |
| Use !xtensa_split1_finished_p() instead of can_create_pseudo_p(). |
| * config/xtensa/predicates.md (move_operand): Ditto. |
| * config/xtensa/xtensa.md: Add two new split patterns: |
| - splits DImode immediate load into two SImode ones |
| - puts out-of-constraint SImode constants into the constant pool |
| * config/xtensa/xtensa.opt (-mlra): New target-specific option |
| for testing purpose. |
| |
| 2022-10-19 Robin Dapp <rdapp@linux.ibm.com> |
| |
| * config/s390/s390.md: Move reload_completed and check operands for REG_P. |
| |
| 2022-10-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/107262 |
| * expr.cc (convert_mode_scalar): For BFmode -> SFmode conversions |
| of constants, use simplify_unary_operation if fromi has VOIDmode |
| instead of recursive convert_mode_scalar. |
| |
| 2022-10-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/106990 |
| * match.pd ((~X - ~Y) -> Y - X, -x & 1 -> x & 1): Guard with |
| !TYPE_OVERFLOW_SANITIZED (type). |
| |
| 2022-10-19 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/i386/i386-builtins.cc (ix86_bf16_ptr_type_node): Remove. |
| (ix86_bf16_type_node): New variable. |
| (ix86_register_bf16_builtin_type): If bfloat16_type_node is NULL |
| from generic code, set only ix86_bf16_type_node to a new REAL_TYPE |
| rather than bfloat16_type_node, otherwise set ix86_bf16_type_node |
| to bfloat16_type_node. Register __bf16 on ix86_bf16_type_node |
| rather than bfloat16_type_node. Don't initialize unused |
| ix86_bf16_ptr_type_node. |
| * config/i386/i386-builtin-types.def (BFLOAT16): Use |
| ix86_bf16_type_node rather than bfloat16_type_node. |
| |
| 2022-10-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/106781 |
| * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): Copy |
| LHS removal from fixup_noreturn_call. |
| |
| 2022-10-19 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/107271 |
| * config/i386/i386-expand.cc (ix86_vec_perm_index_canon): New. |
| (expand_vec_perm_shufps_shufps): Call |
| ix86_vec_perm_index_canon |
| |
| 2022-10-18 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-prop.h (ipa_agg_value): Remove type. |
| (ipa_agg_value_set): Likewise. |
| (ipa_copy_agg_values): Remove function. |
| (ipa_release_agg_values): Likewise. |
| (ipa_auto_call_arg_values) Add a forward declaration. |
| (ipa_call_arg_values): Likewise. |
| (class ipa_argagg_value_list): New constructors, added member function |
| value_for_index_p. |
| (class ipa_auto_call_arg_values): Removed the destructor and member |
| function safe_aggval_at. Use ipa_argagg_values for m_known_aggs. |
| (class ipa_call_arg_values): Removed member function safe_aggval_at. |
| Use ipa_argagg_values for m_known_aggs. |
| (ipa_get_indirect_edge_target): Removed declaration. |
| (ipa_find_agg_cst_for_param): Likewise. |
| (ipa_find_agg_cst_from_init): New declaration. |
| (ipa_agg_value_from_jfunc): Likewise. |
| (ipa_agg_value_set_from_jfunc): Removed declaration. |
| (ipa_push_agg_values_from_jfunc): New declaration. |
| * ipa-cp.cc (ipa_agg_value_from_node): Renamed to |
| ipa_agg_value_from_jfunc, made public. |
| (ipa_agg_value_set_from_jfunc): Removed. |
| (ipa_push_agg_values_from_jfunc): New function. |
| (ipa_get_indirect_edge_target_1): Removed known_aggs parameter, use |
| avs for this purpose too. |
| (ipa_get_indirect_edge_target): Removed the overload working on |
| ipa_auto_call_arg_values, use ipa_argagg_value_list in the remaining |
| one. |
| (devirtualization_time_bonus): Use ipa_argagg_value_list and |
| ipa_get_indirect_edge_target_1 instead of |
| ipa_get_indirect_edge_target. |
| (context_independent_aggregate_values): Removed function. |
| (gather_context_independent_values): Work on ipa_argagg_value_list. |
| (estimate_local_effects): Likewise, define some iterator variables |
| only in the construct where necessary. |
| (ipcp_discover_new_direct_edges): Adjust the call to |
| ipa_get_indirect_edge_target_1. |
| (push_agg_values_for_index_from_edge): Adjust the call |
| ipa_agg_value_from_node which has been renamed to |
| ipa_agg_value_from_jfunc. |
| * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Work on |
| ipa_argagg_value_list. |
| (evaluate_properties_for_edge): Replace manual filling in aggregate |
| values with call to ipa_push_agg_values_from_jfunc. |
| (estimate_calls_size_and_time): Work on ipa_argagg_value_list. |
| (ipa_cached_call_context::duplicate_from): Likewise. |
| (ipa_cached_call_context::release): Likewise. |
| (ipa_call_context::equal_to): Likewise. |
| * ipa-prop.cc (ipa_find_agg_cst_from_init): Make public. |
| (ipa_find_agg_cst_for_param): Removed function. |
| (ipa_find_agg_cst_from_jfunc_items): New function. |
| (try_make_edge_direct_simple_call): Replace calls to |
| ipa_agg_value_set_from_jfunc and ipa_find_agg_cst_for_param with |
| ipa_find_agg_cst_from_init and ipa_find_agg_cst_from_jfunc_items. |
| (try_make_edge_direct_virtual_call): Replace calls to |
| ipa_agg_value_set_from_jfunc and ipa_find_agg_cst_for_param with |
| simple query of constant jump function and a call to |
| ipa_find_agg_cst_from_jfunc_items. |
| (ipa_auto_call_arg_values::~ipa_auto_call_arg_values): Removed. |
| |
| 2022-10-18 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-prop.h (IPA_PROP_ARG_INDEX_LIMIT_BITS): New. |
| (ipcp_transformation): Added forward declaration. |
| (ipa_argagg_value): New type. |
| (ipa_argagg_value_list): New type. |
| (ipa_agg_replacement_value): Removed type. |
| (ipcp_transformation): Switch from using ipa_agg_replacement_value |
| to ipa_argagg_value_list. |
| (ipa_get_agg_replacements_for_node): Removed. |
| (ipa_dump_agg_replacement_values): Removed declaration. |
| * ipa-cp.cc: Define INCLUDE_ALGORITHM. |
| (values_equal_for_ipcp_p): Moved up in the file. |
| (ipa_argagg_value_list::dump): New function. |
| (ipa_argagg_value_list::debug): Likewise. |
| (ipa_argagg_value_list::get_elt): Likewise. |
| (ipa_argagg_value_list::get_elt_for_index): Likewise. |
| (ipa_argagg_value_list::get_value): New overloaded functions. |
| (ipa_argagg_value_list::superset_of_p): New function. |
| (new ipa_argagg_value_list::push_adjusted_values): Likewise. |
| (push_agg_values_from_plats): Likewise. |
| (intersect_argaggs_with): Likewise. |
| (get_clone_agg_value): Removed. |
| (ipa_agg_value_from_node): Make last parameter const, use |
| ipa_argagg_value_list to search values coming from clones. |
| (ipa_get_indirect_edge_target_1): Use ipa_argagg_value_list to search |
| values coming from clones. |
| (ipcp_discover_new_direct_edges): Pass around a vector of |
| ipa_argagg_values rather than a link list of replacement values. |
| (cgraph_edge_brings_value_p): Use ipa_argagg_value_list to search |
| values coming from clones. |
| (create_specialized_node): Work with a vector of ipa_argagg_values |
| rather than a link list of replacement values. |
| (self_recursive_agg_pass_through_p): Make the pointer parameters |
| const. |
| (copy_plats_to_inter): Removed. |
| (intersect_with_plats): Likewise. |
| (agg_replacements_to_vector): Likewise. |
| (intersect_with_agg_replacements): Likewise. |
| (intersect_aggregates_with_edge): Likewise. |
| (push_agg_values_for_index_from_edge): Likewise. |
| (push_agg_values_from_edge): Likewise. |
| (find_aggregate_values_for_callers_subset): Rewrite. |
| (cgraph_edge_brings_all_agg_vals_for_node): Likewise. |
| (ipcp_val_agg_replacement_ok_p): Use ipa_argagg_value_list to search |
| aggregate values. |
| (decide_about_value): Work with a vector of ipa_argagg_values rather |
| than a link list of replacement values. |
| (decide_whether_version_node): Likewise. |
| (ipa_analyze_node): Check number of parameters, assert that there |
| are no descriptors when bailing out. |
| * ipa-prop.cc (ipa_set_node_agg_value_chain): Switch to a vector of |
| ipa_argagg_value. |
| (ipa_node_params_t::duplicate): Removed superfluous handling of |
| ipa_agg_replacement_values. Name of src parameter removed because |
| it is no longer used. |
| (ipcp_transformation_t::duplicate): Replaced duplication of |
| ipa_agg_replacement_values with copying vector m_agg_values. |
| (ipa_dump_agg_replacement_values): Removed. |
| (write_ipcp_transformation_info): Stream the new data-structure |
| instead of the old. |
| (read_ipcp_transformation_info): Likewise. |
| (adjust_agg_replacement_values): Work with ipa_argagg_values instead |
| of linked lists of ipa_agg_replacement_values, copy the items and |
| truncate the vector as necessary to keep it sorted instead of marking |
| items as invalid. Return one bool if CFG should be updated. |
| (ipcp_modif_dom_walker): Store ipcp_transformation instead of |
| linked list of ipa_agg_replacement_values. |
| (ipcp_modif_dom_walker::before_dom_children): Use |
| ipa_argagg_value_list instead of walking a list of |
| ipa_agg_replacement_values. |
| (ipcp_transform_function): Switch to the new data structure, adjust |
| dumping. |
| |
| 2022-10-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107302 |
| * tree-vect-loop.cc (vectorizable_recurrence): Fix vec_perm |
| placement for a PHI latch def. |
| |
| 2022-10-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/107275 |
| * tree-if-conv.cc (if_convertible_loop_p_1): Move |
| find_data_references_in_loop call from here... |
| (if_convertible_loop_p): And move data-reference vector initialization |
| from here... |
| (tree_if_conversion):... to here. |
| |
| 2022-10-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/106654 |
| * gimple.def (GIMPLE_ASSUME): New statement kind. |
| * gimple.h (struct gimple_statement_assume): New type. |
| (is_a_helper <gimple_statement_assume *>::test, |
| is_a_helper <const gimple_statement_assume *>::test): New. |
| (gimple_build_assume): Declare. |
| (gimple_has_substatements): Return true for GIMPLE_ASSUME. |
| (gimple_assume_guard, gimple_assume_set_guard, |
| gimple_assume_guard_ptr, gimple_assume_body_ptr, gimple_assume_body): |
| New inline functions. |
| * gsstruct.def (GSS_ASSUME): New. |
| * gimple.cc (gimple_build_assume): New function. |
| (gimple_copy): Handle GIMPLE_ASSUME. |
| * gimple-pretty-print.cc (dump_gimple_assume): New function. |
| (pp_gimple_stmt_1): Handle GIMPLE_ASSUME. |
| * gimple-walk.cc (walk_gimple_op): Handle GIMPLE_ASSUME. |
| * omp-low.cc (WALK_SUBSTMTS): Likewise. |
| (lower_omp_1): Likewise. |
| * omp-oacc-kernels-decompose.cc (adjust_region_code_walk_stmt_fn): |
| Likewise. |
| * tree-cfg.cc (verify_gimple_stmt, verify_gimple_in_seq_2): Likewise. |
| * function.h (struct function): Add assume_function bitfield. |
| * gimplify.cc (gimplify_call_expr): If the assumption isn't |
| simple enough, expand it into GIMPLE_ASSUME wrapped block or |
| for -O0 drop it. |
| * gimple-low.cc: Include attribs.h. |
| (create_assumption_fn): New function. |
| (struct lower_assumption_data): New type. |
| (find_assumption_locals_r, assumption_copy_decl, |
| adjust_assumption_stmt_r, adjust_assumption_stmt_op, |
| lower_assumption): New functions. |
| (lower_stmt): Handle GIMPLE_ASSUME. |
| * tree-ssa-ccp.cc (pass_fold_builtins::execute): Remove |
| IFN_ASSUME calls. |
| * lto-streamer-out.cc (output_struct_function_base): Pack |
| assume_function bit. |
| * lto-streamer-in.cc (input_struct_function_base): And unpack it. |
| * cgraphunit.cc (cgraph_node::expand): Don't verify assume_function |
| has TREE_ASM_WRITTEN set and don't release its body. |
| (symbol_table::compile): Allow assume functions not to have released |
| body. |
| * internal-fn.cc (expand_ASSUME): Remove gcc_unreachable. |
| * passes.cc (execute_one_pass): For TODO_discard_function don't |
| release body of assume functions. |
| * cgraph.cc (cgraph_node::verify_node): Don't verify cgraph nodes |
| of PROP_assumptions_done functions. |
| * tree-pass.h (PROP_assumptions_done): Define. |
| (TODO_discard_function): Adjust comment. |
| (make_pass_assumptions): Declare. |
| * passes.def (pass_assumptions): Add. |
| * timevar.def (TV_TREE_ASSUMPTIONS): New. |
| * tree-inline.cc (remap_gimple_stmt): Handle GIMPLE_ASSUME. |
| * tree-vrp.cc (pass_data_assumptions): New variable. |
| (pass_assumptions): New class. |
| (make_pass_assumptions): New function. |
| |
| 2022-10-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107301 |
| * gimple-ssa-isolate-paths.cc (handle_return_addr_local_phi_arg): |
| Check whether we can duplicate the block. |
| (find_implicit_erroneous_behavior): Likewise. |
| |
| 2022-10-18 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/107273 |
| * value-relation.cc (equiv_oracle::add_partial_equiv): Merge |
| instead of copying precison of each member. |
| |
| 2022-10-17 Jeff Law <jeffreyalaw@gmail.com> |
| |
| PR target/101697 |
| * config/h8300/combiner.md: Replace '<' preincment constraint with |
| ZA/Z1..ZH/Z7 combinations. |
| * config/h8300/movepush.md: Similarly |
| |
| 2022-10-17 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/constraints.md (Za..Zh): New constraints for |
| autoinc addresses using a specific register. |
| * config/h8300/h8300.cc (pre_incdec_with_reg): New function. |
| * config/h8300/h8300-protos.h (pre_incdec_with_reg): Add prototype. |
| |
| 2022-10-17 Jeff Law <jlaw@ventanamicro.com> |
| |
| * config/i386/cet.c: Remove accidental commit. |
| * config/i386/driver-mingw32.c: Likewise. |
| * config/i386/i386-builtins.c: Likewise. |
| * config/i386/i386-d.c: Likewise. |
| * config/i386/i386-expand.c: Likewise. |
| * config/i386/i386-features.c: Likewise. |
| * config/i386/i386-options.c: Likewise. |
| * config/i386/t-cet: Likewise. |
| * config/i386/x86-tune-sched-atom.c: Likewise. |
| * config/i386/x86-tune-sched-bd.c: Likewise. |
| * config/i386/x86-tune-sched-core.c: Likewise. |
| * config/i386/x86-tune-sched.c: Likewise. |
| |
| 2022-10-17 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * common/config/h8300/h8300-common.cc (h8300_option_optimization_table): |
| Enable redundant extension elimination at -O2 and above. |
| * config/i386/cet.c: New file. |
| * config/i386/driver-mingw32.c: New file. |
| * config/i386/i386-builtins.c: New file. |
| * config/i386/i386-d.c: New file. |
| * config/i386/i386-expand.c: New file. |
| * config/i386/i386-features.c: New file. |
| * config/i386/i386-options.c: New file. |
| * config/i386/t-cet: New file. |
| * config/i386/x86-tune-sched-atom.c: New file. |
| * config/i386/x86-tune-sched-bd.c: New file. |
| * config/i386/x86-tune-sched-core.c: New file. |
| * config/i386/x86-tune-sched.c: New file. |
| |
| 2022-10-17 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/extensions.md (CCZN setting zero extended load): Add |
| missing splitter. |
| |
| 2022-10-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107293 |
| * tree-ssa-dom.cc |
| (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): |
| Check that condition post-dominates the definition point. |
| |
| 2022-10-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107286 |
| * value-range.cc (range_tests_floats): Do not test for -Inf when |
| flag_finite_math_only. |
| |
| 2022-10-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (fold_using_range::range_of_range_op): |
| Provide relation_trio class. |
| * gimple-range-gori.cc (gori_compute::refine_using_relation): |
| Provide relation_trio class. |
| (gori_compute::refine_using_relation): Ditto. |
| (gori_compute::compute_operand1_range): Provide lhs_op2 and |
| op1_op2 relations via relation_trio class. |
| (gori_compute::compute_operand2_range): Ditto. |
| * gimple-range-op.cc (gimple_range_op_handler::calc_op1): Use |
| relation_trio instead of relation_kind. |
| (gimple_range_op_handler::calc_op2): Ditto. |
| (*::fold_range): Ditto. |
| * gimple-range-op.h (gimple_range_op::calc_op1): Adjust prototypes. |
| (gimple_range_op::calc_op2): Adjust prototypes. |
| * range-op-float.cc (*::fold_range): Use relation_trio instead of |
| relation_kind. |
| (*::op1_range): Ditto. |
| (*::op2_range): Ditto. |
| * range-op.cc (*::fold_range): Use relation_trio instead of |
| relation_kind. |
| (*::op1_range): Ditto. |
| (*::op2_range): Ditto. |
| * range-op.h (class range_operator): Adjust prototypes. |
| (class range_operator_float): Ditto. |
| (class range_op_handler): Adjust prototypes. |
| (relop_early_resolve): Pickup op1_op2 relation from relation_trio. |
| * value-relation.cc (VREL_LAST): Adjust use to be one past the end of |
| the enum. |
| (relation_oracle::validate_relation): Use relation_trio in call |
| to fold_range. |
| * value-relation.h (enum relation_kind_t): Add VREL_LAST as |
| final element. |
| (class relation_trio): New. |
| (TRIO_VARYING, TRIO_SHIFT, TRIO_MASK): New. |
| |
| 2022-10-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| * range-op-float.cc (foperator_not_equal::op1_range): Check for |
| VREL_EQ after singleton. |
| (foperator_unordered::op1_range): Set VARYING before calling |
| clear_nan(). |
| (foperator_ordered::op1_range): Set rather than clear NAN if both |
| operands are the same. |
| |
| 2022-10-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| * value-relation.cc (value_relation::dump): Change message. |
| * value-relation.h (value_relation::set_relation): If op1 is the |
| same as op2 do not create a relation. |
| |
| 2022-10-17 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * config/gcn/gcn.cc (VnMODE): Use 'case E_QImode:' instead of |
| 'case QImode:', etc. |
| |
| 2022-10-17 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * gimple-expr.cc (mark_addressable_2): Tag as 'static'. |
| |
| 2022-10-17 Richard Biener <rguenther@suse.de> |
| Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| PR tree-optimization/99409 |
| PR tree-optimization/99394 |
| * tree-vectorizer.h (vect_def_type::vect_first_order_recurrence): Add. |
| (stmt_vec_info_type::recurr_info_type): Likewise. |
| (vectorizable_recurr): New function. |
| * tree-vect-loop.cc (vect_phi_first_order_recurrence_p): New |
| function. |
| (vect_analyze_scalar_cycles_1): Look for first order |
| recurrences. |
| (vect_analyze_loop_operations): Handle them. |
| (vect_transform_loop): Likewise. |
| (vectorizable_recurr): New function. |
| (maybe_set_vectorized_backedge_value): Handle the backedge value |
| setting in the first order recurrence PHI and the permutes. |
| * tree-vect-stmts.cc (vect_analyze_stmt): Handle first order |
| recurrences. |
| (vect_transform_stmt): Likewise. |
| (vect_is_simple_use): Likewise. |
| (vect_is_simple_use): Likewise. |
| * tree-vect-slp.cc (vect_get_and_check_slp_defs): Likewise. |
| (vect_build_slp_tree_2): Likewise. |
| (vect_schedule_scc): Handle the backedge value setting in the |
| first order recurrence PHI and the permutes. |
| |
| 2022-10-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/t-riscv: Change Tab into 2 space. |
| |
| 2022-10-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.cc (mangle_builtin_type): Move down the function. |
| |
| 2022-10-17 Arsen Arsenovic <arsen@aarsen.me> |
| |
| * config.gcc: --target=*-elf --without-{newlib,headers} should |
| provide stdint.h. |
| |
| 2022-10-17 Hu, Lin1 <lin1.hu@intel.com> |
| |
| * common/config/i386/cpuinfo.h: |
| (get_intel_cpu): Handle Meteorlake. |
| * common/config/i386/i386-common.cc: |
| (processor_alias_table): Add Meteorlake. |
| |
| 2022-10-17 Haochen Jiang <haochen.jiang@intel.com> |
| |
| * common/config/i386/cpuinfo.h: |
| (get_intel_cpu): Handle Raptorlake. |
| * common/config/i386/i386-common.cc: |
| (processor_alias_table): Add Raptorlake. |
| |
| 2022-10-16 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/constraints.md (Z0..Z7): New register |
| constraints. |
| * config/h8300/h8300.h (reg_class): Add new classes. |
| (REG_CLASS_NAMES): Similarly. |
| (REG_CLASS_CONTENTS): Similarly. |
| |
| 2022-10-16 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/constraints.md (Zz constraint): Renamed |
| from "z". |
| * config/h8300/movepush.md (movqi_h8sx, movhi_h8sx): Adjust |
| constraint to use Zz instead of Z. |
| |
| 2022-10-16 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/h8300.cc (h8300_register_move_cost): Fix typo. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Implement distinction between |
| HONOR_SIGNED_ZEROS and MODE_HAS_SIGNED_ZEROS. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-op.cc (class cfn_copysign): New. |
| (gimple_range_op_handler::maybe_builtin_call): Add |
| CFN_BUILT_IN_COPYSIGN*. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * real.h (real_isdenormal): Check rvc_normal. |
| * value-range.cc (range_tests_floats): New test. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-op.cc |
| (gimple_range_op_handler::maybe_builtin_call): Replace |
| CFN_BUILTIN_SIGNBIT* cases with CASE_FLT_FN. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Normalize ranges for both bounds. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Drop -0.0 for !HONOR_SIGNED_ZEROS. |
| |
| 2022-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-op.cc |
| (gimple_range_op_handler::maybe_builtin_call): Add |
| CFN_BUILT_IN_SIGNBIT[FL]* entries. |
| |
| 2022-10-14 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107254 |
| * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): |
| For permutes also analyze live lanes. |
| (vect_schedule_slp_node): For permutes also code generate |
| live lane extracts. |
| |
| 2022-10-14 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR target/107248 |
| * config/sparc/sparc.cc (sparc_expand_prologue): Emit a frame |
| blockage for leaf functions. |
| (sparc_flat_expand_prologue): Emit frame instead of full blockage. |
| (sparc_expand_epilogue): Emit a frame blockage for leaf functions. |
| (sparc_flat_expand_epilogue): Emit frame instead of full blockage. |
| |
| 2022-10-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-core.h (enum tree_index): Add TI_BFLOAT16_TYPE. |
| * tree.h (bfloat16_type_node): Define. |
| * tree.cc (excess_precision_type): Promote bfloat16_type_mode |
| like float16_type_mode. |
| (build_common_tree_nodes): Initialize bfloat16_type_node if |
| BFmode is supported. |
| * expmed.h (maybe_expand_shift): Declare. |
| * expmed.cc (maybe_expand_shift): No longer static. |
| * expr.cc (convert_mode_scalar): Don't ICE on BF -> HF or HF -> BF |
| conversions. If there is no optab, handle BF -> {DF,XF,TF,HF} |
| conversions as separate BF -> SF -> {DF,XF,TF,HF} conversions, add |
| -ffast-math generic implementation for BF -> SF and SF -> BF |
| conversions. |
| * builtin-types.def (BT_BFLOAT16, BT_FN_BFLOAT16_CONST_STRING): New. |
| * builtins.def (BUILT_IN_NANSF16B): New builtin. |
| * fold-const-call.cc (fold_const_call): Handle CFN_BUILT_IN_NANSF16B. |
| * config/i386/i386.cc (classify_argument): Handle E_BCmode. |
| (ix86_libgcc_floating_mode_supported_p): Also return true for BFmode |
| for -msse2. |
| (ix86_mangle_type): Mangle BFmode as DF16b. |
| (ix86_invalid_conversion, ix86_invalid_unary_op, |
| ix86_invalid_binary_op): Remove. |
| (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP, |
| TARGET_INVALID_BINARY_OP): Don't redefine. |
| * config/i386/i386-builtins.cc (ix86_bf16_type_node): Remove. |
| (ix86_register_bf16_builtin_type): Use bfloat16_type_node rather than |
| ix86_bf16_type_node, only create it if still NULL. |
| * config/i386/i386-builtin-types.def (BFLOAT16): Likewise. |
| * config/i386/i386.md (cbranchbf4, cstorebf4): New expanders. |
| |
| 2022-10-14 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/323 |
| PR c++/107097 |
| * doc/invoke.texi (-fexcess-precision=standard): Mention that the |
| option now also works in C++. |
| |
| 2022-10-13 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-ssa-warn-access.cc (pass_waccess::check_call): Return |
| early for calls made from thunks. |
| |
| 2022-10-13 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * expr.cc (emit_group_stote): Fix handling of modes of different |
| sizes for big-endian targets in latest change and add commentary. |
| |
| 2022-10-13 Martin Liska <mliska@suse.cz> |
| |
| * output.h (assemble_vtv_preinit_initializer): Remove. |
| * varasm.cc (assemble_vtv_preinit_initializer): Remove. |
| |
| 2022-10-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/102540 |
| PR tree-optimization/102872 |
| * gimple-range-cache.cc (ranger_cache::fill_block_cache): |
| Handle partial equivs. |
| (ranger_cache::range_from_dom): Cleanup dump output. |
| |
| 2022-10-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * range-op.cc (operator_cast::lhs_op1_relation): New. |
| (operator_bitwise_and::lhs_op1_relation): New. |
| |
| 2022-10-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-cache.cc (ranger_cache::fill_block_cache): Use |
| iterator. |
| * value-relation.cc |
| (equiv_relation_iterator::equiv_relation_iterator): New. |
| (equiv_relation_iterator::next): New. |
| (equiv_relation_iterator::get_name): New. |
| * value-relation.h (class relation_oracle): Privatize some methods. |
| (class equiv_relation_iterator): New. |
| (FOR_EACH_EQUIVALENCE): New. |
| (FOR_EACH_PARTIAL_EQUIV): New. |
| (FOR_EACH_PARTIAL_AND_FULL_EQUIV): New. |
| |
| 2022-10-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * value-relation.cc (equiv_chain::dump): Don't print empty |
| equivalences. |
| (equiv_oracle::equiv_oracle): Allocate a partial equiv table. |
| (equiv_oracle::~equiv_oracle): Release the partial equiv table. |
| (equiv_oracle::add_partial_equiv): New. |
| (equiv_oracle::partial_equiv_set): New. |
| (equiv_oracle::partial_equiv): New. |
| (equiv_oracle::query_relation): Check for partial equivs too. |
| (equiv_oracle::dump): Also dump partial equivs. |
| (dom_oracle::register_relation): Handle partial equivs. |
| (dom_oracle::query_relation): Check for partial equivs. |
| * value-relation.h (enum relation_kind_t): Add partial equivs. |
| (relation_partial_equiv_p): New. |
| (relation_equiv_p): New. |
| (class pe_slice): New. |
| (class equiv_oracle): Add prototypes. |
| (pe_to_bits): New. |
| (bits_to_pe): New. |
| (pe_min): New. |
| |
| 2022-10-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107247 |
| * tree-vect-loop.cc (vect_create_epilog_for_reduction): |
| Reduce multi vector SLP reduction accumulators. Check |
| the adjusted number of accumulator vectors against |
| one for the re-use in the epilogue. |
| |
| 2022-10-13 Jakub Jelinek <jakub@redhat.com> |
| |
| * genmodes.cc (emit_mode_wider): Emit previous content of |
| mode_wider array into mode_next array and for mode_wider |
| emit always VOIDmode for !CLASS_HAS_WIDER_MODES_P classes, |
| otherwise skip through modes with the same precision. |
| * machmode.h (mode_next): Declare. |
| (GET_MODE_NEXT_MODE): New inline function. |
| (mode_iterator::get_next, mode_iterator::get_known_next): New |
| function templates. |
| (FOR_EACH_MODE_IN_CLASS): Use get_next instead of get_wider. |
| (FOR_EACH_MODE): Use get_known_next instead of get_known_wider. |
| (FOR_EACH_MODE_FROM): Use get_next instead of get_wider. |
| (FOR_EACH_WIDER_MODE_FROM): Define. |
| (FOR_EACH_NEXT_MODE): Define. |
| * expmed.cc (emit_store_flag_1): Use FOR_EACH_WIDER_MODE_FROM |
| instead of FOR_EACH_MODE_FROM. |
| * optabs.cc (prepare_cmp_insn): Likewise. Remove redundant |
| !CLASS_HAS_WIDER_MODES_P check. |
| (prepare_float_lib_cmp): Use FOR_EACH_WIDER_MODE_FROM instead of |
| FOR_EACH_MODE_FROM. |
| * config/i386/i386-expand.cc (get_mode_wider_vector): Use |
| GET_MODE_NEXT_MODE instead of GET_MODE_WIDER_MODE. |
| |
| 2022-10-13 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR target/105773 |
| * config/aarch64/aarch64.cc (aarch64_select_cc_mode): Allow |
| GT/LE for merging compare with zero into AND. |
| (aarch64_get_condition_code_1): Add CC_NZVmode support. |
| * config/aarch64/aarch64-modes.def: Add CC_NZV. |
| * config/aarch64/aarch64.md: Use CC_NZV in cmp+and patterns. |
| |
| 2022-10-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107160 |
| * tree-vect-loop.cc (vect_create_epilog_for_reduction): |
| Do not register accumulator if we failed to reduce it |
| to a single vector. |
| |
| 2022-10-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (range_operator_float::op1_op2_relation): New. |
| (class foperator_equal): Add using. |
| (class foperator_not_equal): Same. |
| (class foperator_lt): Same. |
| (class foperator_le): Same. |
| (class foperator_gt): Same. |
| (class foperator_ge): Same. |
| * range-op.cc (range_op_handler::op1_op2_relation): New. |
| * range-op.h (range_operator_float::op1_op2_relation): New. |
| |
| 2022-10-13 Richard Biener <rguenther@suse.de> |
| |
| * genmatch.cc (parser::parse_c_expr): Diagnose 'return'. |
| * match.pd: Replace 'return' statements in with expressions |
| with appropriate variants. |
| |
| 2022-10-13 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/107229 |
| * tree-if-conv.cc (get_bitfield_rep): Fix bitposition calculation. |
| |
| 2022-10-13 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/107226 |
| * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Reject |
| BITFIELD_REF's with non integral typed first operands. |
| |
| 2022-10-13 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/float.h (FLT_IS_IEC_60559, DBL_IS_IEC_60559) |
| (LDBL_IS_IEC_60559): Update comment. |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (class foperator_negate): New. |
| (floating_op_table::floating_op_table): Add NEGATE_EXPR |
| (range_op_float_tests): Add negate tests. |
| |
| 2022-10-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.h: Remove unused macro. |
| |
| 2022-10-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Apply |
| clang-format. |
| (add_vector_type_attribute): Ditto. |
| * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Apply |
| clang-format. |
| * config/riscv/riscv-vector-builtins.h (DEF_RVV_TYPE): Apply |
| clang-format. |
| |
| 2022-10-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.cc (builtin_types): Redefine |
| vector types. |
| (build_const_pointer): New function. |
| (register_builtin_type): Ditto. |
| (DEF_RVV_TYPE): Simplify macro. |
| (register_vector_type): Refine implementation. |
| * config/riscv/riscv-vector-builtins.h (rvv_builtin_types_t): New. |
| |
| 2022-10-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to |
| this to .... |
| * config/riscv/riscv-vector-builtins.cc (class rvv_switcher): |
| here. |
| |
| 2022-10-12 Cui,Lili <lili.cui@intel.com> |
| |
| * config/i386/driver-i386.cc (host_detect_local_cpu): |
| Move sapphirerapids out of AVX512_VP2INTERSECT. |
| * config/i386/i386.h: Remove AVX512_VP2INTERSECT from PTA_SAPPHIRERAPIDS |
| * doc/invoke.texi: Remove AVX512_VP2INTERSECT from SAPPHIRERAPIDS |
| |
| 2022-10-12 Martin Liska <mliska@suse.cz> |
| |
| * gcov-io.cc (gcov_write_summary): Rename to ... |
| (gcov_write_object_summary): ... this. |
| * gcov-io.h (GCOV_TAG_OBJECT_SUMMARY_LENGTH): Rename from ... |
| (GCOV_TAG_SUMMARY_LENGTH): ... this. |
| |
| 2022-10-12 Martin Liska <mliska@suse.cz> |
| |
| * configure: Regenerate. |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (frange_float): New. |
| (range_op_float_tests): New. |
| * range-op.cc (range_op_tests): Call range_op_float_tests. |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (frange::nan_signbit_p): New. |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set_nonnegative): Pass bool to |
| update_nan. |
| * value-range.h: Disallow conversion to bool in update_nan(). |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (frange::frange): Add constructor taking type. |
| |
| 2022-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc: Add relation_kind = VREL_VARYING to all |
| methods. |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-gori.cc (gori_compute::logical_combine): Avoid |
| calling tracer.trailer(). |
| |
| 2022-10-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/107185 |
| * config/i386/i386.md (*notxor<mode>_1): Use MASK_REG_P (x) instead of |
| MASK_REGNO_P (REGNO (x)). |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (class foperator_abs): New. |
| (floating_op_table::floating_op_table): Add ABS_EXPR entry. |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_unordered_le::op1_range): New. |
| (foperator_unordered_le::op2_range): New. |
| (foperator_unordered_gt::op1_range): New. |
| (foperator_unordered_gt::op2_range): New. |
| (foperator_unordered_ge::op1_range): New. |
| (foperator_unordered_ge::op2_range): New. |
| (foperator_unordered_equal::op1_range): New. |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (class foperator_unordered_lt): New. |
| (class foperator_relop_unknown): Remove |
| (class foperator_unordered_le): New. |
| (class foperator_unordered_gt): New. |
| (class foperator_unordered_ge): New. |
| (class foperator_unordered_equal): New. |
| (floating_op_table::floating_op_table): Replace all UN_EXPR |
| entries with their appropriate fop_unordered_* counterpart. |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (operator_equal::op1_range): Move BRS_TRUE case up. |
| (operator_lt::op2_range): Same. |
| (operator_le::op2_range): Same. |
| (operator_gt::op2_range): Same. |
| (operator_ge::op2_range): Same. |
| |
| 2022-10-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107212 |
| * tree-vect-loop.cc (vectorizable_reduction): Make sure to |
| set STMT_VINFO_REDUC_DEF for all live lanes in a SLP |
| reduction. |
| (vectorizable_live_operation): Do not pun to the SLP |
| node representative for reduction epilogue generation. |
| |
| 2022-10-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (neg<mode>2): New define_expand. |
| |
| 2022-10-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (vec_init<V_ALL:mode><V_ALL_ALT:mode>): New. |
| * config/gcn/gcn.cc (GEN_VN): Add andvNsi3, subvNsi3. |
| (GEN_VNM): Add gathervNm_expr. |
| (GEN_VN_NOEXEC): Add vec_seriesvNsi. |
| (gcn_expand_vector_init): Add initialization of vectors from smaller |
| vectors. |
| |
| 2022-10-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-protos.h (get_exec): Add prototypes for two variants. |
| * config/gcn/gcn-valu.md |
| (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): New define_expand. |
| * config/gcn/gcn.cc (get_exec): Export the existing function. Add a |
| new overload variant. |
| |
| 2022-10-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md |
| (<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>): Use MODE_VF. |
| (<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>): Likewise. |
| * config/gcn/gcn.h (MODE_VF): New macro. |
| |
| 2022-10-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-modes.def (VECTOR_MODE): Add new modes |
| V32QI, V32HI, V32SI, V32DI, V32TI, V32HF, V32SF, V32DF, |
| V16QI, V16HI, V16SI, V16DI, V16TI, V16HF, V16SF, V16DF, |
| V8QI, V8HI, V8SI, V8DI, V8TI, V8HF, V8SF, V8DF, |
| V4QI, V4HI, V4SI, V4DI, V4TI, V4HF, V4SF, V4DF, |
| V2QI, V2HI, V2SI, V2DI, V2TI, V2HF, V2SF, V2DF. |
| (ADJUST_ALIGNMENT): Likewise. |
| * config/gcn/gcn-protos.h (gcn_full_exec): Delete. |
| (gcn_full_exec_reg): Delete. |
| (gcn_scalar_exec): Delete. |
| (gcn_scalar_exec_reg): Delete. |
| (vgpr_1reg_mode_p): Use inner mode to identify vector registers. |
| (vgpr_2reg_mode_p): Likewise. |
| (vgpr_vector_mode_p): Use VECTOR_MODE_P. |
| * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF, |
| V_QIHI, V_1REG, V_INT_1REG, V_INT_1REG_ALT, V_FP_1REG, V_2REG, V_noQI, |
| V_noHI, V_INT_noQI, V_INT_noHI, V_ALL, V_ALL_ALT, V_INT, V_FP): |
| Add additional vector modes. |
| (V64_SI, V64_DI, V64_ALL, V64_FP): New iterators. |
| (scalar_mode, SCALAR_MODE, vnsi, VnSI, vndi, VnDI, sdwa): |
| Add additional vector mode mappings. |
| (mov<mode>): Implement vector length conversions. |
| (ldexp<mode>3<exec>): Use VnSI. |
| (frexp<mode>_exp2<exec>): Likewise. |
| (VCVT_MODE, VCVT_FMODE, VCVT_IMODE): Add additional vector modes. |
| (reduc_<reduc_op>_scal_<mode>): Use V64_ALL. |
| (fold_left_plus_<mode>): Use V64_FP. |
| (*<reduc_op>_dpp_shr_<mode>): Use V64_1REG. |
| (*<reduc_op>_dpp_shr_<mode>): Use V64_DI. |
| (*plus_carry_dpp_shr_<mode>): Use V64_INT_1REG. |
| (*plus_carry_in_dpp_shr_<mode>): Use V64_SI. |
| (*plus_carry_dpp_shr_<mode>): Use V64_DI. |
| (mov_from_lane63_<mode>): Use V64_2REG. |
| * config/gcn/gcn.cc (VnMODE): New function. |
| (gcn_can_change_mode_class): Support multiple vector sizes. |
| (gcn_modes_tieable_p): Likewise. |
| (gcn_operand_part): Likewise. |
| (gcn_scalar_exec): Delete function. |
| (gcn_scalar_exec_reg): Delete function. |
| (gcn_full_exec): Delete function. |
| (gcn_full_exec_reg): Delete function. |
| (gcn_inline_fp_constant_p): Support multiple vector sizes. |
| (gcn_fp_constant_p): Likewise. |
| (A): New macro. |
| (GEN_VN_NOEXEC): New macro. |
| (GEN_VNM_NOEXEC): New macro. |
| (GEN_VN): New macro. |
| (GEN_VNM): New macro. |
| (GET_VN_FN): New macro. |
| (CODE_FOR): New macro. |
| (CODE_FOR_OP): New macro. |
| (gen_mov_with_exec): Delete function. |
| (gen_duplicate_load): Delete function. |
| (gcn_expand_vector_init): Support multiple vector sizes. |
| (strided_constant): Likewise. |
| (gcn_addr_space_legitimize_address): Likewise. |
| (gcn_expand_scalar_to_vector_address): Likewise. |
| (gcn_expand_scaled_offsets): Likewise. |
| (gcn_secondary_reload): Likewise. |
| (gcn_valid_cvt_p): Likewise. |
| (gcn_expand_builtin_1): Likewise. |
| (gcn_make_vec_perm_address): Likewise. |
| (gcn_vectorize_vec_perm_const): Likewise. |
| (gcn_vector_mode_supported_p): Likewise. |
| (gcn_autovectorize_vector_modes): New hook. |
| (gcn_related_vector_mode): Support multiple vector sizes. |
| (gcn_expand_dpp_shr_insn): Add FIXME comment. |
| (gcn_md_reorg): Support multiple vector sizes. |
| (print_reg): Likewise. |
| (print_operand): Likewise. |
| (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): New hook. |
| |
| 2022-10-11 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * tree-if-conv.cc (if_convertible_loop_p_1): Move ordering of loop bb's from |
| here... |
| (tree_if_conversion): ... to here. Also call bitfield lowering when |
| appropriate. |
| (version_loop_for_if_conversion): Adapt to enable loop versioning when we only |
| need to lower bitfields. |
| (ifcvt_split_critical_edges): Relax condition of expected loop form as this is |
| checked earlier. |
| (get_bitfield_rep): New function. |
| (lower_bitfield): Likewise. |
| (bitfields_to_lower_p): Likewise. |
| (need_to_lower_bitfields): New global boolean. |
| (need_to_ifcvt): Likewise. |
| * tree-vect-data-refs.cc (vect_find_stmt_data_reference): Improve diagnostic |
| message. |
| * tree-vect-patterns.cc (vect_recog_temp_ssa_var): Add default value for last |
| parameter. |
| (vect_recog_bitfield_ref_pattern): New. |
| (vect_recog_bit_insert_pattern): New. |
| |
| 2022-10-11 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/107093 |
| * config/i386/i386.md (*notxor<mode>_1): New post_reload |
| define_insn_and_split. |
| (*notxorqi_1): Ditto. |
| |
| 2022-10-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107195 |
| * value-range.cc (irange::set_range_from_nonzero_bits): Set range |
| to [0,0] when nonzero mask is 0. |
| |
| 2022-10-11 Olivier Hainque <hainque@adacore.com> |
| Olivier Hainque <hainque@adacore.com> |
| |
| * configure: Regenerate. |
| |
| 2022-10-11 Olivier Hainque <hainque@adacore.com> |
| |
| * config.gcc (*vxworks*): Add t-slibgcc fragment |
| if enable_shared. |
| |
| 2022-10-11 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h (VX_LGCC_EH_SO0, VX_LGCC_EH_SO1): New |
| internal macros. |
| (VXWORKS_LIBGCC_SPEC): Use them and document. |
| |
| 2022-10-11 Martin Liska <mliska@suse.cz> |
| |
| * gimple-range-op.cc: Add override keyword. |
| |
| 2022-10-11 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| PR debug/107193 |
| * tree-cfg.cc (assign_discriminators): Move declaration of cur_locus_e |
| out of the loop. |
| |
| 2022-10-11 Liwei Xu <liwei.xu@intel.com> |
| liuhongt <hongtao.liu@intel.com> |
| |
| PR tree-optimization/54346 |
| * match.pd: Merge the index of VCST then generates the new vec_perm. |
| |
| 2022-10-11 Jeff Law <jeffreyalaw@gmail.com> |
| |
| PR rtl-optimization/107182 |
| * cfgrtl.cc (fixup_reorder_chain): When optimizing a jump to a |
| return, clear EDGE_CROSSING on the appropriate edge. |
| |
| 2022-10-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-vector-builtins.cc (struct vector_type_info): Move |
| from config/riscv/riscv-vector-builtins.h. |
| (DEF_RVV_TYPE): Change USER_NAME to NAME. |
| (register_vector_type): Change user_name to name. |
| * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Change |
| USER_NAME to NAME. |
| * config/riscv/riscv-vector-builtins.h (struct vector_type_info): Move |
| to riscv-vector-builtins.cc. |
| (DEF_RVV_TYPE): Change USER_NAME to NAME. |
| |
| 2022-10-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv.md: Add vsetvl instruction type. |
| |
| 2022-10-10 Nathan Sidwell <nathan@acm.org> |
| |
| * common.opt (-fabi-version=): Document 18. |
| * doc/invoke.texi (-fabi-version): Document 18. |
| |
| 2022-10-10 Andrea Corallo <andrea.corallo@arm.com> |
| |
| PR other/99723 |
| * toplev.cc (toplev::main): Don't run self tests in case of |
| previous error. |
| |
| 2022-10-10 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv-c.cc: Add newline to the end of file. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (class foperator_identity): Make members public. |
| (class foperator_equal): Same. |
| (class foperator_not_equal): Same. |
| (class foperator_lt): Same. |
| (class foperator_le): Same. |
| (class foperator_gt): Same. |
| (class foperator_ge): Same. |
| (class foperator_unordered): Same. |
| (class foperator_ordered): Same. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (frange::maybe_isnan): New. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_not_equal::op1_range): Set NAN on |
| TRUE side for x != x. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_unordered::op1_range): Set NAN when |
| operands are equal and result is TRUE. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range.h (range_true): Return int_range<2>. |
| (range_false): Same. |
| (range_true_and_false): Same. |
| |
| 2022-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-op.cc: Add op1_range entry for __builtin_signbit. |
| |
| 2022-10-10 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/107185 |
| * config/i386/i386.md (lrint<MODEF:mode><SWI48:mode>2): Swap |
| predicate of operands[0] and operands[1]. |
| |
| 2022-10-10 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * common/config/arc/arc-common.cc (arc_option_optimization_table): |
| Remove Rcq and Rcw options. |
| * config/arc/arc.opt (mRcq): Ignore option, preserve it for |
| backwards compatibility. |
| (mRcw): Likewise. |
| * doc/invoke.texi (mRcw, mRcq): Update document. |
| |
| 2022-10-10 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * config/arc/arc.cc (arc_check_short_reg_p): New function. |
| (arc_address_cost): Replace satisfies_constraint_Rcq with the |
| above new function. |
| (arc_output_addsi): Likewise. |
| (split_addsi): Likewise. |
| (split_subsi): Likewise. |
| * config/arc/arc.md (movqi_insn): Remove Rcq constraint. |
| (movhi_insn): Likewise. |
| (movsi_insn): Likewise. |
| (tst_movb): Likewise. |
| (tst): Likewise. |
| (tst_bitfield): Likewise. |
| (abssi2): Likewise. |
| (addsi3_mixed): Likewise. |
| (mulhisi3_reg): Likewise. |
| (umulhisi3_reg): Likewise. |
| (mulsi_600): Likewise. |
| (mul64): Likewise. |
| (subsi3_insn): Likewise. |
| (bicsi3_insn): Likewise. |
| (xorsi3): Likewise. |
| (negsi2): Likewise. |
| (one_cmplsi2): Likewise. |
| (lshrsi3_insn): Likewise. |
| (cmpsi_cc_insn_mixed): Likewise. |
| (cmpsi_cc_zn_insn): Likewise. |
| (btst): Likewise. |
| (cmpsi_cc_z_insn): Likewise. |
| (cmpsi_cc_c_insn): Likewise. |
| (indirect_jump): Likewise. |
| (casesi_jump): Likewise. |
| (call_i): Likewise. |
| (call_value_i): Likewise. |
| (bbit): Likewise. |
| (abssf2): Likewise. |
| (ashlsi2_cnt1): Likewise. |
| (lshrsi3_cnt1): Likewise. |
| (ashrsi3_cnt1): Likewise. |
| * config/arc/constraints.md (Rcq): Remove. |
| |
| 2022-10-10 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * config/arc/arc.md (smaxsi3): Remove Rcw. |
| (sminsi3): Likewise. |
| (addsi3_mixed): Likewise. |
| (add_f_2): Likewise. |
| (subsi3_insn): Likewise. |
| (sub_f): Likewise. |
| (sub_n): Likewise. |
| (bset): Likewise. |
| (bxor): Likewise. |
| (bclr): Likewise. |
| (bset_insn): Likewise. |
| (bxor_insn): Likewise. |
| (bclr_insn): Likewise. |
| (bmsk_insn): Likewise. |
| (bicsi3_insn): Likewise. |
| (xorsi3): Likewise. |
| (negsi2): Likewise. |
| (lshrsi3_insn): Likewise. |
| (abssf2): Likewise. |
| (negsf2): Likewise. |
| * config/arc/constraints.md(Rcw): Remove it. |
| |
| 2022-10-10 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * config/arc/arc.md(mulsi3_700): Remove Rcr. |
| (mulsi3_highpart): Likewise. |
| (umulsi3_highpart_i): Likewise. |
| (umulsi3_highpart_int): Likewise. |
| (macd): Likewise. |
| (macdu): Likewise. |
| * config/arc/constraints.md (Rcr): Remove it. |
| |
| 2022-10-10 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * config/arc/arc.cc (arc_save_callee_enter): Use negative offsets. |
| |
| 2022-10-09 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| PR target/106562 |
| * config/pru/pru-protos.h (pru_noteq_condition): New |
| function declaration. |
| * config/pru/pru.cc (pru_noteq_condition): New function. |
| * config/pru/pru.md (cbranchdi4): Define new pattern. |
| |
| 2022-10-09 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/pru.md (lshrdi3): New expand pattern. |
| (ashldi3): Ditto. |
| |
| 2022-10-09 YunQiang Su <yunqiang.su@cipunited.com> |
| |
| * config.gcc: set with_arch to default_mips_arch if no defined. |
| * config/mips/driver-native.cc (host_detect_local_cpu): |
| try getauxval(AT_BASE_PLATFORM) and _MIPS_ARCH, too. |
| pass -mnan=2008 if __mips_nan2008__ is defined. |
| * config.in: define HAVE_SYS_AUXV_H and HAVE_GETAUXVAL. |
| * configure.ac: detect sys/auxv.h and getauxval. |
| * configure: regenerated. |
| |
| 2022-10-07 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * tree-cfg.cc (assign_discriminators): Set discriminators for call stmts |
| on the same line within the same basic block. |
| |
| 2022-10-07 Qing Zhao <qing.zhao@oracle.com> |
| |
| PR tree-optimization/101836 |
| * tree-object-size.cc (addr_object_size): Use array_at_struct_end_p |
| to determine a flexible array member reference. |
| |
| 2022-10-07 Qing Zhao <qing.zhao@oracle.com> |
| |
| * doc/extend.texi: Document strict_flex_array attribute. |
| * doc/invoke.texi: Document -fstrict-flex-arrays[=n] option. |
| * print-tree.cc (print_node): Print new bit decl_not_flexarray. |
| * tree-core.h (struct tree_decl_common): New bit field |
| decl_not_flexarray. |
| * tree-streamer-in.cc (unpack_ts_decl_common_value_fields): Stream |
| in new bit decl_not_flexarray. |
| * tree-streamer-out.cc (pack_ts_decl_common_value_fields): Stream |
| out new bit decl_not_flexarray. |
| * tree.cc (array_at_struct_end_p): Update it with the new bit field |
| decl_not_flexarray. |
| * tree.h (DECL_NOT_FLEXARRAY): New flag. |
| |
| 2022-10-07 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks/_vxworks-versions.h: Use OS specific |
| paths in #include of version.h. |
| |
| 2022-10-07 Martin Liska <mliska@suse.cz> |
| |
| * opts.cc (finish_options): Print sorry message only |
| for -flive-patching=inline-only-static. |
| |
| 2022-10-07 Jason Merrill <jason@redhat.com> |
| |
| * gimplify.cc (gimplify_modify_expr_rhs): Don't optimize |
| x = *(A*)&<expr> to x = <expr> for a TREE_ADDRESSABLE type. |
| |
| 2022-10-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107153 |
| * tree-cfg.cc (gimple_duplicate_sese_tail): Do not update |
| SSA form here. |
| * tree-parloops.cc (gen_parallel_loop): Update SSA form |
| after to-exit-first transform, no PHI insertion is necessary. |
| (pass_parallelize_loops::execute): Force re-write of the |
| virtual operand SSA web. |
| |
| 2022-10-07 Jonathan Wakely <jwakely@redhat.com> |
| |
| * value-range.cc (irange::irange_contains_p): Fix comment typo. |
| |
| 2022-10-07 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * function.cc (thread_prologue_and_epilogue_insns): Update only |
| entry and exit blocks when not optimizing. Remove dead statement. |
| |
| 2022-10-07 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::irange_set): Convert nonzero mask to |
| tree. |
| (irange::irange_set_anti_range): Same. |
| (irange::set): Same. |
| (irange::verify_range): Same. |
| (irange::contains_p): Same. |
| (irange::invert): Same. |
| (irange::set_range_from_nonzero_bits): Same. |
| (irange::set_nonzero_bits): Same. |
| (mask_to_wi): Same. |
| (irange::intersect_nonzero_bits): Same. |
| (irange::union_nonzero_bits): Same. |
| * value-range.h (irange::varying_compatible_p): Same. |
| (gt_ggc_mx): Same. |
| (gt_pch_nx): Same. |
| (irange::set_undefined): Same. |
| (irange::set_varying): Same. |
| |
| 2022-10-07 Martin Liska <mliska@suse.cz> |
| |
| * config/i386/i386-protos.h (ix86_binary_operator_ok): Add array |
| size to function parameter. |
| (ix86_unary_operator_ok): Likewise. |
| |
| 2022-10-07 Martin Liska <mliska@suse.cz> |
| |
| * auto-profile.cc (get_inline_stack): Remove unused variable. |
| |
| 2022-10-07 Jakub Jelinek <jakub@redhat.com> |
| |
| * ipa-prop.h (ipa_constant_data): Fix comment typo. |
| * value-range.cc (irange::irange_contains_p): Likewise. |
| * value-relation.cc (dom_oracle::set_one_relation): Likewise. |
| * gimple-predicate-analysis.cc (predicate::simplify_4): Likewise. |
| * tree-inline.cc (remap_ssa_name): Likewise. |
| |
| 2022-10-07 Jakub Jelinek <jakub@redhat.com> |
| |
| * attribs.h (is_attribute_namespace_p): New inline function. |
| (lookup_attribute): Document meaning of ATTR_NS equal to "". |
| * attribs.cc (remove_attribute): Use is_attribute_namespace_p. |
| (private_lookup_attribute): For ATTR_NS "" match either standard |
| attribute or "gnu" namespace one. |
| |
| 2022-10-07 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h (DWARF_VERSION_DEFAULT): Adjust from |
| 4 to 3 for VxWorks >= 7. |
| |
| 2022-10-07 Olivier Hainque <hainque@adacore.com> |
| |
| * defaults.h (DWARF_DEFAULT_VERSION): Define if not |
| defined already. |
| * common.opt (gdwarf-): Use it. |
| * doc/tm.texi.in (DWARF_DEFAULT_VERSION): Document. |
| * doc/tm.texi: Update accordingly. |
| * config/vxworks.h (DWARF_DEFAULT_VERSION): Redefine. |
| * config/vxworks.cc: Remove code setting dwarf_version, now |
| handled by the DWARF_DEFAULT_VERSION redefinition. |
| |
| 2022-10-07 Olivier Hainque <hainque@adacore.com> |
| |
| * ginclude/stddef.h: #undef offsetof before #define. |
| |
| 2022-10-06 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107170 |
| * vr-values.cc (vr_values::range_of_expr): Do not die on |
| unsupported types. |
| |
| 2022-10-06 Joseph Myers <joseph@codesourcery.com> |
| |
| * doc/invoke.texi (-fno-asm): Update description of effects on |
| typeof keyword. |
| |
| 2022-10-06 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-loop-jam.cc (tree_loop_unroll_and_jam): Bail out for a self |
| dependency that is a write-after-write if the access function is not |
| affine or constant. |
| |
| 2022-10-06 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * df-scan.cc (df_ref_create_structure): Minor cleanup. |
| |
| 2022-10-06 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/107115 |
| * expr.cc (store_expr): Check mems_same_for_tbaa_p before |
| eliding a seemingly redundant store. |
| |
| 2022-10-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/atomics.md (*atomic_load<ALLX:mode>_zext<SD_HSDI:mode>): |
| New pattern. |
| |
| 2022-10-06 Philipp Tomsich <philipp.tomsich@vrull.eu> |
| |
| * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update |
| Ampere-1 core entry. |
| |
| 2022-10-06 Philipp Tomsich <philipp.tomsich@vrull.eu> |
| |
| * config/aarch64/driver-aarch64.cc (readline): Fix off-by-one. |
| |
| 2022-10-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107107 |
| * tree-ssa-sccvn.cc (visit_reference_op_store): Do not |
| affect value-numbering when doing the tail merging |
| MODIFY_EXPR lookup. |
| |
| 2022-10-06 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/linux.h (LINK_SPEC): Remove max-page-size and |
| common-pave-size. |
| |
| 2022-10-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/106654 |
| * internal-fn.def (ASSUME): New internal function. |
| * internal-fn.h (expand_ASSUME): Declare. |
| * internal-fn.cc (expand_ASSUME): Define. |
| * gimplify.cc (gimplify_call_expr): Gimplify IFN_ASSUME. |
| * fold-const.h (simple_condition_p): Declare. |
| * fold-const.cc (simple_operand_p_2): Rename to ... |
| (simple_condition_p): ... this. Remove forward declaration. |
| No longer static. Adjust function comment and fix a typo in it. |
| Adjust recursive call. |
| (simple_operand_p): Adjust function comment. |
| (fold_truth_andor): Adjust simple_operand_p_2 callers to call |
| simple_condition_p. |
| * doc/extend.texi: Document assume attribute. Move fallthrough |
| attribute example to its section. |
| |
| 2022-10-06 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| PR rtl-optimization/107088 |
| * cselib.cc (new_cselib_val): Skip BImode while keeping track of |
| subvalue relations. |
| |
| 2022-10-06 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Call set_nan unconditionally. |
| (range_tests_nan): Adjust tests. |
| (range_tests_signed_zeros): Same. |
| (range_tests_floats): Same. |
| * value-range.h (frange::update_nan): Guard with HONOR_NANS. |
| (frange::set_nan): Set undefined if !HONOR_NANS. |
| |
| 2022-10-06 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (foperator_lt::fold_range): Remove extra check |
| to finite_operands_p. |
| (foperator_le::fold_range): Same. |
| (foperator_gt::fold_range): Same. |
| (foperator_ge::fold_range): Same. |
| |
| 2022-10-06 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range-pretty-print.cc (vrange_printer::print_real_value): |
| Avoid printing INF and NAN twice. |
| |
| 2022-10-05 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/constraints.md (wD): Delete. |
| * doc/md.texi (Machine Constraints): Adjust. |
| |
| 2022-10-05 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/vsx.md (vsx_extract_<mode>): Replace define_insn by a |
| define_expand. Split the contents to... |
| (*vsx_extract_<mode>_0): ... this. Rewrite. |
| (*vsx_extract_<mode>_1): ... and this. Rewrite. |
| |
| 2022-10-05 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/vsx.md (*vsx_extract_<mode>_store): Use "n" instead of |
| "wD" constraint. |
| |
| 2022-10-05 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/107060 |
| * doc/analyzer.texi (__analyzer_get_unknown_ptr): Document. |
| |
| 2022-10-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config.gcc: Add riscv_vector.h. |
| * config/riscv/riscv-builtins.cc: Add RVV builtin types support. |
| * config/riscv/riscv-c.cc (riscv_pragma_intrinsic): New function. |
| (riscv_register_pragmas): Ditto. |
| * config/riscv/riscv-protos.h (riscv_register_pragmas): Ditto. |
| (init_builtins): Move declaration from riscv-vector-builtins.h to riscv-protos.h. |
| (mangle_builtin_type): Ditto. |
| (verify_type_context): Ditto. |
| (handle_pragma_vector): New function. |
| * config/riscv/riscv-vector-builtins.cc (GTY): New variable. |
| (register_vector_type): New function. |
| (init_builtins): Add RVV builtin types support. |
| (handle_pragma_vector): New function. |
| * config/riscv/riscv-vector-builtins.h (GCC_RISCV_V_BUILTINS_H): Change |
| name according to file name. |
| (GCC_RISCV_VECTOR_BUILTINS_H): Ditto. |
| (init_builtins): Remove declaration in riscv-vector-builtins.h. |
| (mangle_builtin_type): Ditto. |
| (verify_type_context): Ditto. |
| * config/riscv/riscv.cc: Adjust for RVV builtin types support. |
| * config/riscv/riscv.h (REGISTER_TARGET_PRAGMAS): New macro. |
| * config/riscv/t-riscv: Remove redundant file including. |
| * config/riscv/riscv_vector.h: New file. |
| |
| 2022-10-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (operator_cast::fold_range): Handle truncating casts |
| for nonzero masks. |
| |
| 2022-10-05 Martin Liska <mliska@suse.cz> |
| |
| PR c/107156 |
| * attribs.h (lookup_attribute_by_prefix): Support the attribute |
| starting with underscore (_Noreturn). |
| |
| 2022-10-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107052 |
| * gimple-range-op.cc (cfn_popcount::fold_range): Take into account |
| nonzero bit mask. |
| |
| 2022-10-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107052 |
| * range-op.cc (operator_cast::fold_range): Set nonzero mask. |
| |
| 2022-10-05 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR tree-optimization/106698 |
| * pointer-query.cc (handle_array_ref): Fix handling of low bound. |
| |
| 2022-10-05 Vineet Gupta <vineetg@rivosinc.com> |
| |
| * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): |
| Remove __riscv_cmodel_pic, that deprecated in last version. |
| |
| 2022-10-05 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/107072 |
| * Makefile.in (ANALYZER_OBJS): Add analyzer/call-summary.o. |
| |
| 2022-10-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * attribs.h (remove_attribute): Declare overload with additional |
| attr_ns argument. |
| (private_lookup_attribute): Declare overload with additional |
| attr_ns and attr_ns_len arguments. |
| (lookup_attribute): New overload with additional attr_ns argument. |
| * attribs.cc (remove_attribute): New overload with additional |
| attr_ns argument. |
| (private_lookup_attribute): New overload with additional |
| attr_ns and attr_ns_len arguments. |
| |
| 2022-10-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * attribs.cc (handle_ignored_attributes_option, decl_attributes, |
| common_function_versions): Use auto_diagnostic_group. |
| |
| 2022-10-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::set_nonzero_bits): Remove assert. |
| |
| 2022-10-04 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): New macro. |
| * config/aarch64/aarch64-arches.def (armv8.3-a): Include RCPC. |
| * config/aarch64/aarch64-cores.def (thunderx3t110, zeus, neoverse-v1) |
| (neoverse-512tvb, saphira): Remove RCPC from these Armv8.3-A+ cores. |
| * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define |
| __ARM_FEATURE_RCPC when appropriate. |
| |
| 2022-10-04 Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/invoke.texi (-fopenmp): Mention C++ attribut syntax. |
| (-fopenmp-simd): Likewise; update permitted directives. |
| |
| 2022-10-04 Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/install.texi (Specific): Add missing items to bullet list. |
| (amdgcn): Update LLVM requirements, use version not date for newlib. |
| (nvptx): Use version not git hash for newlib. |
| |
| 2022-10-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range-storage.cc (irange_storage_slot::set_irange): Remove |
| special case. |
| * value-range.cc (irange::irange_set): Adjust for nonzero mask |
| being a wide int. |
| (irange::irange_set_anti_range): Same. |
| (irange::set): Same. |
| (irange::verify_range): Same. |
| (irange::legacy_equal_p): Same. |
| (irange::operator==): Same. |
| (irange::contains_p): Same. |
| (irange::legacy_intersect): Same. |
| (irange::legacy_union): Same. |
| (irange::irange_single_pair_union): Call union_nonzero_bits. |
| (irange::irange_union): Same. |
| (irange::irange_intersect): Call intersect_nonzero_bits. |
| (irange::intersect): Adjust for nonzero mask being a wide int. |
| (irange::invert): Same. |
| (irange::set_nonzero_bits): Same. |
| (irange::get_nonzero_bits_from_range): New. |
| (irange::set_range_from_nonzero_bits): New. |
| (irange::get_nonzero_bits): Adjust for nonzero mask being a wide |
| int. |
| (irange::intersect_nonzero_bits): Same. |
| (irange::union_nonzero_bits): Same. |
| (range_tests_nonzero_bits): Remove test. |
| * value-range.h (irange::varying_compatible_p): Adjust for nonzero |
| mask being a wide int. |
| (gt_ggc_mx): Same. |
| (gt_pch_nx): Same. |
| (irange::set_undefined): Same. |
| (irange::set_varying): Same. |
| (irange::normalize_kind): Same. |
| |
| 2022-10-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107130 |
| * gimple-range-op.cc (class cfn_popcount): Call op_cfn_ffs. |
| (class cfn_ffs): New. |
| (gimple_range_op_handler::maybe_builtin_call): Separate out |
| CASE_CFN_FFS into its own case. |
| |
| 2022-10-03 Sergei Trofimovich <siarheit@google.com> |
| |
| * config/i386/t-i386: Add build-time dependencies against |
| i386-builtin-types.inc to i386-builtins.o, i386-expand.o, |
| i386-features.o. |
| |
| 2022-10-03 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (while_ultsidi): Limit mask length using |
| operand 3. |
| * doc/md.texi (while_ult): Document new operand 3 usage. |
| * internal-fn.cc (expand_while_optab_fn): Set operand 3 when lhs_type |
| maps to a non-vector mode. |
| |
| 2022-10-03 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/107109 |
| * range-op.cc (adjust_op1_for_overflow): Don't process undefined. |
| |
| 2022-10-03 Christophe Lyon <christophe.lyon@arm.com> |
| |
| * config/arm/mve.md (mve_vrev64q_m_<supf><mode>): Add early |
| clobber. |
| (mve_vrev64q_m_f<mode>): Likewise. |
| |
| 2022-10-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::set_nonzero_bits): Do not pessimize range. |
| (range_tests_nonzero_bits): New test. |
| |
| 2022-10-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::operator==): Early bail on m_num_ranges |
| equal to 0. |
| |
| 2022-10-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::legacy_equal_p): Remove nonozero mask |
| check when comparing VR_VARYING ranges. |
| |
| 2022-10-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Do not compare |
| incompatible ranges in ipa-prop. |
| |
| 2022-10-02 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/107121 |
| * tree-cfg.cc (verify_gimple_call): Fix a typo in diagnostics, |
| DEFFERED_INIT -> DEFERRED_INIT. |
| |
| 2022-10-02 Marc Poulhiès <poulhies@adacore.com> |
| |
| * config/vxworks-driver.cc: New. |
| * config.gcc (*vxworks*): Add vxworks-driver.o in extra_gcc_objs. |
| * config/t-vxworks: Add vxworks-driver.o. |
| * config/vxworks.h (GCC_DRIVER_HOST_INITIALIZATION): New. |
| |
| 2022-10-02 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h (VX_CRTBEGIN_SPEC, VX_CRTEND_SPEC): If |
| HAVE_INITFINI_ARRAY_SUPPORT, pick crtstuff objects regardless |
| of ENABLE_SHARED_LIBGCC. |
| |
| 2022-10-01 Stafford Horne <shorne@gmail.com> |
| |
| * config/or1k/or1k.cc (TARGET_HAVE_TLS): Only define if |
| HAVE_AS_TLS is defined. |
| |
| 2022-10-01 Julian Brown <julian@codesourcery.com> |
| |
| * gimplify.cc (omp_group_base): Fix IF_PRESENT (no_create) |
| handling. |
| |
| 2022-10-01 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * config/h8300/h8300.md (HSI2): New iterator. |
| (eqne_invert): Similarly. |
| * config/h8300/testcompare.md (testhi_upper_z): New pattern. |
| (cmpqi_z, cmphi_z, cmpsi_z): Likewise. |
| (store_z_qi, store_z_i_qi, store_z_hi, store_z_hi_sb): New |
| define_insn_and_splits and/or define_insns. |
| (store_z_hi_neg, store_z_hi_and, store_z_<mode>): Likewise. |
| (store_z_<mode>_neg, store_z_<mode>_and, store_z): Likewise. |
| |
| 2022-10-01 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * tree-ssa-dom.cc (record_edge_info): Install correct version of |
| patch. |
| |
| 2022-10-01 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * dwarf2out.cc (add_call_src_coords_attributes): Emit discriminators for inlined call sites. |
| |
| 2022-09-30 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * tree-ssa-dom.cc (single_block_loop_p): New function. |
| (record_edge_info): Also record equivalences for the outgoing |
| edge of a single block loop where the condition is an invariant. |
| |
| 2022-09-30 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * tree-ssa-dom.cc (free_dom_edge_info): Clear e->aux too. |
| (free_all_edge_infos): Do not clear e->aux here. |
| |
| 2022-09-30 H.J. Lu <hjl.tools@gmail.com> |
| |
| * target.def (TARGET_C_EXCESS_PRECISION): Document |
| -fexcess-precision=16. |
| |
| 2022-09-30 Palmer Dabbelt <palmer@rivosinc.com> |
| |
| * doc/tm.texi (TARGET_C_EXCESS_PRECISION): Add 16. |
| |
| 2022-09-30 Palmer Dabbelt <palmer@rivosinc.com> |
| |
| PR target/106815 |
| * config/riscv/riscv.cc (riscv_excess_precision): Add support |
| for EXCESS_PRECISION_TYPE_FLOAT16. |
| |
| 2022-09-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/107080 |
| * config/arm/arm.cc (arm_mangle_type): Mangle just __fp16 as Dh |
| and _Float16 as DF16_. |
| * config/csky/csky.cc (csky_init_builtins): Fix a comment typo. |
| (csky_mangle_type): Mangle __fp16 as Dh and _Float16 as DF16_ |
| rather than mangling __fp16 as __fp16. |
| |
| 2022-09-30 Lewis Hyatt <lhyatt@gmail.com> |
| |
| PR preprocessor/69543 |
| * tree-ssa-uninit.cc (warn_uninit): Stop stripping macro tracking |
| information away from the diagnostic location. |
| (maybe_warn_read_write_only): Likewise. |
| (maybe_warn_operand): Likewise. |
| |
| 2022-09-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/107080 |
| * config/aarch64/aarch64.cc (aarch64_mangle_type): Mangle just __fp16 |
| as Dh and _Float16 as DF16_. |
| |
| 2022-09-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/107080 |
| * config/i386/i386.cc (ix86_mangle_type): Always return NULL |
| for float128_type_node or float64x_type_node, don't check |
| float128t_type_node later on. |
| * config/ia64/ia64.cc (ia64_mangle_type): Always return NULL |
| for float128_type_node or float64x_type_node. |
| * config/rs6000/rs6000.cc (rs6000_mangle_type): Likewise. |
| Don't check float128_type_node later on. |
| * config/s390/s390.cc (s390_mangle_type): Don't use |
| TYPE_MAIN_VARIANT on type which was set to TYPE_MAIN_VARIANT |
| a few lines earlier. |
| |
| 2022-09-30 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> |
| Yvan ROUX <yvan.roux@foss.st.com> |
| |
| * doc/sourcebuild.texi: Document new vma_equals_lma effective |
| target check. |
| |
| 2022-09-30 Jiawei <jiawei@iscas.ac.cn> |
| |
| * config/riscv/riscv.cc (riscv_file_start): New .option. |
| * config/riscv/riscv.opt: New options. |
| * doc/invoke.texi: New definations. |
| |
| 2022-09-30 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR target/99888 |
| PR target/105649 |
| * doc/invoke.texi (option -fpatchable-function-entry): Adjust the |
| documentation for PowerPC ELFv2 ABI dual entry points. |
| * config/rs6000/rs6000-internal.h |
| (rs6000_print_patchable_function_entry): New function declaration. |
| * config/rs6000/rs6000-logue.cc (rs6000_output_function_prologue): |
| Support patchable-function-entry by emitting nops before and after |
| local entry for the function that needs global entry. |
| * config/rs6000/rs6000.cc (rs6000_print_patchable_function_entry): Skip |
| the function that needs global entry till global entry has been |
| emitted. |
| * config/rs6000/rs6000.h (struct machine_function): New bool member |
| global_entry_emitted. |
| |
| 2022-09-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/107095 |
| * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Use data arg |
| for .MASK_STORE size. |
| |
| 2022-09-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| * range-op.cc (plus_minus_ranges): New. |
| (adjust_op1_for_overflow): New. |
| (operator_plus::op1_range): Use new adjustment. |
| (operator_plus::op2_range): Ditto. |
| (operator_minus::op1_range): Ditto. |
| * value-relation.h (relation_lt_le_gt_ge_p): New. |
| |
| 2022-09-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-gori.cc (gori_compute::refine_using_relation): New. |
| (gori_compute::compute_operand1_range): Invoke |
| refine_using_relation when applicable. |
| (gori_compute::compute_operand2_range): Ditto. |
| * gimple-range-gori.h (class gori_compute): Adjust prototypes. |
| |
| 2022-09-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-gori.cc (ori_compute::compute_operand_range): |
| Create a relation record and pass it along when possible. |
| (gori_compute::compute_operand1_range): Pass relation along. |
| (gori_compute::compute_operand2_range): Ditto. |
| (gori_compute::compute_operand1_and_operand2_range): Ditto. |
| * gimple-range-gori.h (class gori_compute): Adjust prototypes. |
| * gimple-range-op.cc (gimple_range_op_handler::calc_op1): Pass |
| relation to op1_range call. |
| (gimple_range_op_handler::calc_op2): Pass relation to op2_range call. |
| * gimple-range-op.h (class gimple_range_op_handler): Adjust |
| prototypes. |
| |
| 2022-09-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| * value-relation.cc (class value_relation): Move to .h file. |
| (value_relation::set_relation): Ditto. |
| (value_relation::value_relation): ditto. |
| * value-relation.h (class value_relation): Move from .cc file. |
| (value_relation::set_relation): Ditto |
| (value_relation::value_relation): Ditto. |
| |
| 2022-09-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| * range-op.cc (operator_minus::op2_range): Check for undefined. |
| (operator_mult::op1_range): Ditto. |
| (operator_exact_divide::op1_range): Ditto. |
| (operator_lshift::op1_range): Ditto. |
| (operator_rshift::op1_range): Ditto. |
| (operator_cast::op1_range): Ditto. |
| (operator_bitwise_and::op1_range): Ditto. |
| (operator_bitwise_or::op1_range): Ditto. |
| (operator_trunc_mod::op1_range): Ditto. |
| (operator_trunc_mod::op2_range): Ditto. |
| (operator_bitwise_not::op1_range): Ditto. |
| (pointer_or_operator::op1_range): Ditto. |
| (range_op_handler::op1_range): Ditto. |
| (range_op_handler::op2_range): Ditto. |
| |
| 2022-09-29 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.cc (gcn_simd_clone_compute_vecsize_and_simdlen): |
| Remove unused elt_bits variable. |
| |
| 2022-09-29 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h: Add comment on our use of |
| HAVE_INITFINI_ARRAY_SUPPORT. |
| |
| 2022-09-29 Olivier Hainque <hainque@adacore.com> |
| |
| * config/aarch64/t-aarch64-vxworks: Request multilib |
| variants for mcmodel=large. |
| |
| 2022-09-29 Olivier Hainque <hainque@adacore.com> |
| |
| * config/rs6000/vxworks.h (TARGET_FLOAT128_ENABLE_TYPE): Remove |
| resetting to 0. |
| |
| 2022-09-29 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vx-common.h (DWARF2_UNWIND_INFO): #define to 0 |
| when ARM_UNWIND_INFO is set. |
| |
| 2022-09-29 Julian Brown <julian@codesourcery.com> |
| |
| PR middle-end/107028 |
| * gimplify.cc (omp_check_mapping_compatibility, |
| oacc_resolve_clause_dependencies): New functions. |
| (omp_accumulate_sibling_list): Remove redundant duplicate clause |
| detection for OpenACC. |
| (build_struct_sibling_lists): Skip deleted groups. Don't build sibling |
| list for struct variables that are fully mapped on the same directive |
| for OpenACC. |
| (gimplify_scan_omp_clauses): Call oacc_resolve_clause_dependencies. |
| |
| 2022-09-29 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| PR middle-end/25521 |
| * varasm.cc (categorize_decl_for_section): Place `const volatile' |
| objects in read-only sections. |
| (default_select_section): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-data-ref.cc (dr_may_alias_p): Use to_poly_widest instead |
| of to_widest. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (TARGET_CRYPTO, TARGET_SHA3, TARGET_SM4) |
| (TARGET_DOTPROD): Don't depend on TARGET_SIMD. |
| (TARGET_AES, TARGET_SHA2): Likewise. Remove TARGET_CRYPTO test. |
| (TARGET_FP_F16INST): Don't depend on TARGET_FLOAT. |
| (TARGET_SVE2, TARGET_SVE_F32MM, TARGET_SVE_F64MM): Don't depend |
| on TARGET_SVE. |
| (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3) |
| (TARGET_SVE2_SM4): Don't depend on TARGET_SVE2. |
| (TARGET_F32MM, TARGET_F64MM): Delete. |
| * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Guard |
| float macros with just TARGET_FLOAT rather than TARGET_FLOAT |
| || TARGET_SIMD. |
| * config/aarch64/aarch64-simd.md (copysign<mode>3): Depend |
| only on TARGET_SIMD, rather than TARGET_FLOAT && TARGET_SIMD. |
| (aarch64_crypto_aes<aes_op>v16qi): Depend only on TARGET_AES, |
| rather than TARGET_SIMD && TARGET_AES. |
| (aarch64_crypto_aes<aesmc_op>v16qi): Likewise. |
| (*aarch64_crypto_aese_fused): Likewise. |
| (*aarch64_crypto_aesd_fused): Likewise. |
| (aarch64_crypto_pmulldi): Likewise. |
| (aarch64_crypto_pmullv2di): Likewise. |
| (aarch64_crypto_sha1hsi): Likewise TARGET_SHA2. |
| (aarch64_crypto_sha1hv4si): Likewise. |
| (aarch64_be_crypto_sha1hv4si): Likewise. |
| (aarch64_crypto_sha1su1v4si): Likewise. |
| (aarch64_crypto_sha1<sha1_op>v4si): Likewise. |
| (aarch64_crypto_sha1su0v4si): Likewise. |
| (aarch64_crypto_sha256h<sha256_op>v4si): Likewise. |
| (aarch64_crypto_sha256su0v4si): Likewise. |
| (aarch64_crypto_sha256su1v4si): Likewise. |
| (aarch64_crypto_sha512h<sha512_op>qv2di): Likewise TARGET_SHA3. |
| (aarch64_crypto_sha512su0qv2di): Likewise. |
| (aarch64_crypto_sha512su1qv2di, eor3q<mode>4): Likewise. |
| (aarch64_rax1qv2di, aarch64_xarqv2di, bcaxq<mode>4): Likewise. |
| (aarch64_sm3ss1qv4si): Likewise TARGET_SM4. |
| (aarch64_sm3tt<sm3tt_op>qv4si): Likewise. |
| (aarch64_sm3partw<sm3part_op>qv4si): Likewise. |
| (aarch64_sm4eqv4si, aarch64_sm4ekeyqv4si): Likewise. |
| * config/aarch64/aarch64.md (<FLOATUORS:optab>dihf2) |
| (copysign<GPF:mode>3, copysign<GPF:mode>3_insn) |
| (xorsign<mode>3): Remove redundant TARGET_FLOAT condition. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.opt (aarch64_asm_isa_flags): New variable. |
| * config/aarch64/aarch64.h (aarch64_asm_isa_flags) |
| (aarch64_isa_flags): Redefine as read-only macros. |
| (TARGET_SIMD, TARGET_FLOAT, TARGET_SVE): Don't depend on |
| !TARGET_GENERAL_REGS_ONLY. |
| * common/config/aarch64/aarch64-common.cc |
| (aarch64_set_asm_isa_flags): New function. |
| (aarch64_handle_option): Call it when updating -mgeneral-regs. |
| * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Replace |
| m_old_isa_flags with m_old_asm_isa_flags. |
| (aarch64_set_asm_isa_flags): Declare. |
| * config/aarch64/aarch64-builtins.cc |
| (aarch64_simd_switcher::aarch64_simd_switcher) |
| (aarch64_simd_switcher::~aarch64_simd_switcher): Save and restore |
| aarch64_asm_isa_flags instead of aarch64_isa_flags. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (check_required_extensions): Use aarch64_asm_isa_flags instead |
| of aarch64_isa_flags. |
| * config/aarch64/aarch64.cc (aarch64_set_asm_isa_flags): New function. |
| (aarch64_override_options, aarch64_handle_attr_arch) |
| (aarch64_handle_attr_cpu, aarch64_handle_attr_isa_flags): Use |
| aarch64_set_asm_isa_flags to set the ISA flags. |
| (aarch64_option_print, aarch64_declare_function_name) |
| (aarch64_start_file): Use aarch64_asm_isa_flags instead |
| of aarch64_isa_flags. |
| (aarch64_can_inline_p): Check aarch64_asm_isa_flags as well as |
| aarch64_isa_flags. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * common/config/aarch64/aarch64-common.cc (all_extensions): |
| Include the feature flag in flags_on and flags_off. |
| (aarch64_parse_extension): Update accordingly. |
| (aarch64_get_extension_string_for_isa_flags): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * common/config/aarch64/aarch64-common.cc: Use aarch64_feature_flags |
| for feature flags throughout. |
| * config/aarch64/aarch64-protos.h: Likewise. |
| * config/aarch64/aarch64-sve-builtins.h: Likewise. |
| * config/aarch64/aarch64-sve-builtins.cc: Likewise. |
| * config/aarch64/aarch64.cc: Likewise. |
| * config/aarch64/aarch64.opt: Likewise. |
| * config/aarch64/driver-aarch64.cc: Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * common/config/aarch64/aarch64-common.cc (aarch64_option_extension) |
| (processor_name_to_arch, arch_to_arch_name): Remove const from |
| member variables. |
| (all_extensions, all_cores, all_architectures): Make a constexpr. |
| * config/aarch64/aarch64.cc (processor): Remove const from |
| member variables. |
| (all_architectures): Make a constexpr. |
| * config/aarch64/driver-aarch64.cc (aarch64_core_data) |
| (aarch64_arch_driver_info): Remove const from member variables. |
| (aarch64_cpu_data, aarch64_arches): Make a constexpr. |
| (get_arch_from_id): Return a pointer to const. |
| (host_detect_local_cpu): Update accordingly. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * common/config/aarch64/aarch64-common.cc (processor_name_to_arch) |
| (arch_to_arch_name): Use const char * instead of std::string. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * common/config/aarch64/aarch64-common.cc |
| (TARGET_OPTION_INIT_STRUCT): Delete. |
| (aarch64_option_extension): Remove is_synthetic_flag. |
| (all_extensions): Update accordingly. |
| (all_extensions_by_on, opt_ext, opt_ext_cmp): Delete. |
| (aarch64_option_init_struct, aarch64_contains_opt): Delete. |
| (aarch64_get_extension_string_for_isa_flags): Rewrite to use |
| all_extensions instead of all_extensions_on. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def: Switch to a new format. |
| * config/aarch64/aarch64-cores.def: Use the same format to specify |
| lists of features. |
| * config/aarch64/aarch64-arches.def: Likewise, moving that information |
| from aarch64.h. |
| * config/aarch64/aarch64-opts.h (aarch64_feature_flags): New typedef. |
| * config/aarch64/aarch64.h (aarch64_feature): New class enum. |
| Turn AARCH64_FL_* macros into constexprs, getting the definitions |
| from aarch64-option-extensions.def. Remove AARCH64_FL_FOR_* macros. |
| * common/config/aarch64/aarch64-common.cc: Include |
| aarch64-feature-deps.h. |
| (all_extensions): Update for new .def format. |
| (all_extensions_by_on, all_cores, all_architectures): Likewise. |
| * config/aarch64/driver-aarch64.cc: Include aarch64-feature-deps.h. |
| (aarch64_extensions): Update for new .def format. |
| (aarch64_cpu_data, aarch64_arches): Likewise. |
| * config/aarch64/aarch64.cc: Include aarch64-feature-deps.h. |
| (all_architectures, all_cores): Update for new .def format. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (check_required_extensions): Likewise. |
| * config/aarch64/aarch64-feature-deps.h: New file. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def: Move crypto |
| after sha2. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def (dotprod): Depend |
| on fp as well as simd. |
| (sha3): Likewise. |
| (aes): Likewise. Make +noaes disable crypto. |
| (sha2): Likewise +nosha2. Also make +nosha2 disable sha3 and |
| sve2-sha3. |
| (sve2-sha3): Depend on sha2 as well as sha3. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/107025 |
| * config/aarch64/aarch64.h (oAARCH64_FL_RCPC8_4): Delete. |
| (AARCH64_FL_FOR_V8_4A): Update accordingly. |
| (AARCH64_ISA_RCPC8_4): Use AARCH64_FL_V8_4A directly. |
| * config/aarch64/aarch64-cores.def (thunderx3t110): Remove |
| AARCH64_FL_RCPC8_4. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Remove AARCH64_FL_FOR_<ARCH> |
| from the flags field. |
| * common/config/aarch64/aarch64-common.cc (all_cores): Add it |
| here instead. |
| * config/aarch64/aarch64.cc (all_cores): Likewise. |
| * config/aarch64/driver-aarch64.cc (all_cores): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config.gcc: Remove dead aarch64-option-extensions.def code. |
| * config/aarch64/aarch64-arches.def: Update comment. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-arches.def: Add a leading "V" to the |
| ARCH_IDENT fields. |
| * config/aarch64/aarch64-cores.def: Update accordingly. |
| * common/config/aarch64/aarch64-common.cc (all_cores): Likewise. |
| * config/aarch64/aarch64.cc (all_cores): Likewise. |
| * config/aarch64/driver-aarch64.cc (aarch64_arches): Skip the |
| leading "V". |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (AARCH64_FL_FOR_ARCH8): Rename to... |
| (AARCH64_FL_FOR_V8A): ...this. |
| (AARCH64_FL_FOR_ARCH8_1): Rename to... |
| (AARCH64_FL_FOR_V8_1A): ...this. |
| (AARCH64_FL_FOR_ARCH8_2): Rename to... |
| (AARCH64_FL_FOR_V8_2A): ...this. |
| (AARCH64_FL_FOR_ARCH8_3): Rename to... |
| (AARCH64_FL_FOR_V8_3A): ...this. |
| (AARCH64_FL_FOR_ARCH8_4): Rename to... |
| (AARCH64_FL_FOR_V8_4A): ...this. |
| (AARCH64_FL_FOR_ARCH8_5): Rename to... |
| (AARCH64_FL_FOR_V8_5A): ...this. |
| (AARCH64_FL_FOR_ARCH8_6): Rename to... |
| (AARCH64_FL_FOR_V8_6A): ...this. |
| (AARCH64_FL_FOR_ARCH8_7): Rename to... |
| (AARCH64_FL_FOR_V8_7A): ...this. |
| (AARCH64_FL_FOR_ARCH8_8): Rename to... |
| (AARCH64_FL_FOR_V8_8A): ...this. |
| (AARCH64_FL_FOR_ARCH8_R): Rename to... |
| (AARCH64_FL_FOR_V8R): ...this. |
| (AARCH64_FL_FOR_ARCH9): Rename to... |
| (AARCH64_FL_FOR_V9A): ...this. |
| (AARCH64_FL_FOR_ARCH9_1): Rename to... |
| (AARCH64_FL_FOR_V9_1A): ...this. |
| (AARCH64_FL_FOR_ARCH9_2): Rename to... |
| (AARCH64_FL_FOR_V9_2A): ...this. |
| (AARCH64_FL_FOR_ARCH9_3): Rename to... |
| (AARCH64_FL_FOR_V9_3A): ...this. |
| * common/config/aarch64/aarch64-common.cc (all_cores): Update |
| accordingly. |
| * config/aarch64/aarch64-arches.def: Likewise. |
| * config/aarch64/aarch64-cores.def: Likewise. |
| * config/aarch64/aarch64.cc (all_cores): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (AARCH64_FL_V8_1, AARCH64_FL_V8_2) |
| (AARCH64_FL_V8_3, AARCH64_FL_V8_4, AARCH64_FL_V8_5, AARCH64_FL_V8_6) |
| (AARCH64_FL_V9, AARCH64_FL_V8_7, AARCH64_FL_V8_8, AARCH64_FL_V9_1) |
| (AARCH64_FL_V9_2, AARCH64_FL_V9_3): Add "A" to the end of the name. |
| (AARCH64_FL_V8_R): Rename to AARCH64_FL_V8R. |
| (AARCH64_FL_FOR_ARCH8_1, AARCH64_FL_FOR_ARCH8_2): Update accordingly. |
| (AARCH64_FL_FOR_ARCH8_3, AARCH64_FL_FOR_ARCH8_4): Likewise. |
| (AARCH64_FL_FOR_ARCH8_5, AARCH64_FL_FOR_ARCH8_6): Likewise. |
| (AARCH64_FL_FOR_ARCH8_7, AARCH64_FL_FOR_ARCH8_8): Likewise. |
| (AARCH64_FL_FOR_ARCH8_R, AARCH64_FL_FOR_ARCH9): Likewise. |
| (AARCH64_FL_FOR_ARCH9_1, AARCH64_FL_FOR_ARCH9_2): Likewise. |
| (AARCH64_FL_FOR_ARCH9_3, AARCH64_ISA_V8_2A, AARCH64_ISA_V8_3A) |
| (AARCH64_ISA_V8_4A, AARCH64_ISA_V8_5A, AARCH64_ISA_V8_6A): Likewise. |
| (AARCH64_ISA_V8R, AARCH64_ISA_V9A, AARCH64_ISA_V9_1A): Likewise. |
| (AARCH64_ISA_V9_2A, AARCH64_ISA_V9_3A): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (AARCH64_ISA_V8_2, AARCH64_ISA_V8_3) |
| (AARCH64_ISA_V8_4, AARCH64_ISA_V8_5, AARCH64_ISA_V8_6) |
| (AARCH64_ISA_V9, AARCH64_ISA_V9_1, AARCH64_ISA_V9_2) |
| (AARCH64_ISA_V9_3): Add "A" to the end of the name. |
| (AARCH64_ISA_V8_R): Rename to AARCH64_ISA_V8R. |
| (TARGET_ARMV8_3, TARGET_JSCVT, TARGET_FRINT, TARGET_MEMTAG): Update |
| accordingly. |
| * common/config/aarch64/aarch64-common.cc |
| (aarch64_get_extension_string_for_isa_flags): Likewise. |
| * config/aarch64/aarch64-c.cc |
| (aarch64_define_unconditional_macros): Likewise. |
| |
| 2022-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * Makefile.in (GTFILES): Add OPTIONS_H_EXTRA. |
| |
| 2022-09-29 Jakub Jelinek <jakub@redhat.com> |
| |
| PR bootstrap/107059 |
| * cppdefault.cc (cpp_include_defaults): If SYSROOT_HEADERS_SUFFIX_SPEC |
| isn't defined, add FIXED_INCLUDE_DIR entry with multilib flag 2 |
| before FIXED_INCLUDE_DIR entry with multilib flag 0. |
| * gcc.cc (do_spec_1): If multiarch_dir, add |
| include-fixed/multiarch_dir paths before include-fixed paths. |
| |
| 2022-09-29 Martin Liska <mliska@suse.cz> |
| |
| PR driver/106897 |
| * common.opt: Add -gz=zstd value. |
| * configure.ac: Detect --compress-debug-sections=zstd |
| for both linker and assembler. |
| * configure: Regenerate. |
| * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Handle -gz=zstd. |
| (ASM_COMPRESS_DEBUG_SPEC): Likewise. |
| |
| 2022-09-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/105646 |
| * tree-ssa-uninit.cc (warn_uninitialized_vars): Pre-compute |
| the set of fallthru reachable blocks from function entry |
| and use that to determine wlims.always_executed. |
| |
| 2022-09-29 liuhongt <hongtao.liu@intel.com> |
| |
| PR tree-optimization/107055 |
| * tree-vect-loop-manip.cc (vect_can_advance_ivs_p): Check for |
| nonlinear induction variables. |
| * tree-vect-loop.cc (vect_can_peel_nonlinear_iv_p): New |
| functions. |
| (vectorizable_nonlinear_induction): Put part codes into |
| vect_can_peel_nonlinear_iv_p. |
| * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Declare. |
| |
| 2022-09-28 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * basic-block.h: Remove discriminator from basic blocks. |
| * cfghooks.cc (split_block_1): Remove discriminator from basic blocks. |
| * final.cc (final_start_function_1): Switch from per-bb to per statement |
| discriminator. |
| (final_scan_insn_1): Don't keep track of basic block discriminators. |
| (compute_discriminator): Switch from basic block discriminators to |
| instruction discriminators. |
| (insn_discriminator): New function to return instruction discriminator. |
| (notice_source_line): Use insn_discriminator. |
| * gimple-pretty-print.cc (dump_gimple_bb_header): Remove dumping of |
| basic block discriminators. |
| * gimple-streamer-in.cc (input_bb): Remove reading of basic block |
| discriminators. |
| * gimple-streamer-out.cc (output_bb): Remove writing of basic block |
| discriminators. |
| * input.cc (make_location): Pass 0 discriminator to COMBINE_LOCATION_DATA. |
| (location_with_discriminator): New function to combine locus with |
| a discriminator. |
| (has_discriminator): New function to check if a location has a discriminator. |
| (get_discriminator_from_loc): New function to get the discriminator |
| from a location. |
| * input.h: Declarations of new functions. |
| * lto-streamer-in.cc (cmp_loc): Use discriminators in location comparison. |
| (apply_location_cache): Keep track of current discriminator. |
| (input_location_and_block): Read discriminator from stream. |
| * lto-streamer-out.cc (clear_line_info): Set current discriminator to |
| UINT_MAX. |
| (lto_output_location_1): Write discriminator to stream. |
| * lto-streamer.h: Add discriminator to cached_location. |
| Add current_discr to lto_location_cache. |
| Add current_discr to output_block. |
| * print-rtl.cc (print_rtx_operand_code_i): Print discriminator. |
| * rtl.h: Add extern declaration of insn_discriminator. |
| * tree-cfg.cc (assign_discriminator): New function to assign a unique |
| discriminator value to all statements in a basic block that have the given |
| line number. |
| (assign_discriminators): Assign discriminators to statement locations. |
| * tree-pretty-print.cc (dump_location): Dump discriminators. |
| * tree.cc (set_block): Preserve discriminator when setting block. |
| (set_source_range): Preserve discriminator when setting source range. |
| |
| 2022-09-28 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/107061 |
| * config/i386/predicates.md (encodekey128_operation): Check |
| XMM4-XMM6 as clobbered. |
| (encodekey256_operation): Likewise. |
| * config/i386/sse.md (encodekey128u32): Clobber XMM4-XMM6. |
| (encodekey256u32): Likewise. |
| |
| 2022-09-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> |
| |
| * config.gcc: Add riscv-vector-builtins.o. |
| * config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV builtin function. |
| * config/riscv/riscv-protos.h (riscv_v_ext_enabled_vector_mode_p): New function. |
| * config/riscv/riscv.cc (ENTRY): New macro. |
| (riscv_v_ext_enabled_vector_mode_p): New function. |
| (riscv_mangle_type): Add RVV mangle. |
| (riscv_vector_mode_supported_p): Adjust RVV machine mode. |
| (riscv_verify_type_context): Add context check for RVV. |
| (riscv_vector_alignment): Add RVV alignment target hook support. |
| (TARGET_VECTOR_MODE_SUPPORTED_P): New target hook support. |
| (TARGET_VERIFY_TYPE_CONTEXT): Ditto. |
| (TARGET_VECTOR_ALIGNMENT): Ditto. |
| * config/riscv/t-riscv: Add riscv-vector-builtins.o |
| * config/riscv/riscv-vector-builtins.cc: New file. |
| * config/riscv/riscv-vector-builtins.def: New file. |
| * config/riscv/riscv-vector-builtins.h: New file. |
| * config/riscv/riscv-vector-switch.def: New file. |
| |
| 2022-09-28 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * var-tracking.cc (vt_add_function_parameter): Add entry values |
| up to maximal register mode. |
| |
| 2022-09-28 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * cselib.cc (new_cselib_val): Keep track of further subvalue |
| relations. |
| |
| 2022-09-28 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm-c.cc (arm_cpu_builtins): Define |
| __ARM_FEATURE_AES and __ARM_FEATURE_SHA2. |
| |
| 2022-09-28 Xi Ruoyao <xry111@xry111.site> |
| |
| PR tree-optimization/105414 |
| * config/loongarch/loongarch.md (UNSPEC_FMAX): New unspec. |
| (UNSPEC_FMIN): Likewise. |
| (fmax<mode>3): Use UNSPEC_FMAX instead of smax. |
| (fmin<mode>3): Use UNSPEC_FMIN instead of smin. |
| |
| 2022-09-28 Lulu Cheng <chenglulu@loongson.cn> |
| |
| * config/loongarch/loongarch.cc (loongarch_asan_shadow_offset): |
| Fixed typo in "asan_mapping.h". |
| |
| 2022-09-28 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR middle-end/58245 |
| * calls.cc: Include "tree-eh.h". |
| (expand_call): Check stack canary before throwing exception. |
| |
| 2022-09-27 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * ipa-cp.cc (good_cloning_opportunity_p): Fix profile count comparison. |
| |
| 2022-09-27 Kim Kuparinen <kim.kuparinen@rightware.com> |
| |
| * doc/invoke.texi: Update ABI version info. |
| |
| 2022-09-27 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range-op.cc (cfn_popcount): Calculate the popcount of a |
| singleton. |
| |
| 2022-09-27 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::set_nonzero_bits): Set range when known. |
| |
| 2022-09-27 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (irange::set): New version taking wide_int_ref. |
| |
| 2022-09-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/107029 |
| * tree-ssa-reassoc.cc (optimize_range_tests_cmp_bitwise): Treat |
| OFFSET_TYPE like POINTER_TYPE, except that OFFSET_TYPE may be |
| signed and so can trigger even the (b % 4) == 3 case. |
| |
| 2022-09-27 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * cfgrtl.cc (fixup_reorder_chain): Verify that simple_return |
| and return are available before trying to use them. |
| |
| 2022-09-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/106652 |
| PR c++/85518 |
| * tree-core.h (enum tree_index): Add TI_FLOAT128T_TYPE |
| enumerator. |
| * tree.h (float128t_type_node): Define. |
| * tree.cc (build_common_tree_nodes): Initialize float128t_type_node. |
| * builtins.def (DEF_FLOATN_BUILTIN): Adjust comment now that |
| _Float<N> is supported in C++ too. |
| * config/i386/i386.cc (ix86_mangle_type): Only mangle as "g" |
| float128t_type_node. |
| * config/i386/i386-builtins.cc (ix86_init_builtin_types): Use |
| float128t_type_node for __float128 instead of float128_type_node |
| and create it if NULL. |
| * config/i386/avx512fp16intrin.h (_mm_setzero_ph, _mm256_setzero_ph, |
| _mm512_setzero_ph, _mm_set_sh, _mm_load_sh): Use 0.0f16 instead of |
| 0.0f. |
| * config/ia64/ia64.cc (ia64_init_builtins): Use |
| float128t_type_node for __float128 instead of float128_type_node |
| and create it if NULL. |
| * config/rs6000/rs6000-c.cc (is_float128_p): Also return true |
| for float128t_type_node if non-NULL. |
| * config/rs6000/rs6000.cc (rs6000_mangle_type): Don't mangle |
| float128_type_node as "u9__ieee128". |
| * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Use |
| float128t_type_node for __float128 instead of float128_type_node |
| and create it if NULL. |
| |
| 2022-09-26 Martin Liska <mliska@suse.cz> |
| |
| * doc/invoke.texi: Add missing dash for |
| Wanalyzer-exposure-through-uninit-copy. |
| |
| 2022-09-26 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107009 |
| * range-op.cc (operator_bitwise_and::op1_range): Optimize 0 = x & MASK. |
| (range_op_bitwise_and_tests): New test. |
| |
| 2022-09-26 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/107009 |
| * tree-ssa-dom.cc |
| (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): |
| Iterate over exports. |
| |
| 2022-09-26 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * config.gcc (with_arch) [nvptx]: Allow '--with-arch' to override |
| the default. |
| * config/nvptx/gen-multilib-matches.sh: New. |
| * config/nvptx/t-nvptx (MULTILIB_OPTIONS, MULTILIB_MATCHES) |
| (MULTILIB_EXCEPTIONS): Handle this. |
| * doc/install.texi (Specific) <nvptx-*-none>: Document this. |
| * doc/invoke.texi (Nvidia PTX Options): Likewise. |
| |
| 2022-09-26 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * config.gcc (TM_MULTILIB_CONFIG) [nvptx]: Set to '$with_arch'. |
| * config/nvptx/t-nvptx (MULTILIB_OPTIONS, MULTILIB_MATCHES) |
| (MULTILIB_EXCEPTIONS): Handle it. |
| |
| 2022-09-26 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * config.gcc (with_arch) [nvptx]: Set to 'sm_30'. |
| * config/nvptx/nvptx.cc (nvptx_option_override): Assert that |
| '-misa' appeared. |
| * config/nvptx/nvptx.h (OPTION_DEFAULT_SPECS): Define. |
| * config/nvptx/nvptx.opt (misa=): Remove 'Init'. |
| |
| 2022-09-26 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * config/nvptx/nvptx.h (ASM_SPEC): Define. |
| |
| 2022-09-26 Jeff Law <jeffreyalaw@gmail.com> |
| |
| * cfgcleanup.cc (bb_is_just_return): No longer static. |
| * cfgcleanup.h (bb_is_just_return): Add prototype. |
| * cfgrtl.cc (fixup_reorder_chain): Do not create an |
| unconditional jump to a return block. Conditionally |
| remove unreachable blocks. |
| |
| 2022-09-26 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR middle-end/106982 |
| * omp-low.cc (lower_oacc_reductions): Add some unshare_expr. |
| |
| 2022-09-26 Martin Liska <mliska@suse.cz> |
| |
| * config/s390/s390.cc (s390_rtx_costs): Remove dest variable |
| and use only dst. |
| |
| 2022-09-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-arches.def (armv9.1-a): Define. |
| (armv9.2-a): Likewise. |
| (armv9.3-a): Likewise. |
| * config/aarch64/aarch64.h (AARCH64_FL_V9_1): Likewise. |
| (AARCH64_FL_V9_2): Likewise. |
| (AARCH64_FL_V9_3): Likewise. |
| (AARCH64_FL_FOR_ARCH9_1): Likewise. |
| (AARCH64_FL_FOR_ARCH9_2): Likewise. |
| (AARCH64_FL_FOR_ARCH9_3): Likewise. |
| (AARCH64_ISA_V9_1): Likewise. |
| (AARCH64_ISA_V9_2): Likewise. |
| (AARCH64_ISA_V9_3): Likewise. |
| * doc/invoke.texi (AArch64 Options): Document armv9.1-a, armv9.2-a, |
| armv9.3-a values to -march. |
| |
| 2022-09-26 Martin Liska <mliska@suse.cz> |
| |
| * value-range.cc (tree_compare): Remove unused function. |
| |
| 2022-09-26 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR target/96072 |
| * config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): Update the |
| condition for adding REG_CFA_DEF_CFA reg note with |
| frame_pointer_needed_indeed. |
| |
| 2022-09-26 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR target/100645 |
| * config/rs6000/vector.md (vec_shr_<mode>): Replace condition |
| TARGET_ALTIVEC with VECTOR_UNIT_ALTIVEC_OR_VSX_P. |
| |
| 2022-09-26 Hongtao Liu <hongtao.liu@intel.com> |
| Liwei Xu <liwei.xu@intel.com> |
| |
| PR target/53346 |
| * config/i386/i386-expand.cc (expand_vec_perm_shufps_shufps): |
| New function. |
| (ix86_expand_vec_perm_const_1): Insert |
| expand_vec_perm_shufps_shufps at the end of 2-instruction |
| expand sequence. |
| |
| 2022-09-25 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> |
| |
| * doc/sourcebuild.texi: Fix chapter level. |
| |
| 2022-09-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/107001 |
| * omp-low.cc (lower_omp_taskgroup): Don't add GOMP_RETURN statement |
| at the end. |
| * omp-expand.cc (build_omp_regions_1): Clarify GF_OMP_TARGET_KIND_DATA |
| is not stand-alone directive. For GIMPLE_OMP_TASKGROUP, also don't |
| update parent. |
| (omp_make_gimple_edges) <case GIMPLE_OMP_TASKGROUP>: Reset |
| cur_region back after new_omp_region. |
| |
| 2022-09-23 Vineet Gupta <vineetg@rivosinc.com> |
| |
| * config/riscv/riscv.h (LOCAL_SYM_P): New. |
| (USE_LOAD_ADDRESS_MACRO): Simplify by calling LOCAL_SYM_P. |
| |
| 2022-09-23 zhongjuzhe <juzhe.zhong@rivai.ai> |
| |
| * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add RVV mask modes. |
| (ADJUST_NUNITS): Adjust nunits using riscv_vector_chunks. |
| (ADJUST_ALIGNMENT): Adjust alignment. |
| (ADJUST_BYTESIZE): Adjust bytesize using riscv_vector_chunks. |
| (RVV_MODES): New macro. |
| (VECTOR_MODE_WITH_PREFIX): Add RVV vector modes. |
| (VECTOR_MODES_WITH_PREFIX): Add RVV vector modes. |
| |
| 2022-09-23 zhongjuzhe <juzhe.zhong@rivai.ai> |
| |
| * common/config/riscv/riscv-common.cc: Change "static void" to "void". |
| * config.gcc: Add riscv-selftests.o |
| * config/riscv/predicates.md: Allow const_poly_int. |
| * config/riscv/riscv-protos.h (riscv_reinit): New function. |
| (riscv_parse_arch_string): change as exten function. |
| (riscv_run_selftests): New function. |
| * config/riscv/riscv.cc (riscv_cannot_force_const_mem): Don't allow poly |
| into const pool. |
| (riscv_report_v_required): New function. |
| (riscv_expand_op): New function. |
| (riscv_expand_mult_with_const_int): New function. |
| (riscv_legitimize_poly_move): Ditto. |
| (riscv_legitimize_move): New function. |
| (riscv_hard_regno_mode_ok): Add VL/VTYPE register allocation and fix |
| vector RA. |
| (riscv_convert_vector_bits): Fix riscv_vector_chunks configuration for |
| -marh no 'v'. |
| (riscv_reinit): New function. |
| (TARGET_RUN_TARGET_SELFTESTS): New target hook support. |
| * config/riscv/t-riscv: Add riscv-selftests.o. |
| * config/riscv/riscv-selftests.cc: New file. |
| |
| 2022-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/106922 |
| * tree-ssa-sccvn.cc (vn_reference_lookup_3): Allow |
| an arbitrary number of same valued skipped stores. |
| |
| 2022-09-23 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (frange::set): Swap setters such that the one |
| accepting REAL_VALUE_TYPE does all the work. |
| |
| 2022-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-cores.def (neoverse-v2): New entry. |
| (demeter): Update tunings to neoversev2. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * config/aarch64/aarch64.cc (demeter_addrcost_table): Rename to |
| neoversev2_addrcost_table. |
| (demeter_regmove_cost): Rename to neoversev2_addrcost_table. |
| (demeter_advsimd_vector_cost): Rename to neoversev2_advsimd_vector_cost. |
| (demeter_sve_vector_cost): Rename to neoversev2_sve_vector_cost. |
| (demeter_scalar_issue_info): Rename to neoversev2_scalar_issue_info. |
| (demeter_advsimd_issue_info): Rename to neoversev2_advsimd_issue_info. |
| (demeter_sve_issue_info): Rename to neoversev2_sve_issue_info. |
| (demeter_vec_issue_info): Rename to neoversev2_vec_issue_info. |
| Update references to above. |
| (demeter_vector_cost): Rename to neoversev2_vector_cost. |
| (demeter_tunings): Rename to neoversev2_tunings. |
| (aarch64_vec_op_count::rename_cycles_per_iter): Use |
| neoversev2_sve_issue_info instead of demeter_sve_issue_info. |
| * doc/invoke.texi (AArch64 Options): Document neoverse-v2. |
| |
| 2022-09-23 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op-float.cc (build_le): Use vrp_val_*. |
| (build_lt): Same. |
| (build_ge): Same. |
| (build_gt): Same. |
| * value-range.cc (frange::set): Chop ranges outside of the |
| representable numbers for -ffinite-math-only. |
| (frange::normalize_kind): Use vrp_val*. |
| (frange::verify_range): Same. |
| (frange::set_nonnegative): Same. |
| (range_tests_floats): Remove tests that depend on -INF and +INF. |
| * value-range.h (real_max_representable): Add prototype. |
| (real_min_representable): Same. |
| (vrp_val_max): Set max representable number for |
| -ffinite-math-only. |
| (vrp_val_min): Same but for min. |
| (frange::set_varying): Use vrp_val*. |
| |
| 2022-09-23 Aldy Hernandez <aldyh@redhat.com> |
| |
| * real.cc (debug): New. |
| |
| 2022-09-23 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range-pretty-print.cc (vrange_printer::print_real_value): New. |
| (vrange_printer::visit): Call print_real_value. |
| * value-range-pretty-print.h: New print_real_value. |
| |
| 2022-09-23 Martin Liska <mliska@suse.cz> |
| |
| * common.opt: Update -flto-compression-level documentation. |
| * opts.cc (print_filtered_help): Do not append range to an |
| option that uses \t syntax. |
| |
| 2022-09-23 Jakub Jelinek <jakub@redhat.com> |
| |
| * attribs.cc (decl_attributes): Improve diagnostics, instead of |
| saying expected between 1 and 1, found 2 just say expected 1, found 2. |
| |
| 2022-09-23 Hu, Lin1 <lin1.hu@intel.com> |
| |
| PR target/94962 |
| * config/i386/constraints.md (BH): New define_constraint. |
| * config/i386/i386.cc (standard_sse_constant_p): Add return |
| 3/4 when operand matches new predicate. |
| (standard_sse_constant_opcode): Add new alternative branch to |
| return "vpcmpeqd". |
| * config/i386/predicates.md |
| (vector_all_ones_zero_extend_half_operand): New define_predicate. |
| (vector_all_ones_zero_extend_quarter_operand): Ditto. |
| * config/i386/sse.md: Add constraint to insn "mov<mode>_internal". |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_range_op): Handle no operands. |
| (range_of_call): Do not check for builtins. |
| (fold_using_range::range_of_builtin_call): Delete. |
| (fold_using_range::range_of_builtin_int_call): Delete. |
| * gimple-range-fold.h: Adjust prototypes. |
| * gimple-range-op.cc (class cfn_parity): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_GOACC_DIM_*. |
| * gimple-range-op.cc (class cfn_goacc_dim): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_BUILT_IN_STRLEN. |
| * gimple-range-op.cc (class cfn_strlen): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_ubsan_call): Delete. |
| (range_of_builtin_int_call): Remove cases for |
| CFN_BUILT_IN_UBSAN_CHECK. |
| * gimple-range-op.cc (class cfn_ubsan): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_BUILT_IN_CLRSB. |
| * gimple-range-op.cc (class cfn_clrsb): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_CTZ. |
| * gimple-range-op.cc (class cfn_ctz): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_CLZ. |
| * gimple-range-op.cc (class cfn_clz): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_FFS and CFN_POPCOUNT. |
| * gimple-range-op.cc (class cfn_pocount): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (get_letter_range): Move to new class. |
| (range_of_builtin_int_call): Remove case for CFN_BUILT_IN_TOUPPER |
| and CFN_BUILT_IN_TOLOWER. |
| * gimple-range-op.cc (class cfn_toupper_tolower): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_builtin_int_call): Remove case |
| for CFN_BUILT_IN_SIGNBIT. |
| * gimple-range-op.cc (class cfn_signbit): New. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc |
| (fold_using_range::range_of_builtin_int_call): Remove case for |
| CFN_BUILT_IN_CONSTANT_P. |
| * gimple-range-op.cc (gimple_range_op_handler::supported_p): |
| Check if a call also creates a range-op object. |
| (gimple_range_op_handler): Also check builtin calls. |
| (class cfn_constant_float_p): New. Float CFN_BUILT_IN_CONSTANT_P. |
| (class cfn_constant_p): New. Integral CFN_BUILT_IN_CONSTANT_P. |
| (gimple_range_op_handler::maybe_builtin_call): Set arguments and |
| handler for supported built-in calls. |
| * gimple-range-op.h (maybe_builtin_call): New prototype. |
| |
| 2022-09-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-fold.cc (range_of_range_op): Set result to |
| VARYING if the call to fold_range fails. |
