| /* Register Transfer Language (RTL) definitions for GCC |
| Copyright (C) 1987-2017 Free Software Foundation, Inc. |
| |
| This file is part of GCC. |
| |
| GCC is free software; you can redistribute it and/or modify it under |
| the terms of the GNU General Public License as published by the Free |
| Software Foundation; either version 3, or (at your option) any later |
| version. |
| |
| GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
| WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| for more details. |
| |
| You should have received a copy of the GNU General Public License |
| along with GCC; see the file COPYING3. If not see |
| <http://www.gnu.org/licenses/>. */ |
| |
| #ifndef GCC_RTL_H |
| #define GCC_RTL_H |
| |
| /* This file is occasionally included by generator files which expect |
| machmode.h and other files to exist and would not normally have been |
| included by coretypes.h. */ |
| #ifdef GENERATOR_FILE |
| #include "machmode.h" |
| #include "signop.h" |
| #include "wide-int.h" |
| #include "double-int.h" |
| #include "real.h" |
| #include "fixed-value.h" |
| #include "statistics.h" |
| #include "vec.h" |
| #include "hash-table.h" |
| #include "hash-set.h" |
| #include "input.h" |
| #include "is-a.h" |
| #endif /* GENERATOR_FILE */ |
| |
| #include "hard-reg-set.h" |
| |
| /* Value used by some passes to "recognize" noop moves as valid |
| instructions. */ |
| #define NOOP_MOVE_INSN_CODE INT_MAX |
| |
| /* Register Transfer Language EXPRESSIONS CODES */ |
| |
| #define RTX_CODE enum rtx_code |
| enum rtx_code { |
| |
| #define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) ENUM , |
| #include "rtl.def" /* rtl expressions are documented here */ |
| #undef DEF_RTL_EXPR |
| |
| LAST_AND_UNUSED_RTX_CODE}; /* A convenient way to get a value for |
| NUM_RTX_CODE. |
| Assumes default enum value assignment. */ |
| |
| /* The cast here, saves many elsewhere. */ |
| #define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE) |
| |
| /* Similar, but since generator files get more entries... */ |
| #ifdef GENERATOR_FILE |
| # define NON_GENERATOR_NUM_RTX_CODE ((int) MATCH_OPERAND) |
| #endif |
| |
| /* Register Transfer Language EXPRESSIONS CODE CLASSES */ |
| |
| enum rtx_class { |
| /* We check bit 0-1 of some rtx class codes in the predicates below. */ |
| |
| /* Bit 0 = comparison if 0, arithmetic is 1 |
| Bit 1 = 1 if commutative. */ |
| RTX_COMPARE, /* 0 */ |
| RTX_COMM_COMPARE, |
| RTX_BIN_ARITH, |
| RTX_COMM_ARITH, |
| |
| /* Must follow the four preceding values. */ |
| RTX_UNARY, /* 4 */ |
| |
| RTX_EXTRA, |
| RTX_MATCH, |
| RTX_INSN, |
| |
| /* Bit 0 = 1 if constant. */ |
| RTX_OBJ, /* 8 */ |
| RTX_CONST_OBJ, |
| |
| RTX_TERNARY, |
| RTX_BITFIELD_OPS, |
| RTX_AUTOINC |
| }; |
| |
| #define RTX_OBJ_MASK (~1) |
| #define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK) |
| #define RTX_COMPARE_MASK (~1) |
| #define RTX_COMPARE_RESULT (RTX_COMPARE & RTX_COMPARE_MASK) |
| #define RTX_ARITHMETIC_MASK (~1) |
| #define RTX_ARITHMETIC_RESULT (RTX_COMM_ARITH & RTX_ARITHMETIC_MASK) |
| #define RTX_BINARY_MASK (~3) |
| #define RTX_BINARY_RESULT (RTX_COMPARE & RTX_BINARY_MASK) |
| #define RTX_COMMUTATIVE_MASK (~2) |
| #define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK) |
| #define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK) |
| |
| extern const unsigned char rtx_length[NUM_RTX_CODE]; |
| #define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)]) |
| |
| extern const char * const rtx_name[NUM_RTX_CODE]; |
| #define GET_RTX_NAME(CODE) (rtx_name[(int) (CODE)]) |
| |
| extern const char * const rtx_format[NUM_RTX_CODE]; |
| #define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)]) |
| |
| extern const enum rtx_class rtx_class[NUM_RTX_CODE]; |
| #define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)]) |
| |
| /* True if CODE is part of the insn chain (i.e. has INSN_UID, PREV_INSN |
| and NEXT_INSN fields). */ |
| #define INSN_CHAIN_CODE_P(CODE) IN_RANGE (CODE, DEBUG_INSN, NOTE) |
| |
| extern const unsigned char rtx_code_size[NUM_RTX_CODE]; |
| extern const unsigned char rtx_next[NUM_RTX_CODE]; |
| |
| /* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label |
| relative to which the offsets are calculated, as explained in rtl.def. */ |
| struct addr_diff_vec_flags |
| { |
| /* Set at the start of shorten_branches - ONLY WHEN OPTIMIZING - : */ |
| unsigned min_align: 8; |
| /* Flags: */ |
| unsigned base_after_vec: 1; /* BASE is after the ADDR_DIFF_VEC. */ |
| unsigned min_after_vec: 1; /* minimum address target label is |
| after the ADDR_DIFF_VEC. */ |
| unsigned max_after_vec: 1; /* maximum address target label is |
| after the ADDR_DIFF_VEC. */ |
| unsigned min_after_base: 1; /* minimum address target label is |
| after BASE. */ |
| unsigned max_after_base: 1; /* maximum address target label is |
| after BASE. */ |
| /* Set by the actual branch shortening process - ONLY WHEN OPTIMIZING - : */ |
| unsigned offset_unsigned: 1; /* offsets have to be treated as unsigned. */ |
| unsigned : 2; |
| unsigned scale : 8; |
| }; |
| |
| /* Structure used to describe the attributes of a MEM. These are hashed |
| so MEMs that the same attributes share a data structure. This means |
| they cannot be modified in place. */ |
| struct GTY(()) mem_attrs |
| { |
| /* The expression that the MEM accesses, or null if not known. |
| This expression might be larger than the memory reference itself. |
| (In other words, the MEM might access only part of the object.) */ |
| tree expr; |
| |
| /* The offset of the memory reference from the start of EXPR. |
| Only valid if OFFSET_KNOWN_P. */ |
| HOST_WIDE_INT offset; |
| |
| /* The size of the memory reference in bytes. Only valid if |
| SIZE_KNOWN_P. */ |
| HOST_WIDE_INT size; |
| |
| /* The alias set of the memory reference. */ |
| alias_set_type alias; |
| |
| /* The alignment of the reference in bits. Always a multiple of |
| BITS_PER_UNIT. Note that EXPR may have a stricter alignment |
| than the memory reference itself. */ |
| unsigned int align; |
| |
| /* The address space that the memory reference uses. */ |
| unsigned char addrspace; |
| |
| /* True if OFFSET is known. */ |
| bool offset_known_p; |
| |
| /* True if SIZE is known. */ |
| bool size_known_p; |
| }; |
| |
| /* Structure used to describe the attributes of a REG in similar way as |
| mem_attrs does for MEM above. Note that the OFFSET field is calculated |
| in the same way as for mem_attrs, rather than in the same way as a |
| SUBREG_BYTE. For example, if a big-endian target stores a byte |
| object in the low part of a 4-byte register, the OFFSET field |
| will be -3 rather than 0. */ |
| |
| struct GTY((for_user)) reg_attrs { |
| tree decl; /* decl corresponding to REG. */ |
| HOST_WIDE_INT offset; /* Offset from start of DECL. */ |
| }; |
| |
| /* Common union for an element of an rtx. */ |
| |
| union rtunion |
| { |
| int rt_int; |
| unsigned int rt_uint; |
| const char *rt_str; |
| rtx rt_rtx; |
| rtvec rt_rtvec; |
| machine_mode rt_type; |
| addr_diff_vec_flags rt_addr_diff_vec_flags; |
| struct cselib_val *rt_cselib; |
| tree rt_tree; |
| basic_block rt_bb; |
| mem_attrs *rt_mem; |
| struct constant_descriptor_rtx *rt_constant; |
| struct dw_cfi_node *rt_cfi; |
| }; |
| |
| /* Describes the properties of a REG. */ |
| struct GTY(()) reg_info { |
| /* The value of REGNO. */ |
| unsigned int regno; |
| |
| /* The value of REG_NREGS. */ |
| unsigned int nregs : 8; |
| unsigned int unused : 24; |
| |
| /* The value of REG_ATTRS. */ |
| reg_attrs *attrs; |
| }; |
| |
| /* This structure remembers the position of a SYMBOL_REF within an |
| object_block structure. A SYMBOL_REF only provides this information |
| if SYMBOL_REF_HAS_BLOCK_INFO_P is true. */ |
| struct GTY(()) block_symbol { |
| /* The usual SYMBOL_REF fields. */ |
| rtunion GTY ((skip)) fld[2]; |
| |
| /* The block that contains this object. */ |
| struct object_block *block; |
| |
| /* The offset of this object from the start of its block. It is negative |
| if the symbol has not yet been assigned an offset. */ |
| HOST_WIDE_INT offset; |
| }; |
| |
| /* Describes a group of objects that are to be placed together in such |
| a way that their relative positions are known. */ |
| struct GTY((for_user)) object_block { |
| /* The section in which these objects should be placed. */ |
| section *sect; |
| |
| /* The alignment of the first object, measured in bits. */ |
| unsigned int alignment; |
| |
| /* The total size of the objects, measured in bytes. */ |
| HOST_WIDE_INT size; |
| |
| /* The SYMBOL_REFs for each object. The vector is sorted in |
| order of increasing offset and the following conditions will |
| hold for each element X: |
| |
| SYMBOL_REF_HAS_BLOCK_INFO_P (X) |
| !SYMBOL_REF_ANCHOR_P (X) |
| SYMBOL_REF_BLOCK (X) == [address of this structure] |
| SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */ |
| vec<rtx, va_gc> *objects; |
| |
| /* All the anchor SYMBOL_REFs used to address these objects, sorted |
| in order of increasing offset, and then increasing TLS model. |
| The following conditions will hold for each element X in this vector: |
| |
| SYMBOL_REF_HAS_BLOCK_INFO_P (X) |
| SYMBOL_REF_ANCHOR_P (X) |
| SYMBOL_REF_BLOCK (X) == [address of this structure] |
| SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */ |
| vec<rtx, va_gc> *anchors; |
| }; |
| |
| struct GTY((variable_size)) hwivec_def { |
| HOST_WIDE_INT elem[1]; |
| }; |
| |
| /* Number of elements of the HWIVEC if RTX is a CONST_WIDE_INT. */ |
| #define CWI_GET_NUM_ELEM(RTX) \ |
| ((int)RTL_FLAG_CHECK1("CWI_GET_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem) |
| #define CWI_PUT_NUM_ELEM(RTX, NUM) \ |
| (RTL_FLAG_CHECK1("CWI_PUT_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem = (NUM)) |
| |
| /* RTL expression ("rtx"). */ |
| |
| /* The GTY "desc" and "tag" options below are a kludge: we need a desc |
| field for gengtype to recognize that inheritance is occurring, |
| so that all subclasses are redirected to the traversal hook for the |
| base class. |
| However, all of the fields are in the base class, and special-casing |
| is at work. Hence we use desc and tag of 0, generating a switch |
| statement of the form: |
| switch (0) |
| { |
| case 0: // all the work happens here |
| } |
| in order to work with the existing special-casing in gengtype. */ |
| |
| struct GTY((desc("0"), tag("0"), |
| chain_next ("RTX_NEXT (&%h)"), |
| chain_prev ("RTX_PREV (&%h)"))) rtx_def { |
| /* The kind of expression this is. */ |
| ENUM_BITFIELD(rtx_code) code: 16; |
| |
| /* The kind of value the expression has. */ |
| ENUM_BITFIELD(machine_mode) mode : 8; |
| |
| /* 1 in a MEM if we should keep the alias set for this mem unchanged |
| when we access a component. |
| 1 in a JUMP_INSN if it is a crossing jump. |
| 1 in a CALL_INSN if it is a sibling call. |
| 1 in a SET that is for a return. |
| In a CODE_LABEL, part of the two-bit alternate entry field. |
| 1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.c. |
| 1 in a VALUE is SP_BASED_VALUE_P in cselib.c. |
| 1 in a SUBREG generated by LRA for reload insns. |
| 1 in a REG if this is a static chain register. |
| 1 in a CALL for calls instrumented by Pointer Bounds Checker. |
| Dumped as "/j" in RTL dumps. */ |
| unsigned int jump : 1; |
| /* In a CODE_LABEL, part of the two-bit alternate entry field. |
| 1 in a MEM if it cannot trap. |
| 1 in a CALL_INSN logically equivalent to |
| ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. |
| Dumped as "/c" in RTL dumps. */ |
| unsigned int call : 1; |
| /* 1 in a REG, MEM, or CONCAT if the value is set at most once, anywhere. |
| 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P. |
| 1 in a SYMBOL_REF if it addresses something in the per-function |
| constants pool. |
| 1 in a CALL_INSN logically equivalent to ECF_CONST and TREE_READONLY. |
| 1 in a NOTE, or EXPR_LIST for a const call. |
| 1 in a JUMP_INSN of an annulling branch. |
| 1 in a CONCAT is VAL_EXPR_IS_CLOBBERED in var-tracking.c. |
| 1 in a preserved VALUE is PRESERVED_VALUE_P in cselib.c. |
| 1 in a clobber temporarily created for LRA. |
| Dumped as "/u" in RTL dumps. */ |
| unsigned int unchanging : 1; |
| /* 1 in a MEM or ASM_OPERANDS expression if the memory reference is volatile. |
| 1 in an INSN, CALL_INSN, JUMP_INSN, CODE_LABEL, BARRIER, or NOTE |
| if it has been deleted. |
| 1 in a REG expression if corresponds to a variable declared by the user, |
| 0 for an internally generated temporary. |
| 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P. |
| 1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a |
| non-local label. |
| In a SYMBOL_REF, this flag is used for machine-specific purposes. |
| In a PREFETCH, this flag indicates that it should be considered a |
| scheduling barrier. |
| 1 in a CONCAT is VAL_NEEDS_RESOLUTION in var-tracking.c. |
| Dumped as "/v" in RTL dumps. */ |
| unsigned int volatil : 1; |
| /* 1 in a REG if the register is used only in exit code a loop. |
| 1 in a SUBREG expression if was generated from a variable with a |
| promoted mode. |
| 1 in a CODE_LABEL if the label is used for nonlocal gotos |
| and must not be deleted even if its count is zero. |
| 1 in an INSN, JUMP_INSN or CALL_INSN if this insn must be scheduled |
| together with the preceding insn. Valid only within sched. |
| 1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and |
| from the target of a branch. Valid from reorg until end of compilation; |
| cleared before used. |
| |
| The name of the field is historical. It used to be used in MEMs |
| to record whether the MEM accessed part of a structure. |
| Dumped as "/s" in RTL dumps. */ |
| unsigned int in_struct : 1; |
| /* At the end of RTL generation, 1 if this rtx is used. This is used for |
| copying shared structure. See `unshare_all_rtl'. |
| In a REG, this is not needed for that purpose, and used instead |
| in `leaf_renumber_regs_insn'. |
| 1 in a SYMBOL_REF, means that emit_library_call |
| has used it as the function. |
| 1 in a CONCAT is VAL_HOLDS_TRACK_EXPR in var-tracking.c. |
| 1 in a VALUE or DEBUG_EXPR is VALUE_RECURSED_INTO in var-tracking.c. */ |
| unsigned int used : 1; |
| /* 1 in an INSN or a SET if this rtx is related to the call frame, |
| either changing how we compute the frame address or saving and |
| restoring registers in the prologue and epilogue. |
| 1 in a REG or MEM if it is a pointer. |
| 1 in a SYMBOL_REF if it addresses something in the per-function |
| constant string pool. |
| 1 in a VALUE is VALUE_CHANGED in var-tracking.c. |
| Dumped as "/f" in RTL dumps. */ |
| unsigned frame_related : 1; |
| /* 1 in a REG or PARALLEL that is the current function's return value. |
| 1 in a SYMBOL_REF for a weak symbol. |
| 1 in a CALL_INSN logically equivalent to ECF_PURE and DECL_PURE_P. |
| 1 in a CONCAT is VAL_EXPR_HAS_REVERSE in var-tracking.c. |
| 1 in a VALUE or DEBUG_EXPR is NO_LOC_P in var-tracking.c. |
| Dumped as "/i" in RTL dumps. */ |
| unsigned return_val : 1; |
| |
| union { |
| /* The final union field is aligned to 64 bits on LP64 hosts, |
| giving a 32-bit gap after the fields above. We optimize the |
| layout for that case and use the gap for extra code-specific |
| information. */ |
| |
| /* The ORIGINAL_REGNO of a REG. */ |
| unsigned int original_regno; |
| |
| /* The INSN_UID of an RTX_INSN-class code. */ |
| int insn_uid; |
| |
| /* The SYMBOL_REF_FLAGS of a SYMBOL_REF. */ |
| unsigned int symbol_ref_flags; |
| |
| /* The PAT_VAR_LOCATION_STATUS of a VAR_LOCATION. */ |
| enum var_init_status var_location_status; |
| |
| /* In a CONST_WIDE_INT (aka hwivec_def), this is the number of |
| HOST_WIDE_INTs in the hwivec_def. */ |
| unsigned int num_elem; |
| } GTY ((skip)) u2; |
| |
| /* The first element of the operands of this rtx. |
| The number of operands and their types are controlled |
| by the `code' field, according to rtl.def. */ |
| union u { |
| rtunion fld[1]; |
| HOST_WIDE_INT hwint[1]; |
| struct reg_info reg; |
| struct block_symbol block_sym; |
| struct real_value rv; |
| struct fixed_value fv; |
| struct hwivec_def hwiv; |
| } GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u; |
| }; |
| |
| /* A node for constructing singly-linked lists of rtx. */ |
| |
| class GTY(()) rtx_expr_list : public rtx_def |
| { |
| /* No extra fields, but adds invariant: (GET_CODE (X) == EXPR_LIST). */ |
| |
| public: |
| /* Get next in list. */ |
| rtx_expr_list *next () const; |
| |
| /* Get at the underlying rtx. */ |
| rtx element () const; |
| }; |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_expr_list *>::test (rtx rt) |
| { |
| return rt->code == EXPR_LIST; |
| } |
| |
| class GTY(()) rtx_insn_list : public rtx_def |
| { |
| /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST). |
| |
| This is an instance of: |
| |
| DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA) |
| |
| i.e. a node for constructing singly-linked lists of rtx_insn *, where |
| the list is "external" to the insn (as opposed to the doubly-linked |
| list embedded within rtx_insn itself). */ |
| |
| public: |
| /* Get next in list. */ |
| rtx_insn_list *next () const; |
| |
| /* Get at the underlying instruction. */ |
| rtx_insn *insn () const; |
| |
| }; |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_insn_list *>::test (rtx rt) |
| { |
| return rt->code == INSN_LIST; |
| } |
| |
| /* A node with invariant GET_CODE (X) == SEQUENCE i.e. a vector of rtx, |
| typically (but not always) of rtx_insn *, used in the late passes. */ |
| |
| class GTY(()) rtx_sequence : public rtx_def |
| { |
| /* No extra fields, but adds invariant: (GET_CODE (X) == SEQUENCE). */ |
| |
| public: |
| /* Get number of elements in sequence. */ |
| int len () const; |
| |
| /* Get i-th element of the sequence. */ |
| rtx element (int index) const; |
| |
| /* Get i-th element of the sequence, with a checked cast to |
| rtx_insn *. */ |
| rtx_insn *insn (int index) const; |
| }; |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_sequence *>::test (rtx rt) |
| { |
| return rt->code == SEQUENCE; |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <const rtx_sequence *>::test (const_rtx rt) |
| { |
| return rt->code == SEQUENCE; |
| } |
| |
| class GTY(()) rtx_insn : public rtx_def |
| { |
| public: |
| /* No extra fields, but adds the invariant: |
| |
| (INSN_P (X) |
| || NOTE_P (X) |
| || JUMP_TABLE_DATA_P (X) |
| || BARRIER_P (X) |
| || LABEL_P (X)) |
| |
| i.e. that we must be able to use the following: |
| INSN_UID () |
| NEXT_INSN () |
| PREV_INSN () |
| i.e. we have an rtx that has an INSN_UID field and can be part of |
| a linked list of insns. |
| */ |
| |
| /* Returns true if this insn has been deleted. */ |
| |
| bool deleted () const { return volatil; } |
| |
| /* Mark this insn as deleted. */ |
| |
| void set_deleted () { volatil = true; } |
| |
| /* Mark this insn as not deleted. */ |
| |
| void set_undeleted () { volatil = false; } |
| }; |
| |
| /* Subclasses of rtx_insn. */ |
| |
| class GTY(()) rtx_debug_insn : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| DEBUG_INSN_P (X) aka (GET_CODE (X) == DEBUG_INSN) |
| i.e. an annotation for tracking variable assignments. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN) |
| from rtl.def. */ |
| }; |
| |
| class GTY(()) rtx_nonjump_insn : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| NONJUMP_INSN_P (X) aka (GET_CODE (X) == INSN) |
| i.e an instruction that cannot jump. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN) |
| from rtl.def. */ |
| }; |
| |
| class GTY(()) rtx_jump_insn : public rtx_insn |
| { |
| public: |
| /* No extra fields, but adds the invariant: |
| JUMP_P (X) aka (GET_CODE (X) == JUMP_INSN) |
| i.e. an instruction that can possibly jump. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN) |
| from rtl.def. */ |
| |
| /* Returns jump target of this instruction. The returned value is not |
| necessarily a code label: it may also be a RETURN or SIMPLE_RETURN |
| expression. Also, when the code label is marked "deleted", it is |
| replaced by a NOTE. In some cases the value is NULL_RTX. */ |
| |
| inline rtx jump_label () const; |
| |
| /* Returns jump target cast to rtx_code_label *. */ |
| |
| inline rtx_code_label *jump_target () const; |
| |
| /* Set jump target. */ |
| |
| inline void set_jump_target (rtx_code_label *); |
| }; |
| |
| class GTY(()) rtx_call_insn : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| CALL_P (X) aka (GET_CODE (X) == CALL_INSN) |
| i.e. an instruction that can possibly call a subroutine |
| but which will not change which instruction comes next |
| in the current function. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN) |
| from rtl.def. */ |
| }; |
| |
| class GTY(()) rtx_jump_table_data : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| JUMP_TABLE_DATA_P (X) aka (GET_CODE (INSN) == JUMP_TABLE_DATA) |
| i.e. a data for a jump table, considered an instruction for |
| historical reasons. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN) |
| from rtl.def. */ |
| |
| public: |
| |
| /* This can be either: |
| |
| (a) a table of absolute jumps, in which case PATTERN (this) is an |
| ADDR_VEC with arg 0 a vector of labels, or |
| |
| (b) a table of relative jumps (e.g. for -fPIC), in which case |
| PATTERN (this) is an ADDR_DIFF_VEC, with arg 0 a LABEL_REF and |
| arg 1 the vector of labels. |
| |
| This method gets the underlying vec. */ |
| |
| inline rtvec get_labels () const; |
| }; |
| |
| class GTY(()) rtx_barrier : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| BARRIER_P (X) aka (GET_CODE (X) == BARRIER) |
| i.e. a marker that indicates that control will not flow through. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA) |
| from rtl.def. */ |
| }; |
| |
| class GTY(()) rtx_code_label : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| LABEL_P (X) aka (GET_CODE (X) == CODE_LABEL) |
| i.e. a label in the assembler. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA) |
| from rtl.def. */ |
| }; |
| |
| class GTY(()) rtx_note : public rtx_insn |
| { |
| /* No extra fields, but adds the invariant: |
| NOTE_P(X) aka (GET_CODE (X) == NOTE) |
| i.e. a note about the corresponding source code. |
| |
| This is an instance of: |
| DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA) |
| from rtl.def. */ |
| }; |
| |
| /* The size in bytes of an rtx header (code, mode and flags). */ |
| #define RTX_HDR_SIZE offsetof (struct rtx_def, u) |
| |
| /* The size in bytes of an rtx with code CODE. */ |
| #define RTX_CODE_SIZE(CODE) rtx_code_size[CODE] |
| |
| #define NULL_RTX (rtx) 0 |
| |
| /* The "next" and "previous" RTX, relative to this one. */ |
| |
| #define RTX_NEXT(X) (rtx_next[GET_CODE (X)] == 0 ? NULL \ |
| : *(rtx *)(((char *)X) + rtx_next[GET_CODE (X)])) |
| |
| /* FIXME: the "NEXT_INSN (PREV_INSN (X)) == X" condition shouldn't be needed. |
| */ |
| #define RTX_PREV(X) ((INSN_P (X) \ |
| || NOTE_P (X) \ |
| || JUMP_TABLE_DATA_P (X) \ |
| || BARRIER_P (X) \ |
| || LABEL_P (X)) \ |
| && PREV_INSN (as_a <rtx_insn *> (X)) != NULL \ |
| && NEXT_INSN (PREV_INSN (as_a <rtx_insn *> (X))) == X \ |
| ? PREV_INSN (as_a <rtx_insn *> (X)) : NULL) |
| |
| /* Define macros to access the `code' field of the rtx. */ |
| |
| #define GET_CODE(RTX) ((enum rtx_code) (RTX)->code) |
| #define PUT_CODE(RTX, CODE) ((RTX)->code = (CODE)) |
| |
| #define GET_MODE(RTX) ((machine_mode) (RTX)->mode) |
| #define PUT_MODE_RAW(RTX, MODE) ((RTX)->mode = (MODE)) |
| |
| /* RTL vector. These appear inside RTX's when there is a need |
| for a variable number of things. The principle use is inside |
| PARALLEL expressions. */ |
| |
| struct GTY(()) rtvec_def { |
| int num_elem; /* number of elements */ |
| rtx GTY ((length ("%h.num_elem"))) elem[1]; |
| }; |
| |
| #define NULL_RTVEC (rtvec) 0 |
| |
| #define GET_NUM_ELEM(RTVEC) ((RTVEC)->num_elem) |
| #define PUT_NUM_ELEM(RTVEC, NUM) ((RTVEC)->num_elem = (NUM)) |
| |
| /* Predicate yielding nonzero iff X is an rtx for a register. */ |
| #define REG_P(X) (GET_CODE (X) == REG) |
| |
| /* Predicate yielding nonzero iff X is an rtx for a memory location. */ |
| #define MEM_P(X) (GET_CODE (X) == MEM) |
| |
| #if TARGET_SUPPORTS_WIDE_INT |
| |
| /* Match CONST_*s that can represent compile-time constant integers. */ |
| #define CASE_CONST_SCALAR_INT \ |
| case CONST_INT: \ |
| case CONST_WIDE_INT |
| |
| /* Match CONST_*s for which pointer equality corresponds to value |
| equality. */ |
| #define CASE_CONST_UNIQUE \ |
| case CONST_INT: \ |
| case CONST_WIDE_INT: \ |
| case CONST_DOUBLE: \ |
| case CONST_FIXED |
| |
| /* Match all CONST_* rtxes. */ |
| #define CASE_CONST_ANY \ |
| case CONST_INT: \ |
| case CONST_WIDE_INT: \ |
| case CONST_DOUBLE: \ |
| case CONST_FIXED: \ |
| case CONST_VECTOR |
| |
| #else |
| |
| /* Match CONST_*s that can represent compile-time constant integers. */ |
| #define CASE_CONST_SCALAR_INT \ |
| case CONST_INT: \ |
| case CONST_DOUBLE |
| |
| /* Match CONST_*s for which pointer equality corresponds to value |
| equality. */ |
| #define CASE_CONST_UNIQUE \ |
| case CONST_INT: \ |
| case CONST_DOUBLE: \ |
| case CONST_FIXED |
| |
| /* Match all CONST_* rtxes. */ |
| #define CASE_CONST_ANY \ |
| case CONST_INT: \ |
| case CONST_DOUBLE: \ |
| case CONST_FIXED: \ |
| case CONST_VECTOR |
| #endif |
| |
| /* Predicate yielding nonzero iff X is an rtx for a constant integer. */ |
| #define CONST_INT_P(X) (GET_CODE (X) == CONST_INT) |
| |
| /* Predicate yielding nonzero iff X is an rtx for a constant integer. */ |
| #define CONST_WIDE_INT_P(X) (GET_CODE (X) == CONST_WIDE_INT) |
| |
| /* Predicate yielding nonzero iff X is an rtx for a constant fixed-point. */ |
| #define CONST_FIXED_P(X) (GET_CODE (X) == CONST_FIXED) |
| |
| /* Predicate yielding true iff X is an rtx for a double-int |
| or floating point constant. */ |
| #define CONST_DOUBLE_P(X) (GET_CODE (X) == CONST_DOUBLE) |
| |
| /* Predicate yielding true iff X is an rtx for a double-int. */ |
| #define CONST_DOUBLE_AS_INT_P(X) \ |
| (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == VOIDmode) |
| |
| /* Predicate yielding true iff X is an rtx for a integer const. */ |
| #if TARGET_SUPPORTS_WIDE_INT |
| #define CONST_SCALAR_INT_P(X) \ |
| (CONST_INT_P (X) || CONST_WIDE_INT_P (X)) |
| #else |
| #define CONST_SCALAR_INT_P(X) \ |
| (CONST_INT_P (X) || CONST_DOUBLE_AS_INT_P (X)) |
| #endif |
| |
| /* Predicate yielding true iff X is an rtx for a double-int. */ |
| #define CONST_DOUBLE_AS_FLOAT_P(X) \ |
| (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode) |
| |
| /* Predicate yielding nonzero iff X is a label insn. */ |
| #define LABEL_P(X) (GET_CODE (X) == CODE_LABEL) |
| |
| /* Predicate yielding nonzero iff X is a jump insn. */ |
| #define JUMP_P(X) (GET_CODE (X) == JUMP_INSN) |
| |
| /* Predicate yielding nonzero iff X is a call insn. */ |
| #define CALL_P(X) (GET_CODE (X) == CALL_INSN) |
| |
| /* Predicate yielding nonzero iff X is an insn that cannot jump. */ |
| #define NONJUMP_INSN_P(X) (GET_CODE (X) == INSN) |
| |
| /* Predicate yielding nonzero iff X is a debug note/insn. */ |
| #define DEBUG_INSN_P(X) (GET_CODE (X) == DEBUG_INSN) |
| |
| /* Predicate yielding nonzero iff X is an insn that is not a debug insn. */ |
| #define NONDEBUG_INSN_P(X) (INSN_P (X) && !DEBUG_INSN_P (X)) |
| |
| /* Nonzero if DEBUG_INSN_P may possibly hold. */ |
| #define MAY_HAVE_DEBUG_INSNS (flag_var_tracking_assignments) |
| |
| /* Predicate yielding nonzero iff X is a real insn. */ |
| #define INSN_P(X) \ |
| (NONJUMP_INSN_P (X) || DEBUG_INSN_P (X) || JUMP_P (X) || CALL_P (X)) |
| |
| /* Predicate yielding nonzero iff X is a note insn. */ |
| #define NOTE_P(X) (GET_CODE (X) == NOTE) |
| |
| /* Predicate yielding nonzero iff X is a barrier insn. */ |
| #define BARRIER_P(X) (GET_CODE (X) == BARRIER) |
| |
| /* Predicate yielding nonzero iff X is a data for a jump table. */ |
| #define JUMP_TABLE_DATA_P(INSN) (GET_CODE (INSN) == JUMP_TABLE_DATA) |
| |
| /* Predicate yielding nonzero iff RTX is a subreg. */ |
| #define SUBREG_P(RTX) (GET_CODE (RTX) == SUBREG) |
| |
| /* Predicate yielding true iff RTX is a symbol ref. */ |
| #define SYMBOL_REF_P(RTX) (GET_CODE (RTX) == SYMBOL_REF) |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_insn *>::test (rtx rt) |
| { |
| return (INSN_P (rt) |
| || NOTE_P (rt) |
| || JUMP_TABLE_DATA_P (rt) |
| || BARRIER_P (rt) |
| || LABEL_P (rt)); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <const rtx_insn *>::test (const_rtx rt) |
| { |
| return (INSN_P (rt) |
| || NOTE_P (rt) |
| || JUMP_TABLE_DATA_P (rt) |
| || BARRIER_P (rt) |
| || LABEL_P (rt)); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_debug_insn *>::test (rtx rt) |
| { |
| return DEBUG_INSN_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_nonjump_insn *>::test (rtx rt) |
| { |
| return NONJUMP_INSN_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_jump_insn *>::test (rtx rt) |
| { |
| return JUMP_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_jump_insn *>::test (rtx_insn *insn) |
| { |
| return JUMP_P (insn); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_call_insn *>::test (rtx rt) |
| { |
| return CALL_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_call_insn *>::test (rtx_insn *insn) |
| { |
| return CALL_P (insn); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_jump_table_data *>::test (rtx rt) |
| { |
| return JUMP_TABLE_DATA_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_jump_table_data *>::test (rtx_insn *insn) |
| { |
| return JUMP_TABLE_DATA_P (insn); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_barrier *>::test (rtx rt) |
| { |
| return BARRIER_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_code_label *>::test (rtx rt) |
| { |
| return LABEL_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_code_label *>::test (rtx_insn *insn) |
| { |
| return LABEL_P (insn); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_note *>::test (rtx rt) |
| { |
| return NOTE_P (rt); |
| } |
| |
| template <> |
| template <> |
| inline bool |
| is_a_helper <rtx_note *>::test (rtx_insn *insn) |
| { |
| return NOTE_P (insn); |
| } |
| |
| /* Predicate yielding nonzero iff X is a return or simple_return. */ |
| #define ANY_RETURN_P(X) \ |
| (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN) |
| |
| /* 1 if X is a unary operator. */ |
| |
| #define UNARY_P(X) \ |
| (GET_RTX_CLASS (GET_CODE (X)) == RTX_UNARY) |
| |
| /* 1 if X is a binary operator. */ |
| |
| #define BINARY_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_BINARY_MASK) == RTX_BINARY_RESULT) |
| |
| /* 1 if X is an arithmetic operator. */ |
| |
| #define ARITHMETIC_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_ARITHMETIC_MASK) \ |
| == RTX_ARITHMETIC_RESULT) |
| |
| /* 1 if X is an arithmetic operator. */ |
| |
| #define COMMUTATIVE_ARITH_P(X) \ |
| (GET_RTX_CLASS (GET_CODE (X)) == RTX_COMM_ARITH) |
| |
| /* 1 if X is a commutative arithmetic operator or a comparison operator. |
| These two are sometimes selected together because it is possible to |
| swap the two operands. */ |
| |
| #define SWAPPABLE_OPERANDS_P(X) \ |
| ((1 << GET_RTX_CLASS (GET_CODE (X))) \ |
| & ((1 << RTX_COMM_ARITH) | (1 << RTX_COMM_COMPARE) \ |
| | (1 << RTX_COMPARE))) |
| |
| /* 1 if X is a non-commutative operator. */ |
| |
| #define NON_COMMUTATIVE_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \ |
| == RTX_NON_COMMUTATIVE_RESULT) |
| |
| /* 1 if X is a commutative operator on integers. */ |
| |
| #define COMMUTATIVE_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \ |
| == RTX_COMMUTATIVE_RESULT) |
| |
| /* 1 if X is a relational operator. */ |
| |
| #define COMPARISON_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMPARE_MASK) == RTX_COMPARE_RESULT) |
| |
| /* 1 if X is a constant value that is an integer. */ |
| |
| #define CONSTANT_P(X) \ |
| (GET_RTX_CLASS (GET_CODE (X)) == RTX_CONST_OBJ) |
| |
| /* 1 if X can be used to represent an object. */ |
| #define OBJECT_P(X) \ |
| ((GET_RTX_CLASS (GET_CODE (X)) & RTX_OBJ_MASK) == RTX_OBJ_RESULT) |
| |
| /* General accessor macros for accessing the fields of an rtx. */ |
| |
| #if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007) |
| /* The bit with a star outside the statement expr and an & inside is |
| so that N can be evaluated only once. */ |
| #define RTL_CHECK1(RTX, N, C1) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \ |
| const enum rtx_code _code = GET_CODE (_rtx); \ |
| if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \ |
| rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| if (GET_RTX_FORMAT (_code)[_n] != C1) \ |
| rtl_check_failed_type1 (_rtx, _n, C1, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.fld[_n]; })) |
| |
| #define RTL_CHECK2(RTX, N, C1, C2) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \ |
| const enum rtx_code _code = GET_CODE (_rtx); \ |
| if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \ |
| rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| if (GET_RTX_FORMAT (_code)[_n] != C1 \ |
| && GET_RTX_FORMAT (_code)[_n] != C2) \ |
| rtl_check_failed_type2 (_rtx, _n, C1, C2, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.fld[_n]; })) |
| |
| #define RTL_CHECKC1(RTX, N, C) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \ |
| if (GET_CODE (_rtx) != (C)) \ |
| rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.fld[_n]; })) |
| |
| #define RTL_CHECKC2(RTX, N, C1, C2) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \ |
| const enum rtx_code _code = GET_CODE (_rtx); \ |
| if (_code != (C1) && _code != (C2)) \ |
| rtl_check_failed_code2 (_rtx, (C1), (C2), __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.fld[_n]; })) |
| |
| #define RTVEC_ELT(RTVEC, I) __extension__ \ |
| (*({ __typeof (RTVEC) const _rtvec = (RTVEC); const int _i = (I); \ |
| if (_i < 0 || _i >= GET_NUM_ELEM (_rtvec)) \ |
| rtvec_check_failed_bounds (_rtvec, _i, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtvec->elem[_i]; })) |
| |
| #define XWINT(RTX, N) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \ |
| const enum rtx_code _code = GET_CODE (_rtx); \ |
| if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \ |
| rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| if (GET_RTX_FORMAT (_code)[_n] != 'w') \ |
| rtl_check_failed_type1 (_rtx, _n, 'w', __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.hwint[_n]; })) |
| |
| #define CWI_ELT(RTX, I) __extension__ \ |
| (*({ __typeof (RTX) const _cwi = (RTX); \ |
| int _max = CWI_GET_NUM_ELEM (_cwi); \ |
| const int _i = (I); \ |
| if (_i < 0 || _i >= _max) \ |
| cwi_check_failed_bounds (_cwi, _i, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_cwi->u.hwiv.elem[_i]; })) |
| |
| #define XCWINT(RTX, N, C) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != (C)) \ |
| rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.hwint[N]; })) |
| |
| #define XCMWINT(RTX, N, C, M) __extension__ \ |
| (*({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) != (M)) \ |
| rtl_check_failed_code_mode (_rtx, (C), (M), false, __FILE__, \ |
| __LINE__, __FUNCTION__); \ |
| &_rtx->u.hwint[N]; })) |
| |
| #define XCNMPRV(RTX, C, M) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \ |
| rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \ |
| __LINE__, __FUNCTION__); \ |
| &_rtx->u.rv; }) |
| |
| #define XCNMPFV(RTX, C, M) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \ |
| rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \ |
| __LINE__, __FUNCTION__); \ |
| &_rtx->u.fv; }) |
| |
| #define REG_CHECK(RTX) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != REG) \ |
| rtl_check_failed_code1 (_rtx, REG, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_rtx->u.reg; }) |
| |
| #define BLOCK_SYMBOL_CHECK(RTX) __extension__ \ |
| ({ __typeof (RTX) const _symbol = (RTX); \ |
| const unsigned int flags = SYMBOL_REF_FLAGS (_symbol); \ |
| if ((flags & SYMBOL_FLAG_HAS_BLOCK_INFO) == 0) \ |
| rtl_check_failed_block_symbol (__FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| &_symbol->u.block_sym; }) |
| |
| #define HWIVEC_CHECK(RTX,C) __extension__ \ |
| ({ __typeof (RTX) const _symbol = (RTX); \ |
| RTL_CHECKC1 (_symbol, 0, C); \ |
| &_symbol->u.hwiv; }) |
| |
| extern void rtl_check_failed_bounds (const_rtx, int, const char *, int, |
| const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_type1 (const_rtx, int, int, const char *, int, |
| const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_type2 (const_rtx, int, int, int, const char *, |
| int, const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_code1 (const_rtx, enum rtx_code, const char *, |
| int, const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_code2 (const_rtx, enum rtx_code, enum rtx_code, |
| const char *, int, const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_code_mode (const_rtx, enum rtx_code, machine_mode, |
| bool, const char *, int, const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtl_check_failed_block_symbol (const char *, int, const char *) |
| ATTRIBUTE_NORETURN; |
| extern void cwi_check_failed_bounds (const_rtx, int, const char *, int, |
| const char *) |
| ATTRIBUTE_NORETURN; |
| extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int, |
| const char *) |
| ATTRIBUTE_NORETURN; |
| |
| #else /* not ENABLE_RTL_CHECKING */ |
| |
| #define RTL_CHECK1(RTX, N, C1) ((RTX)->u.fld[N]) |
| #define RTL_CHECK2(RTX, N, C1, C2) ((RTX)->u.fld[N]) |
| #define RTL_CHECKC1(RTX, N, C) ((RTX)->u.fld[N]) |
| #define RTL_CHECKC2(RTX, N, C1, C2) ((RTX)->u.fld[N]) |
| #define RTVEC_ELT(RTVEC, I) ((RTVEC)->elem[I]) |
| #define XWINT(RTX, N) ((RTX)->u.hwint[N]) |
| #define CWI_ELT(RTX, I) ((RTX)->u.hwiv.elem[I]) |
| #define XCWINT(RTX, N, C) ((RTX)->u.hwint[N]) |
| #define XCMWINT(RTX, N, C, M) ((RTX)->u.hwint[N]) |
| #define XCNMWINT(RTX, N, C, M) ((RTX)->u.hwint[N]) |
| #define XCNMPRV(RTX, C, M) (&(RTX)->u.rv) |
| #define XCNMPFV(RTX, C, M) (&(RTX)->u.fv) |
| #define REG_CHECK(RTX) (&(RTX)->u.reg) |
| #define BLOCK_SYMBOL_CHECK(RTX) (&(RTX)->u.block_sym) |
| #define HWIVEC_CHECK(RTX,C) (&(RTX)->u.hwiv) |
| |
| #endif |
| |
| /* General accessor macros for accessing the flags of an rtx. */ |
| |
| /* Access an individual rtx flag, with no checking of any kind. */ |
| #define RTX_FLAG(RTX, FLAG) ((RTX)->FLAG) |
| |
| #if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION >= 2007) |
| #define RTL_FLAG_CHECK1(NAME, RTX, C1) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2) \ |
| rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \ |
| && GET_CODE (_rtx) != C3) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \ |
| && GET_CODE (_rtx) != C3 && GET_CODE(_rtx) != C4) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \ |
| && GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \ |
| && GET_CODE (_rtx) != C5) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) \ |
| __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \ |
| && GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \ |
| && GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6) \ |
| rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) \ |
| __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \ |
| && GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \ |
| && GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6 \ |
| && GET_CODE (_rtx) != C7) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| #define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) \ |
| __extension__ \ |
| ({ __typeof (RTX) const _rtx = (RTX); \ |
| if (!INSN_CHAIN_CODE_P (GET_CODE (_rtx))) \ |
| rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _rtx; }) |
| |
| extern void rtl_check_failed_flag (const char *, const_rtx, const char *, |
| int, const char *) |
| ATTRIBUTE_NORETURN |
| ; |
| |
| #else /* not ENABLE_RTL_FLAG_CHECKING */ |
| |
| #define RTL_FLAG_CHECK1(NAME, RTX, C1) (RTX) |
| #define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) (RTX) |
| #define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) (RTX) |
| #define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) (RTX) |
| #define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) (RTX) |
| #define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) (RTX) |
| #define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) (RTX) |
| #define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) (RTX) |
| #endif |
| |
| #define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int) |
| #define XUINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_uint) |
| #define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str) |
| #define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx) |
| #define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec) |
| #define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type) |
| #define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree) |
| #define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb) |
| #define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str) |
| #define XCFI(RTX, N) (RTL_CHECK1 (RTX, N, 'C').rt_cfi) |
| |
| #define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M) |
| #define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N)) |
| |
| /* These are like XINT, etc. except that they expect a '0' field instead |
| of the normal type code. */ |
| |
| #define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int) |
| #define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint) |
| #define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str) |
| #define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx) |
| #define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec) |
| #define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type) |
| #define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree) |
| #define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb) |
| #define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags) |
| #define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib) |
| #define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem) |
| #define X0CONSTANT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_constant) |
| |
| /* Access a '0' field with any type. */ |
| #define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0') |
| |
| #define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int) |
| #define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint) |
| #define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str) |
| #define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx) |
| #define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec) |
| #define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type) |
| #define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree) |
| #define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb) |
| #define XCCFI(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cfi) |
| #define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib) |
| |
| #define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M) |
| #define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C)) |
| |
| #define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx) |
| |
| |
| /* Methods of rtx_expr_list. */ |
| |
| inline rtx_expr_list *rtx_expr_list::next () const |
| { |
| rtx tmp = XEXP (this, 1); |
| return safe_as_a <rtx_expr_list *> (tmp); |
| } |
| |
| inline rtx rtx_expr_list::element () const |
| { |
| return XEXP (this, 0); |
| } |
| |
| /* Methods of rtx_insn_list. */ |
| |
| inline rtx_insn_list *rtx_insn_list::next () const |
| { |
| rtx tmp = XEXP (this, 1); |
| return safe_as_a <rtx_insn_list *> (tmp); |
| } |
| |
| inline rtx_insn *rtx_insn_list::insn () const |
| { |
| rtx tmp = XEXP (this, 0); |
| return safe_as_a <rtx_insn *> (tmp); |
| } |
| |
| /* Methods of rtx_sequence. */ |
| |
| inline int rtx_sequence::len () const |
| { |
| return XVECLEN (this, 0); |
| } |
| |
| inline rtx rtx_sequence::element (int index) const |
| { |
| return XVECEXP (this, 0, index); |
| } |
| |
| inline rtx_insn *rtx_sequence::insn (int index) const |
| { |
| return as_a <rtx_insn *> (XVECEXP (this, 0, index)); |
| } |
| |
| /* ACCESS MACROS for particular fields of insns. */ |
| |
| /* Holds a unique number for each insn. |
| These are not necessarily sequentially increasing. */ |
| inline int INSN_UID (const_rtx insn) |
| { |
| return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", |
| (insn))->u2.insn_uid; |
| } |
| inline int& INSN_UID (rtx insn) |
| { |
| return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", |
| (insn))->u2.insn_uid; |
| } |
| |
| /* Chain insns together in sequence. */ |
| |
| /* For now these are split in two: an rvalue form: |
| PREV_INSN/NEXT_INSN |
| and an lvalue form: |
| SET_NEXT_INSN/SET_PREV_INSN. */ |
| |
| inline rtx_insn *PREV_INSN (const rtx_insn *insn) |
| { |
| rtx prev = XEXP (insn, 0); |
| return safe_as_a <rtx_insn *> (prev); |
| } |
| |
| inline rtx& SET_PREV_INSN (rtx_insn *insn) |
| { |
| return XEXP (insn, 0); |
| } |
| |
| inline rtx_insn *NEXT_INSN (const rtx_insn *insn) |
| { |
| rtx next = XEXP (insn, 1); |
| return safe_as_a <rtx_insn *> (next); |
| } |
| |
| inline rtx& SET_NEXT_INSN (rtx_insn *insn) |
| { |
| return XEXP (insn, 1); |
| } |
| |
| inline basic_block BLOCK_FOR_INSN (const_rtx insn) |
| { |
| return XBBDEF (insn, 2); |
| } |
| |
| inline basic_block& BLOCK_FOR_INSN (rtx insn) |
| { |
| return XBBDEF (insn, 2); |
| } |
| |
| inline void set_block_for_insn (rtx_insn *insn, basic_block bb) |
| { |
| BLOCK_FOR_INSN (insn) = bb; |
| } |
| |
| /* The body of an insn. */ |
| inline rtx PATTERN (const_rtx insn) |
| { |
| return XEXP (insn, 3); |
| } |
| |
| inline rtx& PATTERN (rtx insn) |
| { |
| return XEXP (insn, 3); |
| } |
| |
| inline unsigned int INSN_LOCATION (const rtx_insn *insn) |
| { |
| return XUINT (insn, 4); |
| } |
| |
| inline unsigned int& INSN_LOCATION (rtx_insn *insn) |
| { |
| return XUINT (insn, 4); |
| } |
| |
| inline bool INSN_HAS_LOCATION (const rtx_insn *insn) |
| { |
| return LOCATION_LOCUS (INSN_LOCATION (insn)) != UNKNOWN_LOCATION; |
| } |
| |
| /* LOCATION of an RTX if relevant. */ |
| #define RTL_LOCATION(X) (INSN_P (X) ? \ |
| INSN_LOCATION (as_a <rtx_insn *> (X)) \ |
| : UNKNOWN_LOCATION) |
| |
| /* Code number of instruction, from when it was recognized. |
| -1 means this instruction has not been recognized yet. */ |
| #define INSN_CODE(INSN) XINT (INSN, 5) |
| |
| inline rtvec rtx_jump_table_data::get_labels () const |
| { |
| rtx pat = PATTERN (this); |
| if (GET_CODE (pat) == ADDR_VEC) |
| return XVEC (pat, 0); |
| else |
| return XVEC (pat, 1); /* presumably an ADDR_DIFF_VEC */ |
| } |
| |
| #define RTX_FRAME_RELATED_P(RTX) \ |
| (RTL_FLAG_CHECK6 ("RTX_FRAME_RELATED_P", (RTX), DEBUG_INSN, INSN, \ |
| CALL_INSN, JUMP_INSN, BARRIER, SET)->frame_related) |
| |
| /* 1 if JUMP RTX is a crossing jump. */ |
| #define CROSSING_JUMP_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("CROSSING_JUMP_P", (RTX), JUMP_INSN)->jump) |
| |
| /* 1 if RTX is a call to a const function. Built from ECF_CONST and |
| TREE_READONLY. */ |
| #define RTL_CONST_CALL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("RTL_CONST_CALL_P", (RTX), CALL_INSN)->unchanging) |
| |
| /* 1 if RTX is a call to a pure function. Built from ECF_PURE and |
| DECL_PURE_P. */ |
| #define RTL_PURE_CALL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("RTL_PURE_CALL_P", (RTX), CALL_INSN)->return_val) |
| |
| /* 1 if RTX is a call to a const or pure function. */ |
| #define RTL_CONST_OR_PURE_CALL_P(RTX) \ |
| (RTL_CONST_CALL_P (RTX) || RTL_PURE_CALL_P (RTX)) |
| |
| /* 1 if RTX is a call to a looping const or pure function. Built from |
| ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. */ |
| #define RTL_LOOPING_CONST_OR_PURE_CALL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("CONST_OR_PURE_CALL_P", (RTX), CALL_INSN)->call) |
| |
| /* 1 if RTX is a call_insn for a sibling call. */ |
| #define SIBLING_CALL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("SIBLING_CALL_P", (RTX), CALL_INSN)->jump) |
| |
| /* 1 if RTX is a jump_insn, call_insn, or insn that is an annulling branch. */ |
| #define INSN_ANNULLED_BRANCH_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("INSN_ANNULLED_BRANCH_P", (RTX), JUMP_INSN)->unchanging) |
| |
| /* 1 if RTX is an insn in a delay slot and is from the target of the branch. |
| If the branch insn has INSN_ANNULLED_BRANCH_P set, this insn should only be |
| executed if the branch is taken. For annulled branches with this bit |
| clear, the insn should be executed only if the branch is not taken. */ |
| #define INSN_FROM_TARGET_P(RTX) \ |
| (RTL_FLAG_CHECK3 ("INSN_FROM_TARGET_P", (RTX), INSN, JUMP_INSN, \ |
| CALL_INSN)->in_struct) |
| |
| /* In an ADDR_DIFF_VEC, the flags for RTX for use by branch shortening. |
| See the comments for ADDR_DIFF_VEC in rtl.def. */ |
| #define ADDR_DIFF_VEC_FLAGS(RTX) X0ADVFLAGS (RTX, 4) |
| |
| /* In a VALUE, the value cselib has assigned to RTX. |
| This is a "struct cselib_val", see cselib.h. */ |
| #define CSELIB_VAL_PTR(RTX) X0CSELIB (RTX, 0) |
| |
| /* Holds a list of notes on what this insn does to various REGs. |
| It is a chain of EXPR_LIST rtx's, where the second operand is the |
| chain pointer and the first operand is the REG being described. |
| The mode field of the EXPR_LIST contains not a real machine mode |
| but a value from enum reg_note. */ |
| #define REG_NOTES(INSN) XEXP(INSN, 6) |
| |
| /* In an ENTRY_VALUE this is the DECL_INCOMING_RTL of the argument in |
| question. */ |
| #define ENTRY_VALUE_EXP(RTX) (RTL_CHECKC1 (RTX, 0, ENTRY_VALUE).rt_rtx) |
| |
| enum reg_note |
| { |
| #define DEF_REG_NOTE(NAME) NAME, |
| #include "reg-notes.def" |
| #undef DEF_REG_NOTE |
| REG_NOTE_MAX |
| }; |
| |
| /* Define macros to extract and insert the reg-note kind in an EXPR_LIST. */ |
| #define REG_NOTE_KIND(LINK) ((enum reg_note) GET_MODE (LINK)) |
| #define PUT_REG_NOTE_KIND(LINK, KIND) \ |
| PUT_MODE_RAW (LINK, (machine_mode) (KIND)) |
| |
| /* Names for REG_NOTE's in EXPR_LIST insn's. */ |
| |
| extern const char * const reg_note_name[]; |
| #define GET_REG_NOTE_NAME(MODE) (reg_note_name[(int) (MODE)]) |
| |
| /* This field is only present on CALL_INSNs. It holds a chain of EXPR_LIST of |
| USE and CLOBBER expressions. |
| USE expressions list the registers filled with arguments that |
| are passed to the function. |
| CLOBBER expressions document the registers explicitly clobbered |
| by this CALL_INSN. |
| Pseudo registers can not be mentioned in this list. */ |
| #define CALL_INSN_FUNCTION_USAGE(INSN) XEXP(INSN, 7) |
| |
| /* The label-number of a code-label. The assembler label |
| is made from `L' and the label-number printed in decimal. |
| Label numbers are unique in a compilation. */ |
| #define CODE_LABEL_NUMBER(INSN) XINT (INSN, 5) |
| |
| /* In a NOTE that is a line number, this is a string for the file name that the |
| line is in. We use the same field to record block numbers temporarily in |
| NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes. (We avoid lots of casts |
| between ints and pointers if we use a different macro for the block number.) |
| */ |
| |
| /* Opaque data. */ |
| #define NOTE_DATA(INSN) RTL_CHECKC1 (INSN, 3, NOTE) |
| #define NOTE_DELETED_LABEL_NAME(INSN) XCSTR (INSN, 3, NOTE) |
| #define SET_INSN_DELETED(INSN) set_insn_deleted (INSN); |
| #define NOTE_BLOCK(INSN) XCTREE (INSN, 3, NOTE) |
| #define NOTE_EH_HANDLER(INSN) XCINT (INSN, 3, NOTE) |
| #define NOTE_BASIC_BLOCK(INSN) XCBBDEF (INSN, 3, NOTE) |
| #define NOTE_VAR_LOCATION(INSN) XCEXP (INSN, 3, NOTE) |
| #define NOTE_CFI(INSN) XCCFI (INSN, 3, NOTE) |
| #define NOTE_LABEL_NUMBER(INSN) XCINT (INSN, 3, NOTE) |
| |
| /* In a NOTE that is a line number, this is the line number. |
| Other kinds of NOTEs are identified by negative numbers here. */ |
| #define NOTE_KIND(INSN) XCINT (INSN, 4, NOTE) |
| |
| /* Nonzero if INSN is a note marking the beginning of a basic block. */ |
| #define NOTE_INSN_BASIC_BLOCK_P(INSN) \ |
| (NOTE_P (INSN) && NOTE_KIND (INSN) == NOTE_INSN_BASIC_BLOCK) |
| |
| /* Variable declaration and the location of a variable. */ |
| #define PAT_VAR_LOCATION_DECL(PAT) (XCTREE ((PAT), 0, VAR_LOCATION)) |
| #define PAT_VAR_LOCATION_LOC(PAT) (XCEXP ((PAT), 1, VAR_LOCATION)) |
| |
| /* Initialization status of the variable in the location. Status |
| can be unknown, uninitialized or initialized. See enumeration |
| type below. */ |
| #define PAT_VAR_LOCATION_STATUS(PAT) \ |
| (RTL_FLAG_CHECK1 ("PAT_VAR_LOCATION_STATUS", PAT, VAR_LOCATION) \ |
| ->u2.var_location_status) |
| |
| /* Accessors for a NOTE_INSN_VAR_LOCATION. */ |
| #define NOTE_VAR_LOCATION_DECL(NOTE) \ |
| PAT_VAR_LOCATION_DECL (NOTE_VAR_LOCATION (NOTE)) |
| #define NOTE_VAR_LOCATION_LOC(NOTE) \ |
| PAT_VAR_LOCATION_LOC (NOTE_VAR_LOCATION (NOTE)) |
| #define NOTE_VAR_LOCATION_STATUS(NOTE) \ |
| PAT_VAR_LOCATION_STATUS (NOTE_VAR_LOCATION (NOTE)) |
| |
| /* The VAR_LOCATION rtx in a DEBUG_INSN. */ |
| #define INSN_VAR_LOCATION(INSN) PATTERN (INSN) |
| |
| /* Accessors for a tree-expanded var location debug insn. */ |
| #define INSN_VAR_LOCATION_DECL(INSN) \ |
| PAT_VAR_LOCATION_DECL (INSN_VAR_LOCATION (INSN)) |
| #define INSN_VAR_LOCATION_LOC(INSN) \ |
| PAT_VAR_LOCATION_LOC (INSN_VAR_LOCATION (INSN)) |
| #define INSN_VAR_LOCATION_STATUS(INSN) \ |
| PAT_VAR_LOCATION_STATUS (INSN_VAR_LOCATION (INSN)) |
| |
| /* Expand to the RTL that denotes an unknown variable location in a |
| DEBUG_INSN. */ |
| #define gen_rtx_UNKNOWN_VAR_LOC() (gen_rtx_CLOBBER (VOIDmode, const0_rtx)) |
| |
| /* Determine whether X is such an unknown location. */ |
| #define VAR_LOC_UNKNOWN_P(X) \ |
| (GET_CODE (X) == CLOBBER && XEXP ((X), 0) == const0_rtx) |
| |
| /* 1 if RTX is emitted after a call, but it should take effect before |
| the call returns. */ |
| #define NOTE_DURING_CALL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("NOTE_VAR_LOCATION_DURING_CALL_P", (RTX), NOTE)->call) |
| |
| /* DEBUG_EXPR_DECL corresponding to a DEBUG_EXPR RTX. */ |
| #define DEBUG_EXPR_TREE_DECL(RTX) XCTREE (RTX, 0, DEBUG_EXPR) |
| |
| /* VAR_DECL/PARM_DECL DEBUG_IMPLICIT_PTR takes address of. */ |
| #define DEBUG_IMPLICIT_PTR_DECL(RTX) XCTREE (RTX, 0, DEBUG_IMPLICIT_PTR) |
| |
| /* PARM_DECL DEBUG_PARAMETER_REF references. */ |
| #define DEBUG_PARAMETER_REF_DECL(RTX) XCTREE (RTX, 0, DEBUG_PARAMETER_REF) |
| |
| /* Codes that appear in the NOTE_KIND field for kinds of notes |
| that are not line numbers. These codes are all negative. |
| |
| Notice that we do not try to use zero here for any of |
| the special note codes because sometimes the source line |
| actually can be zero! This happens (for example) when we |
| are generating code for the per-translation-unit constructor |
| and destructor routines for some C++ translation unit. */ |
| |
| enum insn_note |
| { |
| #define DEF_INSN_NOTE(NAME) NAME, |
| #include "insn-notes.def" |
| #undef DEF_INSN_NOTE |
| |
| NOTE_INSN_MAX |
| }; |
| |
| /* Names for NOTE insn's other than line numbers. */ |
| |
| extern const char * const note_insn_name[NOTE_INSN_MAX]; |
| #define GET_NOTE_INSN_NAME(NOTE_CODE) \ |
| (note_insn_name[(NOTE_CODE)]) |
| |
| /* The name of a label, in case it corresponds to an explicit label |
| in the input source code. */ |
| #define LABEL_NAME(RTX) XCSTR (RTX, 6, CODE_LABEL) |
| |
| /* In jump.c, each label contains a count of the number |
| of LABEL_REFs that point at it, so unused labels can be deleted. */ |
| #define LABEL_NUSES(RTX) XCINT (RTX, 4, CODE_LABEL) |
| |
| /* Labels carry a two-bit field composed of the ->jump and ->call |
| bits. This field indicates whether the label is an alternate |
| entry point, and if so, what kind. */ |
| enum label_kind |
| { |
| LABEL_NORMAL = 0, /* ordinary label */ |
| LABEL_STATIC_ENTRY, /* alternate entry point, not exported */ |
| LABEL_GLOBAL_ENTRY, /* alternate entry point, exported */ |
| LABEL_WEAK_ENTRY /* alternate entry point, exported as weak symbol */ |
| }; |
| |
| #if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION > 2007) |
| |
| /* Retrieve the kind of LABEL. */ |
| #define LABEL_KIND(LABEL) __extension__ \ |
| ({ __typeof (LABEL) const _label = (LABEL); \ |
| if (! LABEL_P (_label)) \ |
| rtl_check_failed_flag ("LABEL_KIND", _label, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| (enum label_kind) ((_label->jump << 1) | _label->call); }) |
| |
| /* Set the kind of LABEL. */ |
| #define SET_LABEL_KIND(LABEL, KIND) do { \ |
| __typeof (LABEL) const _label = (LABEL); \ |
| const unsigned int _kind = (KIND); \ |
| if (! LABEL_P (_label)) \ |
| rtl_check_failed_flag ("SET_LABEL_KIND", _label, __FILE__, __LINE__, \ |
| __FUNCTION__); \ |
| _label->jump = ((_kind >> 1) & 1); \ |
| _label->call = (_kind & 1); \ |
| } while (0) |
| |
| #else |
| |
| /* Retrieve the kind of LABEL. */ |
| #define LABEL_KIND(LABEL) \ |
| ((enum label_kind) (((LABEL)->jump << 1) | (LABEL)->call)) |
| |
| /* Set the kind of LABEL. */ |
| #define SET_LABEL_KIND(LABEL, KIND) do { \ |
| rtx const _label = (LABEL); \ |
| const unsigned int _kind = (KIND); \ |
| _label->jump = ((_kind >> 1) & 1); \ |
| _label->call = (_kind & 1); \ |
| } while (0) |
| |
| #endif /* rtl flag checking */ |
| |
| #define LABEL_ALT_ENTRY_P(LABEL) (LABEL_KIND (LABEL) != LABEL_NORMAL) |
| |
| /* In jump.c, each JUMP_INSN can point to a label that it can jump to, |
| so that if the JUMP_INSN is deleted, the label's LABEL_NUSES can |
| be decremented and possibly the label can be deleted. */ |
| #define JUMP_LABEL(INSN) XCEXP (INSN, 7, JUMP_INSN) |
| |
| inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn) |
| { |
| return safe_as_a <rtx_insn *> (JUMP_LABEL (insn)); |
| } |
| |
| /* Methods of rtx_jump_insn. */ |
| |
| inline rtx rtx_jump_insn::jump_label () const |
| { |
| return JUMP_LABEL (this); |
| } |
| |
| inline rtx_code_label *rtx_jump_insn::jump_target () const |
| { |
| return safe_as_a <rtx_code_label *> (JUMP_LABEL (this)); |
| } |
| |
| inline void rtx_jump_insn::set_jump_target (rtx_code_label *target) |
| { |
| JUMP_LABEL (this) = target; |
| } |
| |
| /* Once basic blocks are found, each CODE_LABEL starts a chain that |
| goes through all the LABEL_REFs that jump to that label. The chain |
| eventually winds up at the CODE_LABEL: it is circular. */ |
| #define LABEL_REFS(LABEL) XCEXP (LABEL, 3, CODE_LABEL) |
| |
| /* Get the label that a LABEL_REF references. */ |
| static inline rtx_insn * |
| label_ref_label (const_rtx ref) |
| { |
| return as_a<rtx_insn *> (XCEXP (ref, 0, LABEL_REF)); |
| } |
| |
| /* Set the label that LABEL_REF ref refers to. */ |
| |
| static inline void |
| set_label_ref_label (rtx ref, rtx_insn *label) |
| { |
| XCEXP (ref, 0, LABEL_REF) = label; |
| } |
| |
| /* For a REG rtx, REGNO extracts the register number. REGNO can only |
| be used on RHS. Use SET_REGNO to change the value. */ |
| #define REGNO(RTX) (rhs_regno(RTX)) |
| #define SET_REGNO(RTX, N) (df_ref_change_reg_with_loc (RTX, N)) |
| |
| /* Return the number of consecutive registers in a REG. This is always |
| 1 for pseudo registers and is determined by HARD_REGNO_NREGS for |
| hard registers. */ |
| #define REG_NREGS(RTX) (REG_CHECK (RTX)->nregs) |
| |
| /* ORIGINAL_REGNO holds the number the register originally had; for a |
| pseudo register turned into a hard reg this will hold the old pseudo |
| register number. */ |
| #define ORIGINAL_REGNO(RTX) \ |
| (RTL_FLAG_CHECK1 ("ORIGINAL_REGNO", (RTX), REG)->u2.original_regno) |
| |
| /* Force the REGNO macro to only be used on the lhs. */ |
| static inline unsigned int |
| rhs_regno (const_rtx x) |
| { |
| return REG_CHECK (x)->regno; |
| } |
| |
| /* Return the final register in REG X plus one. */ |
| static inline unsigned int |
| END_REGNO (const_rtx x) |
| { |
| return REGNO (x) + REG_NREGS (x); |
| } |
| |
| /* Change the REGNO and REG_NREGS of REG X to the specified values, |
| bypassing the df machinery. */ |
| static inline void |
| set_regno_raw (rtx x, unsigned int regno, unsigned int nregs) |
| { |
| reg_info *reg = REG_CHECK (x); |
| reg->regno = regno; |
| reg->nregs = nregs; |
| } |
| |
| /* 1 if RTX is a reg or parallel that is the current function's return |
| value. */ |
| #define REG_FUNCTION_VALUE_P(RTX) \ |
| (RTL_FLAG_CHECK2 ("REG_FUNCTION_VALUE_P", (RTX), REG, PARALLEL)->return_val) |
| |
| /* 1 if RTX is a reg that corresponds to a variable declared by the user. */ |
| #define REG_USERVAR_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("REG_USERVAR_P", (RTX), REG)->volatil) |
| |
| /* 1 if RTX is a reg that holds a pointer value. */ |
| #define REG_POINTER(RTX) \ |
| (RTL_FLAG_CHECK1 ("REG_POINTER", (RTX), REG)->frame_related) |
| |
| /* 1 if RTX is a mem that holds a pointer value. */ |
| #define MEM_POINTER(RTX) \ |
| (RTL_FLAG_CHECK1 ("MEM_POINTER", (RTX), MEM)->frame_related) |
| |
| /* 1 if the given register REG corresponds to a hard register. */ |
| #define HARD_REGISTER_P(REG) (HARD_REGISTER_NUM_P (REGNO (REG))) |
| |
| /* 1 if the given register number REG_NO corresponds to a hard register. */ |
| #define HARD_REGISTER_NUM_P(REG_NO) ((REG_NO) < FIRST_PSEUDO_REGISTER) |
| |
| /* For a CONST_INT rtx, INTVAL extracts the integer. */ |
| #define INTVAL(RTX) XCWINT (RTX, 0, CONST_INT) |
| #define UINTVAL(RTX) ((unsigned HOST_WIDE_INT) INTVAL (RTX)) |
| |
| /* For a CONST_WIDE_INT, CONST_WIDE_INT_NUNITS is the number of |
| elements actually needed to represent the constant. |
| CONST_WIDE_INT_ELT gets one of the elements. 0 is the least |
| significant HOST_WIDE_INT. */ |
| #define CONST_WIDE_INT_VEC(RTX) HWIVEC_CHECK (RTX, CONST_WIDE_INT) |
| #define CONST_WIDE_INT_NUNITS(RTX) CWI_GET_NUM_ELEM (RTX) |
| #define CONST_WIDE_INT_ELT(RTX, N) CWI_ELT (RTX, N) |
| |
| /* For a CONST_DOUBLE: |
| #if TARGET_SUPPORTS_WIDE_INT == 0 |
| For a VOIDmode, there are two integers CONST_DOUBLE_LOW is the |
| low-order word and ..._HIGH the high-order. |
| #endif |
| For a float, there is a REAL_VALUE_TYPE structure, and |
| CONST_DOUBLE_REAL_VALUE(r) is a pointer to it. */ |
| #define CONST_DOUBLE_LOW(r) XCMWINT (r, 0, CONST_DOUBLE, VOIDmode) |
| #define CONST_DOUBLE_HIGH(r) XCMWINT (r, 1, CONST_DOUBLE, VOIDmode) |
| #define CONST_DOUBLE_REAL_VALUE(r) \ |
| ((const struct real_value *) XCNMPRV (r, CONST_DOUBLE, VOIDmode)) |
| |
| #define CONST_FIXED_VALUE(r) \ |
| ((const struct fixed_value *) XCNMPFV (r, CONST_FIXED, VOIDmode)) |
| #define CONST_FIXED_VALUE_HIGH(r) \ |
| ((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.high)) |
| #define CONST_FIXED_VALUE_LOW(r) \ |
| ((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.low)) |
| |
| /* For a CONST_VECTOR, return element #n. */ |
| #define CONST_VECTOR_ELT(RTX, N) XCVECEXP (RTX, 0, N, CONST_VECTOR) |
| |
| /* For a CONST_VECTOR, return the number of elements in a vector. */ |
| #define CONST_VECTOR_NUNITS(RTX) XCVECLEN (RTX, 0, CONST_VECTOR) |
| |
| /* For a SUBREG rtx, SUBREG_REG extracts the value we want a subreg of. |
| SUBREG_BYTE extracts the byte-number. */ |
| |
| #define SUBREG_REG(RTX) XCEXP (RTX, 0, SUBREG) |
| #define SUBREG_BYTE(RTX) XCUINT (RTX, 1, SUBREG) |
| |
| /* in rtlanal.c */ |
| /* Return the right cost to give to an operation |
| to make the cost of the corresponding register-to-register instruction |
| N times that of a fast register-to-register instruction. */ |
| #define COSTS_N_INSNS(N) ((N) * 4) |
| |
| /* Maximum cost of an rtl expression. This value has the special meaning |
| not to use an rtx with this cost under any circumstances. */ |
| #define MAX_COST INT_MAX |
| |
| /* Return true if CODE always has VOIDmode. */ |
| |
| static inline bool |
| always_void_p (enum rtx_code code) |
| { |
| return code == SET; |
| } |
| |
| /* A structure to hold all available cost information about an rtl |
| expression. */ |
| struct full_rtx_costs |
| { |
| int speed; |
| int size; |
| }; |
| |
| /* Initialize a full_rtx_costs structure C to the maximum cost. */ |
| static inline void |
| init_costs_to_max (struct full_rtx_costs *c) |
| { |
| c->speed = MAX_COST; |
| c->size = MAX_COST; |
| } |
| |
| /* Initialize a full_rtx_costs structure C to zero cost. */ |
| static inline void |
| init_costs_to_zero (struct full_rtx_costs *c) |
| { |
| c->speed = 0; |
| c->size = 0; |
| } |
| |
| /* Compare two full_rtx_costs structures A and B, returning true |
| if A < B when optimizing for speed. */ |
| static inline bool |
| costs_lt_p (struct full_rtx_costs *a, struct full_rtx_costs *b, |
| bool speed) |
| { |
| if (speed) |
| return (a->speed < b->speed |
| || (a->speed == b->speed && a->size < b->size)); |
| else |
| return (a->size < b->size |
| || (a->size == b->size && a->speed < b->speed)); |
| } |
| |
| /* Increase both members of the full_rtx_costs structure C by the |
| cost of N insns. */ |
| static inline void |
| costs_add_n_insns (struct full_rtx_costs *c, int n) |
| { |
| c->speed += COSTS_N_INSNS (n); |
| c->size += COSTS_N_INSNS (n); |
| } |
| |
| /* Describes the shape of a subreg: |
| |
| inner_mode == the mode of the SUBREG_REG |
| offset == the SUBREG_BYTE |
| outer_mode == the mode of the SUBREG itself. */ |
| struct subreg_shape { |
| subreg_shape (machine_mode, unsigned int, machine_mode); |
| bool operator == (const subreg_shape &) const; |
| bool operator != (const subreg_shape &) const; |
| unsigned int unique_id () const; |
| |
| machine_mode inner_mode; |
| unsigned int offset; |
| machine_mode outer_mode; |
| }; |
| |
| inline |
| subreg_shape::subreg_shape (machine_mode inner_mode_in, |
| unsigned int offset_in, |
| machine_mode outer_mode_in) |
| : inner_mode (inner_mode_in), offset (offset_in), outer_mode (outer_mode_in) |
| {} |
| |
| inline bool |
| subreg_shape::operator == (const subreg_shape &other) const |
| { |
| return (inner_mode == other.inner_mode |
| && offset == other.offset |
| && outer_mode == other.outer_mode); |
| } |
| |
| inline bool |
| subreg_shape::operator != (const subreg_shape &other) const |
| { |
| return !operator == (other); |
| } |
| |
| /* Return an integer that uniquely identifies this shape. Structures |
| like rtx_def assume that a mode can fit in an 8-bit bitfield and no |
| current mode is anywhere near being 65536 bytes in size, so the |
| id comfortably fits in an int. */ |
| |
| inline unsigned int |
| subreg_shape::unique_id () const |
| { |
| STATIC_ASSERT (MAX_MACHINE_MODE <= 256); |
| return (int) inner_mode + ((int) outer_mode << 8) + (offset << 16); |
| } |
| |
| /* Return the shape of a SUBREG rtx. */ |
| |
| static inline subreg_shape |
| shape_of_subreg (const_rtx x) |
| { |
| return subreg_shape (GET_MODE (SUBREG_REG (x)), |
| SUBREG_BYTE (x), GET_MODE (x)); |
| } |
| |
| /* Information about an address. This structure is supposed to be able |
| to represent all supported target addresses. Please extend it if it |
| is not yet general enough. */ |
| struct address_info { |
| /* The mode of the value being addressed, or VOIDmode if this is |
| a load-address operation with no known address mode. */ |
| machine_mode mode; |
| |
| /* The address space. */ |
| addr_space_t as; |
| |
| /* True if this is an RTX_AUTOINC address. */ |
| bool autoinc_p; |
| |
| /* A pointer to the top-level address. */ |
| rtx *outer; |
| |
| /* A pointer to the inner address, after all address mutations |
| have been stripped from the top-level address. It can be one |
| of the following: |
| |
| - A {PRE,POST}_{INC,DEC} of *BASE. SEGMENT, INDEX and DISP are null. |
| |
| - A {PRE,POST}_MODIFY of *BASE. In this case either INDEX or DISP |
| points to the step value, depending on whether the step is variable |
| or constant respectively. SEGMENT is null. |
| |
| - A plain sum of the form SEGMENT + BASE + INDEX + DISP, |
| with null fields evaluating to 0. */ |
| rtx *inner; |
| |
| /* Components that make up *INNER. Each one may be null or nonnull. |
| When nonnull, their meanings are as follows: |
| |
| - *SEGMENT is the "segment" of memory to which the address refers. |
| This value is entirely target-specific and is only called a "segment" |
| because that's its most typical use. It contains exactly one UNSPEC, |
| pointed to by SEGMENT_TERM. The contents of *SEGMENT do not need |
| reloading. |
| |
| - *BASE is a variable expression representing a base address. |
| It contains exactly one REG, SUBREG or MEM, pointed to by BASE_TERM. |
| |
| - *INDEX is a variable expression representing an index value. |
| It may be a scaled expression, such as a MULT. It has exactly |
| one REG, SUBREG or MEM, pointed to by INDEX_TERM. |
| |
| - *DISP is a constant, possibly mutated. DISP_TERM points to the |
| unmutated RTX_CONST_OBJ. */ |
| rtx *segment; |
| rtx *base; |
| rtx *index; |
| rtx *disp; |
| |
| rtx *segment_term; |
| rtx *base_term; |
| rtx *index_term; |
| rtx *disp_term; |
| |
| /* In a {PRE,POST}_MODIFY address, this points to a second copy |
| of BASE_TERM, otherwise it is null. */ |
| rtx *base_term2; |
| |
| /* ADDRESS if this structure describes an address operand, MEM if |
| it describes a MEM address. */ |
| enum rtx_code addr_outer_code; |
| |
| /* If BASE is nonnull, this is the code of the rtx that contains it. */ |
| enum rtx_code base_outer_code; |
| }; |
| |
| /* This is used to bundle an rtx and a mode together so that the pair |
| can be used with the wi:: routines. If we ever put modes into rtx |
| integer constants, this should go away and then just pass an rtx in. */ |
| typedef std::pair <rtx, machine_mode> rtx_mode_t; |
| |
| namespace wi |
| { |
| template <> |
| struct int_traits <rtx_mode_t> |
| { |
| static const enum precision_type precision_type = VAR_PRECISION; |
| static const bool host_dependent_precision = false; |
| /* This ought to be true, except for the special case that BImode |
| is canonicalized to STORE_FLAG_VALUE, which might be 1. */ |
| static const bool is_sign_extended = false; |
| static unsigned int get_precision (const rtx_mode_t &); |
| static wi::storage_ref decompose (HOST_WIDE_INT *, unsigned int, |
| const rtx_mode_t &); |
| }; |
| } |
| |
| inline unsigned int |
| wi::int_traits <rtx_mode_t>::get_precision (const rtx_mode_t &x) |
| { |
| gcc_checking_assert (x.second != BLKmode && x.second != VOIDmode); |
| return GET_MODE_PRECISION (x.second); |
| } |
| |
| inline wi::storage_ref |
| wi::int_traits <rtx_mode_t>::decompose (HOST_WIDE_INT *, |
| unsigned int precision, |
| const rtx_mode_t &x) |
| { |
| gcc_checking_assert (precision == get_precision (x)); |
| switch (GET_CODE (x.first)) |
| { |
| case CONST_INT: |
| if (precision < HOST_BITS_PER_WIDE_INT) |
| /* Nonzero BImodes are stored as STORE_FLAG_VALUE, which on many |
| targets is 1 rather than -1. */ |
| gcc_checking_assert (INTVAL (x.first) |
| == sext_hwi (INTVAL (x.first), precision) |
| || (x.second == BImode && INTVAL (x.first) == 1)); |
| |
| return wi::storage_ref (&INTVAL (x.first), 1, precision); |
| |
| case CONST_WIDE_INT: |
| return wi::storage_ref (&CONST_WIDE_INT_ELT (x.first, 0), |
| CONST_WIDE_INT_NUNITS (x.first), precision); |
| |
| #if TARGET_SUPPORTS_WIDE_INT == 0 |
| case CONST_DOUBLE: |
| return wi::storage_ref (&CONST_DOUBLE_LOW (x.first), 2, precision); |
| #endif |
| |
| default: |
| gcc_unreachable (); |
| } |
| } |
| |
| namespace wi |
| { |
| hwi_with_prec shwi (HOST_WIDE_INT, machine_mode mode); |
| wide_int min_value (machine_mode, signop); |
| wide_int max_value (machine_mode, signop); |
| } |
| |
| inline wi::hwi_with_prec |
| wi::shwi (HOST_WIDE_INT val, machine_mode mode) |
| { |
| return shwi (val, GET_MODE_PRECISION (mode)); |
| } |
| |
| /* Produce the smallest number that is represented in MODE. The precision |
| is taken from MODE and the sign from SGN. */ |
| inline wide_int |
| wi::min_value (machine_mode mode, signop sgn) |
| { |
| return min_value (GET_MODE_PRECISION (mode), sgn); |
| } |
| |
| /* Produce the largest number that is represented in MODE. The precision |
| is taken from MODE and the sign from SGN. */ |
| inline wide_int |
| wi::max_value (machine_mode mode, signop sgn) |
| { |
| return max_value (GET_MODE_PRECISION (mode), sgn); |
| } |
| |
| extern void init_rtlanal (void); |
| extern int rtx_cost (rtx, machine_mode, enum rtx_code, int, bool); |
| extern int address_cost (rtx, machine_mode, addr_space_t, bool); |
| extern void get_full_rtx_cost (rtx, machine_mode, enum rtx_code, int, |
| struct full_rtx_costs *); |
| extern unsigned int subreg_lsb (const_rtx); |
| extern unsigned int subreg_lsb_1 (machine_mode, machine_mode, |
| unsigned int); |
| extern unsigned int subreg_size_offset_from_lsb (unsigned int, unsigned int, |
| unsigned int); |
| |
| /* Return the subreg byte offset for a subreg whose outer mode is |
| OUTER_MODE, whose inner mode is INNER_MODE, and where there are |
| LSB_SHIFT *bits* between the lsb of the outer value and the lsb of |
| the inner value. This is the inverse of subreg_lsb_1 (which converts |
| byte offsets to bit shifts). */ |
| |
| inline unsigned int |
| subreg_offset_from_lsb (machine_mode outer_mode, |
| machine_mode inner_mode, |
| unsigned int lsb_shift) |
| { |
| return subreg_size_offset_from_lsb (GET_MODE_SIZE (outer_mode), |
| GET_MODE_SIZE (inner_mode), lsb_shift); |
| } |
| |
| extern unsigned int subreg_regno_offset (unsigned int, machine_mode, |
| unsigned int, machine_mode); |
| extern bool subreg_offset_representable_p (unsigned int, machine_mode, |
| unsigned int, machine_mode); |
| extern unsigned int subreg_regno (const_rtx); |
| extern int simplify_subreg_regno (unsigned int, machine_mode, |
| unsigned int, machine_mode); |
| extern unsigned int subreg_nregs (const_rtx); |
| extern unsigned int subreg_nregs_with_regno (unsigned int, const_rtx); |
| extern unsigned HOST_WIDE_INT nonzero_bits (const_rtx, machine_mode); |
| extern unsigned int num_sign_bit_copies (const_rtx, machine_mode); |
| extern bool constant_pool_constant_p (rtx); |
| extern bool truncated_to_mode (machine_mode, const_rtx); |
| extern int low_bitmask_len (machine_mode, unsigned HOST_WIDE_INT); |
| extern void split_double (rtx, rtx *, rtx *); |
| extern rtx *strip_address_mutations (rtx *, enum rtx_code * = 0); |
| extern void decompose_address (struct address_info *, rtx *, |
| machine_mode, addr_space_t, enum rtx_code); |
| extern void decompose_lea_address (struct address_info *, rtx *); |
| extern void decompose_mem_address (struct address_info *, rtx); |
| extern void update_address (struct address_info *); |
| extern HOST_WIDE_INT get_index_scale (const struct address_info *); |
| extern enum rtx_code get_index_code (const struct address_info *); |
| |
| /* 1 if RTX is a subreg containing a reg that is already known to be |
| sign- or zero-extended from the mode of the subreg to the mode of |
| the reg. SUBREG_PROMOTED_UNSIGNED_P gives the signedness of the |
| extension. |
| |
| When used as a LHS, is means that this extension must be done |
| when assigning to SUBREG_REG. */ |
| |
| #define SUBREG_PROMOTED_VAR_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED", (RTX), SUBREG)->in_struct) |
| |
| /* Valid for subregs which are SUBREG_PROMOTED_VAR_P(). In that case |
| this gives the necessary extensions: |
| 0 - signed (SPR_SIGNED) |
| 1 - normal unsigned (SPR_UNSIGNED) |
| 2 - value is both sign and unsign extended for mode |
| (SPR_SIGNED_AND_UNSIGNED). |
| -1 - pointer unsigned, which most often can be handled like unsigned |
| extension, except for generating instructions where we need to |
| emit special code (ptr_extend insns) on some architectures |
| (SPR_POINTER). */ |
| |
| const int SRP_POINTER = -1; |
| const int SRP_SIGNED = 0; |
| const int SRP_UNSIGNED = 1; |
| const int SRP_SIGNED_AND_UNSIGNED = 2; |
| |
| /* Sets promoted mode for SUBREG_PROMOTED_VAR_P(). */ |
| #define SUBREG_PROMOTED_SET(RTX, VAL) \ |
| do { \ |
| rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \ |
| (RTX), SUBREG); \ |
| switch (VAL) \ |
| { \ |
| case SRP_POINTER: \ |
| _rtx->volatil = 0; \ |
| _rtx->unchanging = 0; \ |
| break; \ |
| case SRP_SIGNED: \ |
| _rtx->volatil = 0; \ |
| _rtx->unchanging = 1; \ |
| break; \ |
| case SRP_UNSIGNED: \ |
| _rtx->volatil = 1; \ |
| _rtx->unchanging = 0; \ |
| break; \ |
| case SRP_SIGNED_AND_UNSIGNED: \ |
| _rtx->volatil = 1; \ |
| _rtx->unchanging = 1; \ |
| break; \ |
| } \ |
| } while (0) |
| |
| /* Gets the value stored in promoted mode for SUBREG_PROMOTED_VAR_P(), |
| including SRP_SIGNED_AND_UNSIGNED if promoted for |
| both signed and unsigned. */ |
| #define SUBREG_PROMOTED_GET(RTX) \ |
| (2 * (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", (RTX), SUBREG)->volatil)\ |
| + (RTX)->unchanging - 1) |
| |
| /* Returns sign of promoted mode for SUBREG_PROMOTED_VAR_P(). */ |
| #define SUBREG_PROMOTED_SIGN(RTX) \ |
| ((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGN", (RTX), SUBREG)->volatil) ? 1\ |
| : (RTX)->unchanging - 1) |
| |
| /* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted |
| for SIGNED type. */ |
| #define SUBREG_PROMOTED_SIGNED_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGNED_P", (RTX), SUBREG)->unchanging) |
| |
| /* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted |
| for UNSIGNED type. */ |
| #define SUBREG_PROMOTED_UNSIGNED_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil) |
| |
| /* Checks if RTX of SUBREG_PROMOTED_VAR_P() is promoted for given SIGN. */ |
| #define SUBREG_CHECK_PROMOTED_SIGN(RTX, SIGN) \ |
| ((SIGN) == SRP_POINTER ? SUBREG_PROMOTED_GET (RTX) == SRP_POINTER \ |
| : (SIGN) == SRP_SIGNED ? SUBREG_PROMOTED_SIGNED_P (RTX) \ |
| : SUBREG_PROMOTED_UNSIGNED_P (RTX)) |
| |
| /* True if the REG is the static chain register for some CALL_INSN. */ |
| #define STATIC_CHAIN_REG_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("STATIC_CHAIN_REG_P", (RTX), REG)->jump) |
| |
| /* True if the subreg was generated by LRA for reload insns. Such |
| subregs are valid only during LRA. */ |
| #define LRA_SUBREG_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("LRA_SUBREG_P", (RTX), SUBREG)->jump) |
| |
| /* True if call is instrumented by Pointer Bounds Checker. */ |
| #define CALL_EXPR_WITH_BOUNDS_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("CALL_EXPR_WITH_BOUNDS_P", (RTX), CALL)->jump) |
| |
| /* Access various components of an ASM_OPERANDS rtx. */ |
| |
| #define ASM_OPERANDS_TEMPLATE(RTX) XCSTR (RTX, 0, ASM_OPERANDS) |
| #define ASM_OPERANDS_OUTPUT_CONSTRAINT(RTX) XCSTR (RTX, 1, ASM_OPERANDS) |
| #define ASM_OPERANDS_OUTPUT_IDX(RTX) XCINT (RTX, 2, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT_VEC(RTX) XCVEC (RTX, 3, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT_CONSTRAINT_VEC(RTX) XCVEC (RTX, 4, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT(RTX, N) XCVECEXP (RTX, 3, N, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT_LENGTH(RTX) XCVECLEN (RTX, 3, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT_CONSTRAINT_EXP(RTX, N) \ |
| XCVECEXP (RTX, 4, N, ASM_OPERANDS) |
| #define ASM_OPERANDS_INPUT_CONSTRAINT(RTX, N) \ |
| XSTR (XCVECEXP (RTX, 4, N, ASM_OPERANDS), 0) |
| #define ASM_OPERANDS_INPUT_MODE(RTX, N) \ |
| GET_MODE (XCVECEXP (RTX, 4, N, ASM_OPERANDS)) |
| #define ASM_OPERANDS_LABEL_VEC(RTX) XCVEC (RTX, 5, ASM_OPERANDS) |
| #define ASM_OPERANDS_LABEL_LENGTH(RTX) XCVECLEN (RTX, 5, ASM_OPERANDS) |
| #define ASM_OPERANDS_LABEL(RTX, N) XCVECEXP (RTX, 5, N, ASM_OPERANDS) |
| #define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCUINT (RTX, 6, ASM_OPERANDS) |
| #define ASM_INPUT_SOURCE_LOCATION(RTX) XCUINT (RTX, 1, ASM_INPUT) |
| |
| /* 1 if RTX is a mem that is statically allocated in read-only memory. */ |
| #define MEM_READONLY_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("MEM_READONLY_P", (RTX), MEM)->unchanging) |
| |
| /* 1 if RTX is a mem and we should keep the alias set for this mem |
| unchanged when we access a component. Set to 1, or example, when we |
| are already in a non-addressable component of an aggregate. */ |
| #define MEM_KEEP_ALIAS_SET_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("MEM_KEEP_ALIAS_SET_P", (RTX), MEM)->jump) |
| |
| /* 1 if RTX is a mem or asm_operand for a volatile reference. */ |
| #define MEM_VOLATILE_P(RTX) \ |
| (RTL_FLAG_CHECK3 ("MEM_VOLATILE_P", (RTX), MEM, ASM_OPERANDS, \ |
| ASM_INPUT)->volatil) |
| |
| /* 1 if RTX is a mem that cannot trap. */ |
| #define MEM_NOTRAP_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("MEM_NOTRAP_P", (RTX), MEM)->call) |
| |
| /* The memory attribute block. We provide access macros for each value |
| in the block and provide defaults if none specified. */ |
| #define MEM_ATTRS(RTX) X0MEMATTR (RTX, 1) |
| |
| /* The register attribute block. We provide access macros for each value |
| in the block and provide defaults if none specified. */ |
| #define REG_ATTRS(RTX) (REG_CHECK (RTX)->attrs) |
| |
| #ifndef GENERATOR_FILE |
| /* For a MEM rtx, the alias set. If 0, this MEM is not in any alias |
| set, and may alias anything. Otherwise, the MEM can only alias |
| MEMs in a conflicting alias set. This value is set in a |
| language-dependent manner in the front-end, and should not be |
| altered in the back-end. These set numbers are tested with |
| alias_sets_conflict_p. */ |
| #define MEM_ALIAS_SET(RTX) (get_mem_attrs (RTX)->alias) |
| |
| /* For a MEM rtx, the decl it is known to refer to, if it is known to |
| refer to part of a DECL. It may also be a COMPONENT_REF. */ |
| #define MEM_EXPR(RTX) (get_mem_attrs (RTX)->expr) |
| |
| /* For a MEM rtx, true if its MEM_OFFSET is known. */ |
| #define MEM_OFFSET_KNOWN_P(RTX) (get_mem_attrs (RTX)->offset_known_p) |
| |
| /* For a MEM rtx, the offset from the start of MEM_EXPR. */ |
| #define MEM_OFFSET(RTX) (get_mem_attrs (RTX)->offset) |
| |
| /* For a MEM rtx, the address space. */ |
| #define MEM_ADDR_SPACE(RTX) (get_mem_attrs (RTX)->addrspace) |
| |
| /* For a MEM rtx, true if its MEM_SIZE is known. */ |
| #define MEM_SIZE_KNOWN_P(RTX) (get_mem_attrs (RTX)->size_known_p) |
| |
| /* For a MEM rtx, the size in bytes of the MEM. */ |
| #define MEM_SIZE(RTX) (get_mem_attrs (RTX)->size) |
| |
| /* For a MEM rtx, the alignment in bits. We can use the alignment of the |
| mode as a default when STRICT_ALIGNMENT, but not if not. */ |
| #define MEM_ALIGN(RTX) (get_mem_attrs (RTX)->align) |
| #else |
| #define MEM_ADDR_SPACE(RTX) ADDR_SPACE_GENERIC |
| #endif |
| |
| /* For a REG rtx, the decl it is known to refer to, if it is known to |
| refer to part of a DECL. */ |
| #define REG_EXPR(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->decl) |
| |
| /* For a REG rtx, the offset from the start of REG_EXPR, if known, as an |
| HOST_WIDE_INT. */ |
| #define REG_OFFSET(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->offset) |
| |
| /* Copy the attributes that apply to memory locations from RHS to LHS. */ |
| #define MEM_COPY_ATTRIBUTES(LHS, RHS) \ |
| (MEM_VOLATILE_P (LHS) = MEM_VOLATILE_P (RHS), \ |
| MEM_NOTRAP_P (LHS) = MEM_NOTRAP_P (RHS), \ |
| MEM_READONLY_P (LHS) = MEM_READONLY_P (RHS), \ |
| MEM_KEEP_ALIAS_SET_P (LHS) = MEM_KEEP_ALIAS_SET_P (RHS), \ |
| MEM_POINTER (LHS) = MEM_POINTER (RHS), \ |
| MEM_ATTRS (LHS) = MEM_ATTRS (RHS)) |
| |
| /* 1 if RTX is a label_ref for a nonlocal label. */ |
| /* Likewise in an expr_list for a REG_LABEL_OPERAND or |
| REG_LABEL_TARGET note. */ |
| #define LABEL_REF_NONLOCAL_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("LABEL_REF_NONLOCAL_P", (RTX), LABEL_REF)->volatil) |
| |
| /* 1 if RTX is a code_label that should always be considered to be needed. */ |
| #define LABEL_PRESERVE_P(RTX) \ |
| (RTL_FLAG_CHECK2 ("LABEL_PRESERVE_P", (RTX), CODE_LABEL, NOTE)->in_struct) |
| |
| /* During sched, 1 if RTX is an insn that must be scheduled together |
| with the preceding insn. */ |
| #define SCHED_GROUP_P(RTX) \ |
| (RTL_FLAG_CHECK4 ("SCHED_GROUP_P", (RTX), DEBUG_INSN, INSN, \ |
| JUMP_INSN, CALL_INSN)->in_struct) |
| |
| /* For a SET rtx, SET_DEST is the place that is set |
| and SET_SRC is the value it is set to. */ |
| #define SET_DEST(RTX) XC2EXP (RTX, 0, SET, CLOBBER) |
| #define SET_SRC(RTX) XCEXP (RTX, 1, SET) |
| #define SET_IS_RETURN_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("SET_IS_RETURN_P", (RTX), SET)->jump) |
| |
| /* For a TRAP_IF rtx, TRAP_CONDITION is an expression. */ |
| #define TRAP_CONDITION(RTX) XCEXP (RTX, 0, TRAP_IF) |
| #define TRAP_CODE(RTX) XCEXP (RTX, 1, TRAP_IF) |
| |
| /* For a COND_EXEC rtx, COND_EXEC_TEST is the condition to base |
| conditionally executing the code on, COND_EXEC_CODE is the code |
| to execute if the condition is true. */ |
| #define COND_EXEC_TEST(RTX) XCEXP (RTX, 0, COND_EXEC) |
| #define COND_EXEC_CODE(RTX) XCEXP (RTX, 1, COND_EXEC) |
| |
| /* 1 if RTX is a symbol_ref that addresses this function's rtl |
| constants pool. */ |
| #define CONSTANT_POOL_ADDRESS_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("CONSTANT_POOL_ADDRESS_P", (RTX), SYMBOL_REF)->unchanging) |
| |
| /* 1 if RTX is a symbol_ref that addresses a value in the file's |
| tree constant pool. This information is private to varasm.c. */ |
| #define TREE_CONSTANT_POOL_ADDRESS_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("TREE_CONSTANT_POOL_ADDRESS_P", \ |
| (RTX), SYMBOL_REF)->frame_related) |
| |
| /* Used if RTX is a symbol_ref, for machine-specific purposes. */ |
| #define SYMBOL_REF_FLAG(RTX) \ |
| (RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAG", (RTX), SYMBOL_REF)->volatil) |
| |
| /* 1 if RTX is a symbol_ref that has been the library function in |
| emit_library_call. */ |
| #define SYMBOL_REF_USED(RTX) \ |
| (RTL_FLAG_CHECK1 ("SYMBOL_REF_USED", (RTX), SYMBOL_REF)->used) |
| |
| /* 1 if RTX is a symbol_ref for a weak symbol. */ |
| #define SYMBOL_REF_WEAK(RTX) \ |
| (RTL_FLAG_CHECK1 ("SYMBOL_REF_WEAK", (RTX), SYMBOL_REF)->return_val) |
| |
| /* A pointer attached to the SYMBOL_REF; either SYMBOL_REF_DECL or |
| SYMBOL_REF_CONSTANT. */ |
| #define SYMBOL_REF_DATA(RTX) X0ANY ((RTX), 1) |
| |
| /* Set RTX's SYMBOL_REF_DECL to DECL. RTX must not be a constant |
| pool symbol. */ |
| #define SET_SYMBOL_REF_DECL(RTX, DECL) \ |
| (gcc_assert (!CONSTANT_POOL_ADDRESS_P (RTX)), X0TREE ((RTX), 1) = (DECL)) |
| |
| /* The tree (decl or constant) associated with the symbol, or null. */ |
| #define SYMBOL_REF_DECL(RTX) \ |
| (CONSTANT_POOL_ADDRESS_P (RTX) ? NULL : X0TREE ((RTX), 1)) |
| |
| /* Set RTX's SYMBOL_REF_CONSTANT to C. RTX must be a constant pool symbol. */ |
| #define SET_SYMBOL_REF_CONSTANT(RTX, C) \ |
| (gcc_assert (CONSTANT_POOL_ADDRESS_P (RTX)), X0CONSTANT ((RTX), 1) = (C)) |
| |
| /* The rtx constant pool entry for a symbol, or null. */ |
| #define SYMBOL_REF_CONSTANT(RTX) \ |
| (CONSTANT_POOL_ADDRESS_P (RTX) ? X0CONSTANT ((RTX), 1) : NULL) |
| |
| /* A set of flags on a symbol_ref that are, in some respects, redundant with |
| information derivable from the tree decl associated with this symbol. |
| Except that we build a *lot* of SYMBOL_REFs that aren't associated with a |
| decl. In some cases this is a bug. But beyond that, it's nice to cache |
| this information to avoid recomputing it. Finally, this allows space for |
| the target to store more than one bit of information, as with |
| SYMBOL_REF_FLAG. */ |
| #define SYMBOL_REF_FLAGS(RTX) \ |
| (RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAGS", (RTX), SYMBOL_REF) \ |
| ->u2.symbol_ref_flags) |
| |
| /* These flags are common enough to be defined for all targets. They |
| are computed by the default version of targetm.encode_section_info. */ |
| |
| /* Set if this symbol is a function. */ |
| #define SYMBOL_FLAG_FUNCTION (1 << 0) |
| #define SYMBOL_REF_FUNCTION_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_FUNCTION) != 0) |
| /* Set if targetm.binds_local_p is true. */ |
| #define SYMBOL_FLAG_LOCAL (1 << 1) |
| #define SYMBOL_REF_LOCAL_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_LOCAL) != 0) |
| /* Set if targetm.in_small_data_p is true. */ |
| #define SYMBOL_FLAG_SMALL (1 << 2) |
| #define SYMBOL_REF_SMALL_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_SMALL) != 0) |
| /* The three-bit field at [5:3] is true for TLS variables; use |
| SYMBOL_REF_TLS_MODEL to extract the field as an enum tls_model. */ |
| #define SYMBOL_FLAG_TLS_SHIFT 3 |
| #define SYMBOL_REF_TLS_MODEL(RTX) \ |
| ((enum tls_model) ((SYMBOL_REF_FLAGS (RTX) >> SYMBOL_FLAG_TLS_SHIFT) & 7)) |
| /* Set if this symbol is not defined in this translation unit. */ |
| #define SYMBOL_FLAG_EXTERNAL (1 << 6) |
| #define SYMBOL_REF_EXTERNAL_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_EXTERNAL) != 0) |
| /* Set if this symbol has a block_symbol structure associated with it. */ |
| #define SYMBOL_FLAG_HAS_BLOCK_INFO (1 << 7) |
| #define SYMBOL_REF_HAS_BLOCK_INFO_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_HAS_BLOCK_INFO) != 0) |
| /* Set if this symbol is a section anchor. SYMBOL_REF_ANCHOR_P implies |
| SYMBOL_REF_HAS_BLOCK_INFO_P. */ |
| #define SYMBOL_FLAG_ANCHOR (1 << 8) |
| #define SYMBOL_REF_ANCHOR_P(RTX) \ |
| ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_ANCHOR) != 0) |
| |
| /* Subsequent bits are available for the target to use. */ |
| #define SYMBOL_FLAG_MACH_DEP_SHIFT 9 |
| #define SYMBOL_FLAG_MACH_DEP (1 << SYMBOL_FLAG_MACH_DEP_SHIFT) |
| |
| /* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the object_block |
| structure to which the symbol belongs, or NULL if it has not been |
| assigned a block. */ |
| #define SYMBOL_REF_BLOCK(RTX) (BLOCK_SYMBOL_CHECK (RTX)->block) |
| |
| /* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the offset of RTX from |
| the first object in SYMBOL_REF_BLOCK (RTX). The value is negative if |
| RTX has not yet been assigned to a block, or it has not been given an |
| offset within that block. */ |
| #define SYMBOL_REF_BLOCK_OFFSET(RTX) (BLOCK_SYMBOL_CHECK (RTX)->offset) |
| |
| /* True if RTX is flagged to be a scheduling barrier. */ |
| #define PREFETCH_SCHEDULE_BARRIER_P(RTX) \ |
| (RTL_FLAG_CHECK1 ("PREFETCH_SCHEDULE_BARRIER_P", (RTX), PREFETCH)->volatil) |
| |
| /* Indicate whether the machine has any sort of auto increment addressing. |
| If not, we can avoid checking for REG_INC notes. */ |
| |
| #if (defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) \ |
| || defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) \ |
| || defined (HAVE_PRE_MODIFY_DISP) || defined (HAVE_POST_MODIFY_DISP) \ |
| || defined (HAVE_PRE_MODIFY_REG) || defined (HAVE_POST_MODIFY_REG)) |
| #define AUTO_INC_DEC 1 |
| #else |
| #define AUTO_INC_DEC 0 |
| #endif |
| |
| /* Define a macro to look for REG_INC notes, |
| but save time on machines where they never exist. */ |
| |
| #if AUTO_INC_DEC |
| #define FIND_REG_INC_NOTE(INSN, REG) \ |
| ((REG) != NULL_RTX && REG_P ((REG)) \ |
| ? find_regno_note ((INSN), REG_INC, REGNO (REG)) \ |
| : find_reg_note ((INSN), REG_INC, (REG))) |
| #else |
| #define FIND_REG_INC_NOTE(INSN, REG) 0 |
| #endif |
| |
| #ifndef HAVE_PRE_INCREMENT |
| #define HAVE_PRE_INCREMENT 0 |
| #endif |
| |
| #ifndef HAVE_PRE_DECREMENT |
| #define HAVE_PRE_DECREMENT 0 |
| #endif |
| |
| #ifndef HAVE_POST_INCREMENT |
| #define HAVE_POST_INCREMENT 0 |
| #endif |
| |
| #ifndef HAVE_POST_DECREMENT |
| #define HAVE_POST_DECREMENT 0 |
| #endif |
| |
| #ifndef HAVE_POST_MODIFY_DISP |
| #define HAVE_POST_MODIFY_DISP 0 |
| #endif |
| |
| #ifndef HAVE_POST_MODIFY_REG |
| #define HAVE_POST_MODIFY_REG 0 |
| #endif |
| |
| #ifndef HAVE_PRE_MODIFY_DISP |
| #define HAVE_PRE_MODIFY_DISP 0 |
| #endif |
| |
| #ifndef HAVE_PRE_MODIFY_REG |
| #define HAVE_PRE_MODIFY_REG 0 |
| #endif |
| |
| |
| /* Some architectures do not have complete pre/post increment/decrement |
| instruction sets, or only move some modes efficiently. These macros |
| allow us to tune autoincrement generation. */ |
| |
| #ifndef USE_LOAD_POST_INCREMENT |
| #define USE_LOAD_POST_INCREMENT(MODE) HAVE_POST_INCREMENT |
| #endif |
| |
| #ifndef USE_LOAD_POST_DECREMENT |
| #define USE_LOAD_POST_DECREMENT(MODE) HAVE_POST_DECREMENT |
| #endif |
| |
| #ifndef USE_LOAD_PRE_INCREMENT |
| #define USE_LOAD_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT |
| #endif |
| |
| #ifndef USE_LOAD_PRE_DECREMENT |
| #define USE_LOAD_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT |
| #endif |
| |
| #ifndef USE_STORE_POST_INCREMENT |
| #define USE_STORE_POST_INCREMENT(MODE) HAVE_POST_INCREMENT |
| #endif |
| |
| #ifndef USE_STORE_POST_DECREMENT |
| #define USE_STORE_POST_DECREMENT(MODE) HAVE_POST_DECREMENT |
| #endif |
| |
| #ifndef USE_STORE_PRE_INCREMENT |
| #define USE_STORE_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT |
| #endif |
| |
| #ifndef USE_STORE_PRE_DECREMENT |
| #define USE_STORE_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT |
| #endif |
| |
| /* Nonzero when we are generating CONCATs. */ |
| extern int generating_concat_p; |
| |
| /* Nonzero when we are expanding trees to RTL. */ |
| extern int currently_expanding_to_rtl; |
| |
| /* Generally useful functions. */ |
| |
| #ifndef GENERATOR_FILE |
| /* Return the cost of SET X. SPEED_P is true if optimizing for speed |
| rather than size. */ |
| |
| static inline int |
| set_rtx_cost (rtx x, bool speed_p) |
| { |
| return rtx_cost (x, VOIDmode, INSN, 4, speed_p); |
| } |
| |
| /* Like set_rtx_cost, but return both the speed and size costs in C. */ |
| |
| static inline void |
| get_full_set_rtx_cost (rtx x, struct full_rtx_costs *c) |
| { |
| get_full_rtx_cost (x, VOIDmode, INSN, 4, c); |
| } |
| |
| /* Return the cost of moving X into a register, relative to the cost |
| of a register move. SPEED_P is true if optimizing for speed rather |
| than size. */ |
| |
| static inline int |
| set_src_cost (rtx x, machine_mode mode, bool speed_p) |
| { |
| return rtx_cost (x, mode, SET, 1, speed_p); |
| } |
| |
| /* Like set_src_cost, but return both the speed and size costs in C. */ |
| |
| static inline void |
| get_full_set_src_cost (rtx x, machine_mode mode, struct full_rtx_costs *c) |
| { |
| get_full_rtx_cost (x, mode, SET, 1, c); |
| } |
| #endif |
| |
| /* A convenience macro to validate the arguments of a zero_extract |
| expression. It determines whether SIZE lies inclusively within |
| [1, RANGE], POS lies inclusively within between [0, RANGE - 1] |
| and the sum lies inclusively within [1, RANGE]. RANGE must be |
| >= 1, but SIZE and POS may be negative. */ |
| #define EXTRACT_ARGS_IN_RANGE(SIZE, POS, RANGE) \ |
| (IN_RANGE ((POS), 0, (unsigned HOST_WIDE_INT) (RANGE) - 1) \ |
| && IN_RANGE ((SIZE), 1, (unsigned HOST_WIDE_INT) (RANGE) \ |
| - (unsigned HOST_WIDE_INT)(POS))) |
| |
| /* In explow.c */ |
| extern HOST_WIDE_INT trunc_int_for_mode (HOST_WIDE_INT, machine_mode); |
| extern rtx plus_constant (machine_mode, rtx, HOST_WIDE_INT, bool = false); |
| |
| /* In rtl.c */ |
| extern rtx rtx_alloc_stat (RTX_CODE MEM_STAT_DECL); |
| #define rtx_alloc(c) rtx_alloc_stat (c MEM_STAT_INFO) |
| extern rtx rtx_alloc_stat_v (RTX_CODE MEM_STAT_DECL, int); |
| #define rtx_alloc_v(c, SZ) rtx_alloc_stat_v (c MEM_STAT_INFO, SZ) |
| #define const_wide_int_alloc(NWORDS) \ |
| rtx_alloc_v (CONST_WIDE_INT, \ |
| (sizeof (struct hwivec_def) \ |
| + ((NWORDS)-1) * sizeof (HOST_WIDE_INT))) \ |
| |
| extern rtvec rtvec_alloc (int); |
| extern rtvec shallow_copy_rtvec (rtvec); |
| extern bool shared_const_p (const_rtx); |
| extern rtx copy_rtx (rtx); |
| extern enum rtx_code classify_insn (rtx); |
| extern void dump_rtx_statistics (void); |
| |
| /* In emit-rtl.c */ |
| extern rtx copy_rtx_if_shared (rtx); |
| |
| /* In rtl.c */ |
| extern unsigned int rtx_size (const_rtx); |
| extern rtx shallow_copy_rtx_stat (const_rtx MEM_STAT_DECL); |
| #define shallow_copy_rtx(a) shallow_copy_rtx_stat (a MEM_STAT_INFO) |
| extern int rtx_equal_p (const_rtx, const_rtx); |
| extern bool rtvec_all_equal_p (const_rtvec); |
| |
| /* Return true if X is a vector constant with a duplicated element value. */ |
| |
| inline bool |
| const_vec_duplicate_p (const_rtx x) |
| { |
| return GET_CODE (x) == CONST_VECTOR && rtvec_all_equal_p (XVEC (x, 0)); |
| } |
| |
| /* Return true if X is a vector constant with a duplicated element value. |
| Store the duplicated element in *ELT if so. */ |
| |
| template <typename T> |
| inline bool |
| const_vec_duplicate_p (T x, T *elt) |
| { |
| if (const_vec_duplicate_p (x)) |
| { |
| *elt = CONST_VECTOR_ELT (x, 0); |
| return true; |
| } |
| return false; |
| } |
| |
| /* If X is a vector constant with a duplicated element value, return that |
| element value, otherwise return X. */ |
| |
| template <typename T> |
| inline T |
| unwrap_const_vec_duplicate (T x) |
| { |
| if (const_vec_duplicate_p (x)) |
| x = CONST_VECTOR_ELT (x, 0); |
| return x; |
| } |
| |
| /* In emit-rtl.c */ |
| extern rtvec gen_rtvec_v (int, rtx *); |
| extern rtvec gen_rtvec_v (int, rtx_insn **); |
| extern rtx gen_reg_rtx (machine_mode); |
| extern rtx gen_rtx_REG_offset (rtx, machine_mode, unsigned int, int); |
| extern rtx gen_reg_rtx_offset (rtx, machine_mode, int); |
| extern rtx gen_reg_rtx_and_attrs (rtx); |
| extern rtx_code_label *gen_label_rtx (void); |
| extern rtx gen_lowpart_common (machine_mode, rtx); |
| |
| /* In cse.c */ |
| extern rtx gen_lowpart_if_possible (machine_mode, rtx); |
| |
| /* In emit-rtl.c */ |
| extern rtx gen_highpart (machine_mode, rtx); |
| extern rtx gen_highpart_mode (machine_mode, machine_mode, rtx); |
| extern rtx operand_subword (rtx, unsigned int, int, machine_mode); |
| |
| /* In emit-rtl.c */ |
| extern rtx operand_subword_force (rtx, unsigned int, machine_mode); |
| extern bool paradoxical_subreg_p (const_rtx); |
| extern int subreg_lowpart_p (const_rtx); |
| extern unsigned int subreg_size_lowpart_offset (unsigned int, unsigned int); |
| |
| /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */ |
| |
| inline unsigned int |
| subreg_lowpart_offset (machine_mode outermode, machine_mode innermode) |
| { |
| return subreg_size_lowpart_offset (GET_MODE_SIZE (outermode), |
| GET_MODE_SIZE (innermode)); |
| } |
| |
| extern unsigned int subreg_size_highpart_offset (unsigned int, unsigned int); |
| |
| /* Return the SUBREG_BYTE for an OUTERMODE highpart of an INNERMODE value. */ |
| |
| inline unsigned int |
| subreg_highpart_offset (machine_mode outermode, machine_mode innermode) |
| { |
| return subreg_size_highpart_offset (GET_MODE_SIZE (outermode), |
| GET_MODE_SIZE (innermode)); |
| } |
| |
| extern int byte_lowpart_offset (machine_mode, machine_mode); |
| extern rtx make_safe_from (rtx, rtx); |
| extern rtx convert_memory_address_addr_space_1 (machine_mode, rtx, |
| addr_space_t, bool, bool); |
| extern rtx convert_memory_address_addr_space (machine_mode, rtx, |
| addr_space_t); |
| #define convert_memory_address(to_mode,x) \ |
| convert_memory_address_addr_space ((to_mode), (x), ADDR_SPACE_GENERIC) |
| extern const char *get_insn_name (int); |
| extern rtx_insn *get_last_insn_anywhere (void); |
| extern rtx_insn *get_first_nonnote_insn (void); |
| extern rtx_insn *get_last_nonnote_insn (void); |
| extern void start_sequence (void); |
| extern void push_to_sequence (rtx_insn *); |
| extern void push_to_sequence2 (rtx_insn *, rtx_insn *); |
| extern void end_sequence (void); |
| #if TARGET_SUPPORTS_WIDE_INT == 0 |
| extern double_int rtx_to_double_int (const_rtx); |
| #endif |
| extern void cwi_output_hex (FILE *, const_rtx); |
| #ifndef GENERATOR_FILE |
| extern rtx immed_wide_int_const (const wide_int_ref &, machine_mode); |
| #endif |
| #if TARGET_SUPPORTS_WIDE_INT == 0 |
| extern rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT, |
| machine_mode); |
| #endif |
| |
| /* In varasm.c */ |
| extern rtx force_const_mem (machine_mode, rtx); |
| |
| /* In varasm.c */ |
| |
| struct function; |
| extern rtx get_pool_constant (const_rtx); |
| extern rtx get_pool_constant_mark (rtx, bool *); |
| extern machine_mode get_pool_mode (const_rtx); |
| extern rtx simplify_subtraction (rtx); |
| extern void decide_function_section (tree); |
| |
| /* In emit-rtl.c */ |
| extern rtx_insn *emit_insn_before (rtx, rtx); |
| extern rtx_insn *emit_insn_before_noloc (rtx, rtx_insn *, basic_block); |
| extern rtx_insn *emit_insn_before_setloc (rtx, rtx_insn *, int); |
| extern rtx_jump_insn *emit_jump_insn_before (rtx, rtx); |
| extern rtx_jump_insn *emit_jump_insn_before_noloc (rtx, rtx_insn *); |
| extern rtx_jump_insn *emit_jump_insn_before_setloc (rtx, rtx_insn *, int); |
| extern rtx_insn *emit_call_insn_before (rtx, rtx_insn *); |
| extern rtx_insn *emit_call_insn_before_noloc (rtx, rtx_insn *); |
| extern rtx_insn *emit_call_insn_before_setloc (rtx, rtx_insn *, int); |
| extern rtx_insn *emit_debug_insn_before (rtx, rtx_insn *); |
| extern rtx_insn *emit_debug_insn_before_noloc (rtx, rtx); |
| extern rtx_insn *emit_debug_insn_before_setloc (rtx, rtx, int); |
| extern rtx_barrier *emit_barrier_before (rtx); |
| extern rtx_code_label *emit_label_before (rtx, rtx_insn *); |
| extern rtx_note *emit_note_before (enum insn_note, rtx_insn *); |
| extern rtx_insn *emit_insn_after (rtx, rtx); |
| extern rtx_insn *emit_insn_after_noloc (rtx, rtx, basic_block); |
| extern rtx_insn *emit_insn_after_setloc (rtx, rtx, int); |
| extern rtx_jump_insn *emit_jump_insn_after (rtx, rtx); |
| extern rtx_jump_insn *emit_jump_insn_after_noloc (rtx, rtx); |
| extern rtx_jump_insn *emit_jump_insn_after_setloc (rtx, rtx, int); |
| extern rtx_insn *emit_call_insn_after (rtx, rtx); |
| extern rtx_insn *emit_call_insn_after_noloc (rtx, rtx); |
| extern rtx_insn *emit_call_insn_after_setloc (rtx, rtx, int); |
| extern rtx_insn *emit_debug_insn_after (rtx, rtx); |
| extern rtx_insn *emit_debug_insn_after_noloc (rtx, rtx); |
| extern rtx_insn *emit_debug_insn_after_setloc (rtx, rtx, int); |
| extern rtx_barrier *emit_barrier_after (rtx); |
| extern rtx_insn *emit_label_after (rtx, rtx_insn *); |
| extern rtx_note *emit_note_after (enum insn_note, rtx_insn *); |
| extern rtx_insn *emit_insn (rtx); |
| extern rtx_insn *emit_debug_insn (rtx); |
| extern rtx_insn *emit_jump_insn (rtx); |
| extern rtx_insn *emit_call_insn (rtx); |
| extern rtx_code_label *emit_label (rtx); |
| extern rtx_jump_table_data *emit_jump_table_data (rtx); |
| extern rtx_barrier *emit_barrier (void); |
| extern rtx_note *emit_note (enum insn_note); |
| extern rtx_note *emit_note_copy (rtx_note *); |
| extern rtx_insn *gen_clobber (rtx); |
| extern rtx_insn *emit_clobber (rtx); |
| extern rtx_insn *gen_use (rtx); |
| extern rtx_insn *emit_use (rtx); |
| extern rtx_insn *make_insn_raw (rtx); |
| extern void add_function_usage_to (rtx, rtx); |
| extern rtx_call_insn *last_call_insn (void); |
| extern rtx_insn *previous_insn (rtx_insn *); |
| extern rtx_insn *next_insn (rtx_insn *); |
| extern rtx_insn *prev_nonnote_insn (rtx_insn *); |
| extern rtx_insn *prev_nonnote_insn_bb (rtx_insn *); |
| extern rtx_insn *next_nonnote_insn (rtx_insn *); |
| extern rtx_insn *next_nonnote_insn_bb (rtx_insn *); |
| extern rtx_insn *prev_nondebug_insn (rtx_insn *); |
| extern rtx_insn *next_nondebug_insn (rtx_insn *); |
| extern rtx_insn *prev_nonnote_nondebug_insn (rtx_insn *); |
| extern rtx_insn *next_nonnote_nondebug_insn (rtx_insn *); |
| extern rtx_insn *prev_real_insn (rtx_insn *); |
| extern rtx_insn *next_real_insn (rtx); |
| extern rtx_insn *prev_active_insn (rtx_insn *); |
| extern rtx_insn *next_active_insn (rtx_insn *); |
| extern int active_insn_p (const rtx_insn *); |
| extern rtx_insn *next_cc0_user (rtx_insn *); |
| extern rtx_insn *prev_cc0_setter (rtx_insn *); |
| |
| /* In emit-rtl.c */ |
| extern int insn_line (const rtx_insn *); |
| extern const char * insn_file (const rtx_insn *); |
| extern tree insn_scope (const rtx_insn *); |
| extern expanded_location insn_location (const rtx_insn *); |
| extern location_t prologue_location, epilogue_location; |
| |
| /* In jump.c */ |
| extern enum rtx_code reverse_condition (enum rtx_code); |
| extern enum rtx_code reverse_condition_maybe_unordered (enum rtx_code); |
| extern enum rtx_code swap_condition (enum rtx_code); |
| extern enum rtx_code unsigned_condition (enum rtx_code); |
| extern enum rtx_code signed_condition (enum rtx_code); |
| extern void mark_jump_label (rtx, rtx_insn *, int); |
| |
| /* In jump.c */ |
| extern rtx_insn *delete_related_insns (rtx); |
| |
| /* In recog.c */ |
| extern rtx *find_constant_term_loc (rtx *); |
| |
| /* In emit-rtl.c */ |
| extern rtx_insn *try_split (rtx, rtx_insn *, int); |
| extern int split_branch_probability; |
| |
| /* In insn-recog.c (generated by genrecog). */ |
| extern rtx_insn *split_insns (rtx, rtx_insn *); |
| |
| /* In simplify-rtx.c */ |
| extern rtx simplify_const_unary_operation (enum rtx_code, machine_mode, |
| rtx, machine_mode); |
| extern rtx simplify_unary_operation (enum rtx_code, machine_mode, rtx, |
| machine_mode); |
| extern rtx simplify_const_binary_operation (enum rtx_code, machine_mode, |
| rtx, rtx); |
| extern rtx simplify_binary_operation (enum rtx_code, machine_mode, rtx, |
| rtx); |
| extern rtx simplify_ternary_operation (enum rtx_code, machine_mode, |
| machine_mode, rtx, rtx, rtx); |
| extern rtx simplify_const_relational_operation (enum rtx_code, |
| machine_mode, rtx, rtx); |
| extern rtx simplify_relational_operation (enum rtx_code, machine_mode, |
| machine_mode, rtx, rtx); |
| extern rtx simplify_gen_binary (enum rtx_code, machine_mode, rtx, rtx); |
| extern rtx simplify_gen_unary (enum rtx_code, machine_mode, rtx, |
| machine_mode); |
| extern rtx simplify_gen_ternary (enum rtx_code, machine_mode, |
| machine_mode, rtx, rtx, rtx); |
| extern rtx simplify_gen_relational (enum rtx_code, machine_mode, |
| machine_mode, rtx, rtx); |
| extern rtx simplify_subreg (machine_mode, rtx, machine_mode, |
| unsigned int); |
| extern rtx simplify_gen_subreg (machine_mode, rtx, machine_mode, |
| unsigned int); |
| extern rtx lowpart_subreg (machine_mode, rtx, machine_mode); |
| extern rtx simplify_replace_fn_rtx (rtx, const_rtx, |
| rtx (*fn) (rtx, const_rtx, void *), void *); |
| extern rtx simplify_replace_rtx (rtx, const_rtx, rtx); |
| extern rtx simplify_rtx (const_rtx); |
| extern rtx avoid_constant_pool_reference (rtx); |
| extern rtx delegitimize_mem_from_attrs (rtx); |
| extern bool mode_signbit_p (machine_mode, const_rtx); |
| extern bool val_signbit_p (machine_mode, unsigned HOST_WIDE_INT); |
| extern bool val_signbit_known_set_p (machine_mode, |
| unsigned HOST_WIDE_INT); |
| extern bool val_signbit_known_clear_p (machine_mode, |
| unsigned HOST_WIDE_INT); |
| |
| /* In reginfo.c */ |
| extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int, |
| bool); |
| extern const HARD_REG_SET &simplifiable_subregs (const subreg_shape &); |
| |
| /* In emit-rtl.c */ |
| extern rtx set_for_reg_notes (rtx); |
| extern rtx set_unique_reg_note (rtx, enum reg_note, rtx); |
| extern rtx set_dst_reg_note (rtx, enum reg_note, rtx, rtx); |
| extern void set_insn_deleted (rtx); |
| |
| /* Functions in rtlanal.c */ |
| |
| extern rtx single_set_2 (const rtx_insn *, const_rtx); |
| extern bool contains_symbol_ref_p (const_rtx); |
| extern bool contains_symbolic_reference_p (const_rtx); |
| |
| /* Handle the cheap and common cases inline for performance. */ |
| |
| inline rtx single_set (const rtx_insn *insn) |
| { |
| if (!INSN_P (insn)) |
| return NULL_RTX; |
| |
| if (GET_CODE (PATTERN (insn)) == SET) |
| return PATTERN (insn); |
| |
| /* Defer to the more expensive case. */ |
| return single_set_2 (insn, PATTERN (insn)); |
| } |
| |
| extern machine_mode get_address_mode (rtx mem); |
| extern int rtx_addr_can_trap_p (const_rtx); |
| extern bool nonzero_address_p (const_rtx); |
| extern int rtx_unstable_p (const_rtx); |
| extern bool rtx_varies_p (const_rtx, bool); |
| extern bool rtx_addr_varies_p (const_rtx, bool); |
| extern rtx get_call_rtx_from (rtx); |
| extern HOST_WIDE_INT get_integer_term (const_rtx); |
| extern rtx get_related_value (const_rtx); |
| extern bool offset_within_block_p (const_rtx, HOST_WIDE_INT); |
| extern void split_const (rtx, rtx *, rtx *); |
| extern bool unsigned_reg_p (rtx); |
| extern int reg_mentioned_p (const_rtx, const_rtx); |
| extern int count_occurrences (const_rtx, const_rtx, int); |
| extern int reg_referenced_p (const_rtx, const_rtx); |
| extern int reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *); |
| extern int reg_set_between_p (const_rtx, const rtx_insn *, const rtx_insn *); |
| extern int commutative_operand_precedence (rtx); |
| extern bool swap_commutative_operands_p (rtx, rtx); |
| extern int modified_between_p (const_rtx, const rtx_insn *, const rtx_insn *); |
| extern int no_labels_between_p (const rtx_insn *, const rtx_insn *); |
| extern int modified_in_p (const_rtx, const_rtx); |
| extern int reg_set_p (const_rtx, const_rtx); |
| extern int multiple_sets (const_rtx); |
| extern int set_noop_p (const_rtx); |
| extern int noop_move_p (const rtx_insn *); |
| extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *); |
| extern int reg_overlap_mentioned_p (const_rtx, const_rtx); |
| extern const_rtx set_of (const_rtx, |