| 2018-02-22 Shea Levy <shea@shealevy.com> |
| |
| * disassemble.c (ARCH_riscv): Define if ARCH_all. |
| |
| 2018-02-22 H.J. Lu <hongjiu.lu@intel.com> |
| |
| * i386-opc.tbl: Add {rex}, |
| * i386-tbl.h: Regenerated. |
| |
| 2018-02-20 Maciej W. Rozycki <macro@mips.com> |
| |
| * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case. |
| (mips16_opcodes): Replace `M' with `m' for "restore". |
| |
| 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * arm-dis.c (thumb_opcodes): Fix BXNS mask. |
| |
| 2018-02-13 Maciej W. Rozycki <macro@mips.com> |
| |
| * wasm32-dis.c (print_insn_wasm32): Rename `index' local |
| variable to `function_index'. |
| |
| 2018-02-13 Nick Clifton <nickc@redhat.com> |
| |
| PR 22823 |
| * metag-dis.c (print_fmmov): Double buffer size to avoid warning |
| about truncation of printing. |
| |
| 2018-02-12 Henry Wong <henry@stuffedcow.net> |
| |
| * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding. |
| |
| 2018-02-05 Nick Clifton <nickc@redhat.com> |
| |
| * po/pt_BR.po: Updated Brazilian Portuguese translation. |
| |
| 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| |
| * i386-dis.c (enum): Add pconfig. |
| * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS. |
| (cpu_flags): Add CpuPCONFIG. |
| * i386-opc.h (enum): Add CpuPCONFIG. |
| (i386_cpu_flags): Add cpupconfig. |
| * i386-opc.tbl: Add PCONFIG instruction. |
| * i386-init.h: Regenerate. |
| * i386-tbl.h: Likewise. |
| |
| 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| |
| * i386-dis.c (enum): Add PREFIX_0F09. |
| * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS. |
| (cpu_flags): Add CpuWBNOINVD. |
| * i386-opc.h (enum): Add CpuWBNOINVD. |
| (i386_cpu_flags): Add cpuwbnoinvd. |
| * i386-opc.tbl: Add WBNOINVD instruction. |
| * i386-init.h: Regenerate. |
| * i386-tbl.h: Likewise. |
| |
| 2018-01-17 Jim Wilson <jimw@sifive.com> |
| |
| * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0. |
| |
| 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| |
| * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET. |
| Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS, |
| CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK. |
| (cpu_flags): Add CpuIBT, CpuSHSTK. |
| * i386-opc.h (enum): Add CpuIBT, CpuSHSTK. |
| (i386_cpu_flags): Add cpuibt, cpushstk. |
| * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT. |
| * i386-init.h: Regenerate. |
| * i386-tbl.h: Likewise. |
| |
| 2018-01-16 Nick Clifton <nickc@redhat.com> |
| |
| * po/pt_BR.po: Updated Brazilian Portugese translation. |
| * po/de.po: Updated German translation. |
| |
| 2018-01-15 Jim Wilson <jimw@sifive.com> |
| |
| * riscv-opc.c (match_c_nop): New. |
| (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop. |
| |
| 2018-01-15 Nick Clifton <nickc@redhat.com> |
| |
| * po/uk.po: Updated Ukranian translation. |
| |
| 2018-01-13 Nick Clifton <nickc@redhat.com> |
| |
| * po/opcodes.pot: Regenerated. |
| |
| 2018-01-13 Nick Clifton <nickc@redhat.com> |
| |
| * configure: Regenerate. |
| |
| 2018-01-13 Nick Clifton <nickc@redhat.com> |
| |
| 2.30 branch created. |
| |
| 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| |
| * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns. |
| * i386-tbl.h: Regenerate. |
| |
| 2018-01-10 Jan Beulich <jbeulich@suse.com> |
| |
| * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift. |
| * i386-tbl.h: Re-generate. |
| |
| 2018-01-10 Jan Beulich <jbeulich@suse.com> |
| |
| * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb, |
| vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub, |
| vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew, |
| vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw, |
| vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust |
| Disp8MemShift of AVX512VL forms. |
| * i386-tbl.h: Re-generate. |
| |
| 2018-01-09 Jim Wilson <jimw@sifive.com> |
| |
| * riscv-dis.c (maybe_print_address): If base_reg is zero, |
| then the hi_addr value is zero. |
| |
| 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
| |
| * arm-dis.c (arm_opcodes): Add csdb. |
| (thumb32_opcodes): Add csdb. |
| |
| 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
| |
| * aarch64-tbl.h (aarch64_opcode_table): Add "csdb". |
| * aarch64-asm-2.c: Regenerate. |
| * aarch64-dis-2.c: Regenerate. |
| * aarch64-opc-2.c: Regenerate. |
| |
| 2018-01-08 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR gas/22681 |
| * i386-opc.tbl: Properly encode vmovd with Qword memeory operand. |
| Remove AVX512 vmovd with 64-bit operands. |
| * i386-tbl.h: Regenerated. |
| |
| 2018-01-05 Jim Wilson <jimw@sifive.com> |
| |
| * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a |
| jalr. |
| |
| 2018-01-03 Alan Modra <amodra@gmail.com> |
| |
| Update year range in copyright notice of all files. |
| |
| 2018-01-02 Jan Beulich <jbeulich@suse.com> |
| |
| * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM |
| and OPERAND_TYPE_REGZMM entries. |
| |
| For older changes see ChangeLog-2017 |
| |
| Copyright (C) 2018 Free Software Foundation, Inc. |
| |
| Copying and distribution of this file, with or without modification, |
| are permitted in any medium without royalty provided the copyright |
| notice and this notice are preserved. |
| |
| Local Variables: |
| mode: change-log |
| left-margin: 8 |
| fill-column: 74 |
| version-control: never |
| End: |
