| #objdump: -d --prefix-addresses --show-raw-insn |
| #name: MIPS CP2 memory access instructions |
| #as: -32 |
| |
| .*: +file format .*mips.* |
| |
| Disassembly of section \.text: |
| [0-9a-f]+ <[^>]*> c8000000 lwc2 \$0,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8010000 lwc2 \$1,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8020000 lwc2 \$2,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8030000 lwc2 \$3,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8040000 lwc2 \$4,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8050000 lwc2 \$5,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8060000 lwc2 \$6,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8070000 lwc2 \$7,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8080000 lwc2 \$8,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8090000 lwc2 \$9,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80a0000 lwc2 \$10,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80b0000 lwc2 \$11,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80c0000 lwc2 \$12,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80d0000 lwc2 \$13,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80e0000 lwc2 \$14,0\(zero\) |
| [0-9a-f]+ <[^>]*> c80f0000 lwc2 \$15,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8100000 lwc2 \$16,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8110000 lwc2 \$17,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8120000 lwc2 \$18,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8130000 lwc2 \$19,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8140000 lwc2 \$20,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8150000 lwc2 \$21,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8160000 lwc2 \$22,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8170000 lwc2 \$23,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8180000 lwc2 \$24,0\(zero\) |
| [0-9a-f]+ <[^>]*> c8190000 lwc2 \$25,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81a0000 lwc2 \$26,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81b0000 lwc2 \$27,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81c0000 lwc2 \$28,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81d0000 lwc2 \$29,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81e0000 lwc2 \$30,0\(zero\) |
| [0-9a-f]+ <[^>]*> c81f0000 lwc2 \$31,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8000000 swc2 \$0,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8010000 swc2 \$1,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8020000 swc2 \$2,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8030000 swc2 \$3,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8040000 swc2 \$4,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8050000 swc2 \$5,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8060000 swc2 \$6,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8070000 swc2 \$7,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8080000 swc2 \$8,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8090000 swc2 \$9,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80a0000 swc2 \$10,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80b0000 swc2 \$11,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80c0000 swc2 \$12,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80d0000 swc2 \$13,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80e0000 swc2 \$14,0\(zero\) |
| [0-9a-f]+ <[^>]*> e80f0000 swc2 \$15,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8100000 swc2 \$16,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8110000 swc2 \$17,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8120000 swc2 \$18,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8130000 swc2 \$19,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8140000 swc2 \$20,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8150000 swc2 \$21,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8160000 swc2 \$22,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8170000 swc2 \$23,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8180000 swc2 \$24,0\(zero\) |
| [0-9a-f]+ <[^>]*> e8190000 swc2 \$25,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81a0000 swc2 \$26,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81b0000 swc2 \$27,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81c0000 swc2 \$28,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81d0000 swc2 \$29,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81e0000 swc2 \$30,0\(zero\) |
| [0-9a-f]+ <[^>]*> e81f0000 swc2 \$31,0\(zero\) |
| \.\.\. |
