| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vcadd.f64 q0,q1,q2,#90' |
| [^:]*:11: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#180' |
| [^:]*:12: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#0' |
| [^:]*:13: Warning: 32-bit element size and same first and third operand makes instruction UNPREDICTABLE |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90' |
| [^:]*:17: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90' |
| [^:]*:19: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90' |
| [^:]*:20: Error: vector predicated instruction should be in VPT/VPST block -- `vcaddt.f16 q0,q1,q2,#90' |
| [^:]*:22: Error: instruction missing MVE vector predication code -- `vcadd.f16 q0,q1,q2,#90' |
| |
