| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vcls.f32 q0,q1' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vcls.u32 q0,q1' |
| [^:]*:12: Error: bad type in SIMD instruction -- `vcls.32 q0,q1' |
| [^:]*:13: Error: bad type in SIMD instruction -- `vcls.i32 q0,q1' |
| [^:]*:14: Error: bad type in SIMD instruction -- `vcls.s64 q0,q1' |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Error: syntax error -- `vclseq.s16 q0,q1' |
| [^:]*:18: Error: syntax error -- `vclseq.s16 q0,q1' |
| [^:]*:20: Error: syntax error -- `vclseq.s16 q0,q1' |
| [^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vclst.s16 q0,q1' |
| [^:]*:23: Error: instruction missing MVE vector predication code -- `vcls.s16 q0,q1' |
