| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vhadd.i8 q0,q1,q2' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vhadd.s64 q0,q1,q2' |
| [^:]*:12: Error: bad type in SIMD instruction -- `vhadd.i8 q0,q1,r2' |
| [^:]*:13: Error: bad type in SIMD instruction -- `vhadd.s64 q0,q1,r2' |
| [^:]*:14: Error: bad type in SIMD instruction -- `vhsub.i16 q0,q1,q2' |
| [^:]*:15: Error: bad type in SIMD instruction -- `vhsub.u64 q0,q1,q2' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vhsub.i16 q0,q1,r2' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vhsub.u64 q0,q1,r2' |
| [^:]*:18: Error: bad type in SIMD instruction -- `vrhadd.i32 q0,q1,q2' |
| [^:]*:19: Error: bad type in SIMD instruction -- `vrhadd.s64 q0,q1,q2' |
| [^:]*:20: Warning: instruction is UNPREDICTABLE with SP operand |
| [^:]*:21: Warning: instruction is UNPREDICTABLE with PC operand |
| [^:]*:22: Warning: instruction is UNPREDICTABLE with SP operand |
| [^:]*:23: Warning: instruction is UNPREDICTABLE with PC operand |
| [^:]*:24: Error: garbage following instruction -- `vrhadd.s8 q0,q1,r2' |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:29: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:31: Error: syntax error -- `vhaddeq.s8 q0,q1,r2' |
| [^:]*:32: Error: syntax error -- `vhaddeq.s8 q0,q1,r2' |
| [^:]*:34: Error: syntax error -- `vhaddeq.s8 q0,q1,r2' |
| [^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vhaddt.s8 q0,q1,r2' |
| [^:]*:37: Error: instruction missing MVE vector predication code -- `vhadd.s8 q0,q1,r2' |
| [^:]*:39: Error: syntax error -- `vhaddeq.s8 q0,q1,q2' |
| [^:]*:40: Error: syntax error -- `vhaddeq.s8 q0,q1,q2' |
| [^:]*:42: Error: syntax error -- `vhaddeq.s8 q0,q1,q2' |
| [^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vhaddt.s8 q0,q1,q2' |
| [^:]*:45: Error: instruction missing MVE vector predication code -- `vhadd.s8 q0,q1,q2' |
| [^:]*:47: Error: syntax error -- `vhsubeq.s8 q0,q1,r2' |
| [^:]*:48: Error: syntax error -- `vhsubeq.s8 q0,q1,r2' |
| [^:]*:50: Error: syntax error -- `vhsubeq.s8 q0,q1,r2' |
| [^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vhsubt.s8 q0,q1,r2' |
| [^:]*:53: Error: instruction missing MVE vector predication code -- `vhsub.s8 q0,q1,r2' |
| [^:]*:55: Error: syntax error -- `vhsubeq.s8 q0,q1,q2' |
| [^:]*:56: Error: syntax error -- `vhsubeq.s8 q0,q1,q2' |
| [^:]*:58: Error: syntax error -- `vhsubeq.s8 q0,q1,q2' |
| [^:]*:59: Error: vector predicated instruction should be in VPT/VPST block -- `vhsubt.s8 q0,q1,q2' |
| [^:]*:61: Error: instruction missing MVE vector predication code -- `vhsub.s8 q0,q1,q2' |
| [^:]*:63: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2' |
| [^:]*:64: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2' |
| [^:]*:66: Error: syntax error -- `vrhaddeq.s8 q0,q1,q2' |
| [^:]*:67: Error: vector predicated instruction should be in VPT/VPST block -- `vrhaddt.s8 q0,q1,q2' |
| [^:]*:69: Error: instruction missing MVE vector predication code -- `vrhadd.s8 q0,q1,q2' |