blob: 3a06f32f636331a73ae150a5a62bd51b4360122d [file] [log] [blame]
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmlas.s64 q0,q1,r2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmlas.f32 q0,q1,r2'
[^:]*:12: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:13: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'
[^:]*:17: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'
[^:]*:19: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'
[^:]*:20: Error: vector predicated instruction should be in VPT/VPST block -- `vmlast.s16 q0,q1,r2'
[^:]*:22: Error: instruction missing MVE vector predication code -- `vmlas.s16 q0,q1,r2'