| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vsbc.i16 q0,q1,q2' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vsbci.i16 q0,q1,q2' |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Error: syntax error -- `vsbceq.i32 q0,q1,q2' |
| [^:]*:16: Error: syntax error -- `vsbceq.i32 q0,q1,q2' |
| [^:]*:18: Error: syntax error -- `vsbceq.i32 q0,q1,q2' |
| [^:]*:20: Error: instruction missing MVE vector predication code -- `vsbc.i32 q0,q1,q2' |
| [^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vsbct.i32 q0,q1,q2' |
| [^:]*:23: Error: syntax error -- `vsbcieq.i32 q0,q1,q2' |
| [^:]*:24: Error: syntax error -- `vsbcieq.i32 q0,q1,q2' |
| [^:]*:26: Error: syntax error -- `vsbcieq.i32 q0,q1,q2' |
| [^:]*:28: Error: instruction missing MVE vector predication code -- `vsbci.i32 q0,q1,q2' |
| [^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vsbcit.i32 q0,q1,q2' |
