| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vshllt.s32 q0,q1,#1' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vshllt.i8 q0,q1,#1' |
| [^:]*:12: Error: immediate value out of range -- `vshllt.u8 q0,q1,#0' |
| [^:]*:13: Error: immediate value out of range -- `vshllt.u8 q0,q1,#9' |
| [^:]*:14: Error: immediate value out of range -- `vshllt.s16 q0,q1,#0' |
| [^:]*:15: Error: immediate value out of range -- `vshllt.s16 q0,q1,#17' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vshllb.s32 q0,q1,#1' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vshllb.i8 q0,q1,#1' |
| [^:]*:18: Error: immediate value out of range -- `vshllb.u8 q0,q1,#0' |
| [^:]*:19: Error: immediate value out of range -- `vshllb.u8 q0,q1,#9' |
| [^:]*:20: Error: immediate value out of range -- `vshllb.s16 q0,q1,#0' |
| [^:]*:21: Error: immediate value out of range -- `vshllb.s16 q0,q1,#17' |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:25: Error: syntax error -- `vshllteq.s8 q0,q1,#1' |
| [^:]*:26: Error: syntax error -- `vshllteq.s8 q0,q1,#1' |
| [^:]*:28: Error: syntax error -- `vshllteq.s8 q0,q1,#1' |
| [^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vshlltt.s8 q0,q1,#1' |
| [^:]*:31: Error: instruction missing MVE vector predication code -- `vshllt.s8 q0,q1,#1' |
| [^:]*:33: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' |
| [^:]*:34: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' |
| [^:]*:36: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' |
| [^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vshllbt.s8 q0,q1,#1' |
| [^:]*:39: Error: instruction missing MVE vector predication code -- `vshllb.s8 q0,q1,#1' |
