| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vqdmlsdh.u32 q0,q1,q2' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vqdmlsdh.s64 q0,q1,q2' |
| [^:]*:12: Error: bad type in SIMD instruction -- `vqdmlsdhx.u32 q0,q1,q2' |
| [^:]*:13: Error: bad type in SIMD instruction -- `vqdmlsdhx.s64 q0,q1,q2' |
| [^:]*:14: Error: bad type in SIMD instruction -- `vqrdmlsdh.u32 q0,q1,q2' |
| [^:]*:15: Error: bad type in SIMD instruction -- `vqrdmlsdh.s64 q0,q1,q2' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vqrdmlsdhx.u32 q0,q1,q2' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vqrdmlsdhx.s64 q0,q1,q2' |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:23: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2' |
| [^:]*:24: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2' |
| [^:]*:26: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2' |
| [^:]*:27: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmlsdht.s32 q0,q1,q2' |
| [^:]*:29: Error: instruction missing MVE vector predication code -- `vqdmlsdh.s32 q0,q1,q2' |
| [^:]*:31: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:32: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:34: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmlsdhxt.s32 q0,q1,q2' |
| [^:]*:37: Error: instruction missing MVE vector predication code -- `vqdmlsdhx.s32 q0,q1,q2' |
| [^:]*:39: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2' |
| [^:]*:40: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2' |
| [^:]*:42: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2' |
| [^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmlsdht.s32 q0,q1,q2' |
| [^:]*:45: Error: instruction missing MVE vector predication code -- `vqrdmlsdh.s32 q0,q1,q2' |
| [^:]*:47: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:48: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:50: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2' |
| [^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmlsdhxt.s32 q0,q1,q2' |
| [^:]*:53: Error: instruction missing MVE vector predication code -- `vqrdmlsdhx.s32 q0,q1,q2' |