blob: f5b2426c18d63a0e74e57145b7e0a919cfb2e1f3 [file] [log] [blame]
@c Copyright (C) 2014-2021 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c man end
@ifset GENERIC
@node Visium-Dependent
@chapter Visium Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter Visium Dependent Features
@end ifclear
@cindex Visium support
* Visium Options:: Options
* Visium Syntax:: Syntax
* Visium Opcodes:: Opcodes
@end menu
@node Visium Options
@section Options
@cindex Visium options
@cindex options for Visium
The Visium assembler implements one machine-specific option:
@c man begin OPTIONS
@table @gcctabopt
@cindex @code{-mtune=@var{arch}} command-line option, Visium
@item -mtune=@var{arch}
This option specifies the target architecture. If an attempt is made to
assemble an instruction that will not execute on the target architecture,
the assembler will issue an error message.
The following names are recognized:
@end table
@c man end
@node Visium Syntax
@section Syntax
* Visium Characters:: Special Characters
* Visium Registers:: Register Names
@end menu
@node Visium Characters
@subsection Special Characters
@cindex line comment character, Visium
@cindex Visium line comment character
Line comments are introduced either by the @samp{!} character or by the
@samp{;} character appearing anywhere on a line.
A hash character (@samp{#}) as the first character on a line also
marks the start of a line comment, but in this case it could also be a
logical line number directive (@pxref{Comments}) or a preprocessor
control command (@pxref{Preprocessing}).
@cindex line separator, Visium
@cindex statement separator, Visium
@cindex Visium line separator
The Visium assembler does not currently support a line separator character.
@node Visium Registers
@subsection Register Names
@cindex Visium registers
@cindex register names, Visium
Registers can be specified either by using their canonical mnemonic names
or by using their alias if they have one, for example @samp{sp}.
@node Visium Opcodes
@section Opcodes
All the standard opcodes of the architecture are implemented, along with the
following three pseudo-instructions: @code{cmp}, @code{cmpc}, @code{move}.
In addition, the following two illegal opcodes are implemented and used by the simulation:
stop 5-bit immediate, SourceA
trace 5-bit immediate, SourceA
@end example