| [^ :]+: Assembler messages: |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1 p0,r0,#8192' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1a p0,r0,#8192' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1 p0,r0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1a p0,r0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx1 p8,r0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx1a p8,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1 p0,r16,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1a p0,r16,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx1 p0,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx1a p0,r13,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx1 p0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1ne p0,r0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx1a p0,r0,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx1aeq p0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx1 p1,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx1a p1,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx1 p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx1a p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1 p0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1a p0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx1 p0,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx1a p0,r15,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1d p0,r0,r1,#8192' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1da p0,r0,r1,#8192' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1d p0,r0,r1,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx1da p0,r0,r1,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx1d p8,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx1da p8,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx1d p0,r16,r17,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx1da p0,r16,r17,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx1d p0,APSR_nzcv,r15,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx1da p0,APSR_nzcv,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx1d p0,r9,r10,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx1da p0,r9,r10,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx1d p0,r13,r14,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx1da p0,r13,r14,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx1d p0,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx1da p0,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1dne p0,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx1daeq p0,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx1d p1,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx1da p1,r0,r1,#0' |
| [^ :]+:[0-9]+: Error: cx1d requires consecutive destination registers\. -- `cx1d p0,r0,r2,#0' |
| [^ :]+:[0-9]+: Error: cx1d requires consecutive destination registers\. -- `cx1da p0,r0,r2,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx1d p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx1da p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1d p0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx1da p0,r0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2 p0,r0,r0,#512' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2a p0,r0,r0,#512' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2 p0,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2a p0,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx2 p8,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx2a p8,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2 p0,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2a p0,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2 p0,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2a p0,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2 p0,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2a p0,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2 p0,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2a p0,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx2 p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx2a p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2ne p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx2aeq p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx2 p1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx2a p1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx2 p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx2a p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2 p0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2a p0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2 p0,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2a p0,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2 p0,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2a p0,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2d p0,r0,r1,r0,#512' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2da p0,r0,r1,r0,#512' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2d p0,r0,r1,r0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx2da p0,r0,r1,r0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx2d p8,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx2da p8,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx2d p0,r16,r17,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx2da p0,r16,r17,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2d p0,r0,r1,r16,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2da p0,r0,r1,r16,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx2d p0,APSR_nzcv,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx2da p0,APSR_nzcv,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx2d p0,r9,r10,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx2da p0,r9,r10,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx2d p0,r12,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx2da p0,r12,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2d p0,r0,r1,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2da p0,r0,r1,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2d p0,r0,r1,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx2da p0,r0,r1,r15,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx2d p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx2da p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2dne p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx2daeq p0,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx2d p1,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx2da p1,r0,r1,r0,#0' |
| [^ :]+:[0-9]+: Error: cx2d requires consecutive destination registers\. -- `cx2d p0,r0,r2,r0,#0' |
| [^ :]+:[0-9]+: Error: cx2d requires consecutive destination registers\. -- `cx2da p0,r0,r2,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx2d p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx2da p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2d p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx2da p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3 p0,r0,r0,r0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3a p0,r0,r0,r0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3 p0,r0,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3a p0,r0,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx3 p8,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx3a p8,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3 p0,r16,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3a p0,r16,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3 p0,r0,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3a p0,r0,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3 p0,r0,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3a p0,r0,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r13,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r13,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r0,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r0,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r0,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r0,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx3 p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx3a p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3ne p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx3aeq p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx3 p1,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx3a p1,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx3 p0,r0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx3a p0,r0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3 p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3a p0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r15,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r15,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r0,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r0,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3 p0,r0,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3a p0,r0,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3d p0,r0,r1,r0,r0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3da p0,r0,r1,r0,r0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3d p0,r0,r1,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `cx3da p0,r0,r1,r0,r0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx3d p8,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `cx3da p8,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx3d p0,r16,r17,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx3da p0,r16,r17,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3d p0,r0,r1,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3da p0,r0,r1,r16,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3d p0,r0,r1,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3da p0,r0,r1,r0,r16,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx3d p0,APSR_nzcv,r15,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: ARM register expected -- `cx3da p0,APSR_nzcv,r15,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx3d p0,r9,r10,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx3da p0,r9,r10,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx3d p0,r12,r13,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be an even register between r0-r10\. -- `cx3da p0,r12,r13,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3d p0,r0,r1,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3da p0,r0,r1,r13,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3d p0,r0,r1,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3da p0,r0,r1,r0,r13,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3d p0,r0,r1,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3da p0,r0,r1,r15,r0,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3d p0,r0,r1,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: Register must be r0-r14 except r13, or APSR_nzcv\. -- `cx3da p0,r0,r1,r0,r15,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx3d p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `cx3da p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3dne p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: incorrect condition in IT block -- `cx3daeq p0,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx3d p1,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `cx3da p1,r0,r1,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: cx3d requires consecutive destination registers\. -- `cx3d p0,r0,r2,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: cx3d requires consecutive destination registers\. -- `cx3da p0,r0,r2,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx3d p0,r0,r1,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `cx3da p0,r0,r1,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3d p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: syntax error -- `cx3da p0,r0,r0,r0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1 p0,q0,#4096' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1a p0,q0,#4096' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1 p0,q0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1a p0,q0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1 p8,q0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1a p8,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx1 p0,q8,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx1a p0,q8,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx1ne p0,q0,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx1ane p0,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1 p1,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1a p1,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1 p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1a p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,#0' |
| [^ :]+:[0-9]+: Error: vcx1 with S or D registers takes immediate within 0-2047 -- `vcx1 p0,d0,#2048' |
| [^ :]+:[0-9]+: Error: vcx1 with S or D registers takes immediate within 0-2047 -- `vcx1a p0,d0,#2048' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1 p0,d0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1a p0,d0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1 p8,d0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1a p8,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx1 p0,d16,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx1a p0,d16,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1 p0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1ne p0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1a p0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1ane p0,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1 p1,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1a p1,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1 p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1a p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,#0' |
| [^ :]+:[0-9]+: Error: vcx1 with S or D registers takes immediate within 0-2047 -- `vcx1 p0,s0,#2048' |
| [^ :]+:[0-9]+: Error: vcx1 with S or D registers takes immediate within 0-2047 -- `vcx1a p0,s0,#2048' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1 p0,s0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx1a p0,s0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1 p8,s0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx1a p8,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,s32,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,s32,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1 p0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1ne p0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1a p0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx1ane p0,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1 p1,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx1a p1,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1 p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx1a p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2 p0,q0,q0,#128' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2a p0,q0,q0,#128' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2 p0,q0,q0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2a p0,q0,q0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2 p8,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2a p8,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx2 p0,q8,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx2a p0,q8,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx2 p0,q0,q8,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx2a p0,q0,q8,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx2ne p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx2ane p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2 p1,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2a p1,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2 p0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2a p0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2 p0,q0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2a p0,q0,#0' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-63 -- `vcx2 p0,d0,d0,#64' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-63 -- `vcx2a p0,d0,d0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2 p0,d0,d0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2a p0,d0,d0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2 p8,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2a p8,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx2 p0,d16,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx2a p0,d16,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx2 p0,d0,d16,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx2a p0,d0,d16,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2 p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2ne p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2a p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2ane p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2 p1,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2a p1,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2 p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2a p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2 p0,d0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2a p0,d0,#0' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-63 -- `vcx2 p0,s0,s0,#64' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-63 -- `vcx2a p0,s0,s0,#64' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2 p0,s0,s0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx2a p0,s0,s0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2 p8,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx2a p8,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2 p0,s32,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2a p0,s32,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2 p0,s0,s32,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2a p0,s0,s32,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2 p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2ne p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2a p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx2ane p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2 p1,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx2a p1,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2 p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx2a p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2 p0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx2a p0,s0,#0' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3 p0,q0,q0,q0,#16' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3a p0,q0,q0,q0,#16' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3 p0,q0,q0,q0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3a p0,q0,q0,q0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3 p8,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3a p8,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3 p0,q8,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3a p0,q8,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3 p0,q8,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3a p0,q0,q8,q0,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3 p0,q0,q0,q8,#0' |
| [^ :]+:[0-9]+: Error: expected MVE register \[q0\.\.q7\] -- `vcx3a p0,q0,q0,q8,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx3ne p0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Warning: instruction is UNPREDICTABLE in an IT block |
| [^ :]+:[0-9]+: Error: syntax error -- `vcx3ane p0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3 p1,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3a p1,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3 p0,q0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3a p0,q0,q0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,q0,q0,#0' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-7 -- `vcx3 p0,d0,d0,d0,#8' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-7 -- `vcx3a p0,d0,d0,d0,#8' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3 p0,d0,d0,d0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3a p0,d0,d0,d0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3 p8,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3a p8,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3 p0,d16,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3a p0,d16,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3 p0,d0,d16,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3a p0,d0,d16,d0,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3 p0,d0,d0,d16,#0' |
| [^ :]+:[0-9]+: Error: 'd' register must be in range 0-15 -- `vcx3a p0,d0,d0,d16,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3 p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3ne p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3a p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3ane p0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3 p1,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3a p1,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3 p0,d0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3a p0,d0,d0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,d0,d0,#0' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-7 -- `vcx3 p0,s0,s0,s0,#8' |
| [^ :]+:[0-9]+: Error: vcx2 with S or D registers takes immediate within 0-7 -- `vcx3a p0,s0,s0,s0,#8' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3 p0,s0,s0,s0,#-1' |
| [^ :]+:[0-9]+: Error: immediate value out of range -- `vcx3a p0,s0,s0,s0,#-1' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3 p8,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: CDE Coprocessor must be in range 0-7 -- `vcx3a p8,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,s32,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,s32,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,s0,s32,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,s0,s32,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,s0,s0,s32,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,s0,s0,s32,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3 p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3ne p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3a p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: instruction not allowed in IT block -- `vcx3ane p0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3 p1,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: coprocessor for insn is not enabled for cde -- `vcx3a p1,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3 p0,s0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: constant expression required -- `vcx3a p0,s0,s0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3 p0,s0,s0,#0' |
| [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx3a p0,s0,s0,#0' |
