| .*: Assembler messages: |
| .*: immediate value out of range -- `asrl r2,r3,#0' |
| .*: immediate value out of range -- `asrl r2,r3,#33' |
| .*: Error: Odd register not allowed here -- `asrl r1,r3,r5' |
| .*: Error: Even register not allowed here -- `lsll r2,r4,#5' |
| .*: Error: r15 not allowed here -- `lsll r2,r15,r5' |
| .*: Warning: instruction is UNPREDICTABLE with SP operand |
| .*: Error: registers may not be the same -- `sqrshrl r2,r3,#64,r3' |
| .*: Error: registers may not be the same -- `sqrshrl r2,r3,#48,r3' |
| .*: Error: constant expression required -- `sqrshrl r2,r3,r3' |
| .*: Error: immediate value 48 or 64 expected -- `sqrshrl r2,r3,#40,r3' |
| .*: Error: registers may not be the same -- `sqrshr r2,r2' |
| .*: Error: registers may not be the same -- `uqrshll r2,r3,#64,r2' |
| .*: Error: registers may not be the same -- `uqrshll r2,r3,#48,r2' |
| .*: Error: constant expression required -- `uqrshll r2,r3,r2' |
| .*: Error: immediate value 48 or 64 expected -- `uqrshll r2,r3,#40,r2' |
| .*: Error: thumb conditional instruction should be in IT block -- `uqshlgt r2,#32' |
| .*: Error: constant expression required -- `urshrlle r2,r3,r5' |
