| [^:]*: Assembler messages: |
| [^:]*:13: Error: bad type in SIMD instruction -- `vabs.p8 q0,q1' |
| [^:]*:14: Error: bad type in SIMD instruction -- `vabs.p16 q0,q1' |
| [^:]*:15: Error: bad type in SIMD instruction -- `vabs.u8 q0,q1' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vabs.u16 q0,q1' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vabs.u32 q0,q1' |
| [^:]*:18: Error: selected FPU does not support instruction -- `vabs.f16 q0,q1' |
| [^:]*:19: Error: selected FPU does not support instruction -- `vabs.f32 q0,q1' |
| [^:]*:20: Error: bad type in SIMD instruction -- `vabs.s64 q0,q1' |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:22: Error: bad type in SIMD instruction -- `vneg.p8 q0,q1' |
| [^:]*:23: Error: bad type in SIMD instruction -- `vneg.p16 q0,q1' |
| [^:]*:24: Error: bad type in SIMD instruction -- `vneg.u8 q0,q1' |
| [^:]*:25: Error: bad type in SIMD instruction -- `vneg.u16 q0,q1' |
| [^:]*:26: Error: bad type in SIMD instruction -- `vneg.u32 q0,q1' |
| [^:]*:27: Error: selected FPU does not support instruction -- `vneg.f16 q0,q1' |
| [^:]*:28: Error: selected FPU does not support instruction -- `vneg.f32 q0,q1' |
| [^:]*:29: Error: bad type in SIMD instruction -- `vneg.s64 q0,q1' |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:30: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:32: Error: syntax error -- `vnegeq.s32 q0,q1' |
| [^:]*:33: Error: syntax error -- `vnegeq.s32 q0,q1' |
| [^:]*:35: Error: instruction missing MVE vector predication code -- `vneg.s32 q0,q1' |
| [^:]*:36: Error: vector predicated instruction should be in VPT/VPST block -- `vnegt.s32 q0,q1' |
