| # name: MVE vaddlv instructions |
| # as: -march=armv8.1-m.main+mve.fp |
| # objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main |
| |
| .*: +file format .*arm.* |
| |
| Disassembly of section .text: |
| [^>]*> ee89 0f00 vaddlv.s32 r0, r1, q0 |
| [^>]*> ee89 0f20 vaddlva.s32 r0, r1, q0 |
| [^>]*> ee89 0f02 vaddlv.s32 r0, r1, q1 |
| [^>]*> ee89 0f22 vaddlva.s32 r0, r1, q1 |
| [^>]*> ee89 0f04 vaddlv.s32 r0, r1, q2 |
| [^>]*> ee89 0f24 vaddlva.s32 r0, r1, q2 |
| [^>]*> ee89 0f08 vaddlv.s32 r0, r1, q4 |
| [^>]*> ee89 0f28 vaddlva.s32 r0, r1, q4 |
| [^>]*> ee89 0f0e vaddlv.s32 r0, r1, q7 |
| [^>]*> ee89 0f2e vaddlva.s32 r0, r1, q7 |
| [^>]*> ee99 0f00 vaddlv.s32 r0, r3, q0 |
| [^>]*> ee99 0f20 vaddlva.s32 r0, r3, q0 |
| [^>]*> ee99 0f02 vaddlv.s32 r0, r3, q1 |
| [^>]*> ee99 0f22 vaddlva.s32 r0, r3, q1 |
| [^>]*> ee99 0f04 vaddlv.s32 r0, r3, q2 |
| [^>]*> ee99 0f24 vaddlva.s32 r0, r3, q2 |
| [^>]*> ee99 0f08 vaddlv.s32 r0, r3, q4 |
| [^>]*> ee99 0f28 vaddlva.s32 r0, r3, q4 |
| [^>]*> ee99 0f0e vaddlv.s32 r0, r3, q7 |
| [^>]*> ee99 0f2e vaddlva.s32 r0, r3, q7 |
| [^>]*> eea9 0f00 vaddlv.s32 r0, r5, q0 |
| [^>]*> eea9 0f20 vaddlva.s32 r0, r5, q0 |
| [^>]*> eea9 0f02 vaddlv.s32 r0, r5, q1 |
| [^>]*> eea9 0f22 vaddlva.s32 r0, r5, q1 |
| [^>]*> eea9 0f04 vaddlv.s32 r0, r5, q2 |
| [^>]*> eea9 0f24 vaddlva.s32 r0, r5, q2 |
| [^>]*> eea9 0f08 vaddlv.s32 r0, r5, q4 |
| [^>]*> eea9 0f28 vaddlva.s32 r0, r5, q4 |
| [^>]*> eea9 0f0e vaddlv.s32 r0, r5, q7 |
| [^>]*> eea9 0f2e vaddlva.s32 r0, r5, q7 |
| [^>]*> eeb9 0f00 vaddlv.s32 r0, r7, q0 |
| [^>]*> eeb9 0f20 vaddlva.s32 r0, r7, q0 |
| [^>]*> eeb9 0f02 vaddlv.s32 r0, r7, q1 |
| [^>]*> eeb9 0f22 vaddlva.s32 r0, r7, q1 |
| [^>]*> eeb9 0f04 vaddlv.s32 r0, r7, q2 |
| [^>]*> eeb9 0f24 vaddlva.s32 r0, r7, q2 |
| [^>]*> eeb9 0f08 vaddlv.s32 r0, r7, q4 |
| [^>]*> eeb9 0f28 vaddlva.s32 r0, r7, q4 |
| [^>]*> eeb9 0f0e vaddlv.s32 r0, r7, q7 |
| [^>]*> eeb9 0f2e vaddlva.s32 r0, r7, q7 |
| [^>]*> eec9 0f00 vaddlv.s32 r0, r9, q0 |
| [^>]*> eec9 0f20 vaddlva.s32 r0, r9, q0 |
| [^>]*> eec9 0f02 vaddlv.s32 r0, r9, q1 |
| [^>]*> eec9 0f22 vaddlva.s32 r0, r9, q1 |
| [^>]*> eec9 0f04 vaddlv.s32 r0, r9, q2 |
| [^>]*> eec9 0f24 vaddlva.s32 r0, r9, q2 |
| [^>]*> eec9 0f08 vaddlv.s32 r0, r9, q4 |
| [^>]*> eec9 0f28 vaddlva.s32 r0, r9, q4 |
| [^>]*> eec9 0f0e vaddlv.s32 r0, r9, q7 |
| [^>]*> eec9 0f2e vaddlva.s32 r0, r9, q7 |
| [^>]*> eed9 0f00 vaddlv.s32 r0, fp, q0 |
| [^>]*> eed9 0f20 vaddlva.s32 r0, fp, q0 |
| [^>]*> eed9 0f02 vaddlv.s32 r0, fp, q1 |
| [^>]*> eed9 0f22 vaddlva.s32 r0, fp, q1 |
| [^>]*> eed9 0f04 vaddlv.s32 r0, fp, q2 |
| [^>]*> eed9 0f24 vaddlva.s32 r0, fp, q2 |
| [^>]*> eed9 0f08 vaddlv.s32 r0, fp, q4 |
| [^>]*> eed9 0f28 vaddlva.s32 r0, fp, q4 |
| [^>]*> eed9 0f0e vaddlv.s32 r0, fp, q7 |
| [^>]*> eed9 0f2e vaddlva.s32 r0, fp, q7 |
| [^>]*> ee89 2f00 vaddlv.s32 r2, r1, q0 |
| [^>]*> ee89 2f20 vaddlva.s32 r2, r1, q0 |
| [^>]*> ee89 2f02 vaddlv.s32 r2, r1, q1 |
| [^>]*> ee89 2f22 vaddlva.s32 r2, r1, q1 |
| [^>]*> ee89 2f04 vaddlv.s32 r2, r1, q2 |
| [^>]*> ee89 2f24 vaddlva.s32 r2, r1, q2 |
| [^>]*> ee89 2f08 vaddlv.s32 r2, r1, q4 |
| [^>]*> ee89 2f28 vaddlva.s32 r2, r1, q4 |
| [^>]*> ee89 2f0e vaddlv.s32 r2, r1, q7 |
| [^>]*> ee89 2f2e vaddlva.s32 r2, r1, q7 |
| [^>]*> ee99 2f00 vaddlv.s32 r2, r3, q0 |
| [^>]*> ee99 2f20 vaddlva.s32 r2, r3, q0 |
| [^>]*> ee99 2f02 vaddlv.s32 r2, r3, q1 |
| [^>]*> ee99 2f22 vaddlva.s32 r2, r3, q1 |
| [^>]*> ee99 2f04 vaddlv.s32 r2, r3, q2 |
| [^>]*> ee99 2f24 vaddlva.s32 r2, r3, q2 |
| [^>]*> ee99 2f08 vaddlv.s32 r2, r3, q4 |
| [^>]*> ee99 2f28 vaddlva.s32 r2, r3, q4 |
| [^>]*> ee99 2f0e vaddlv.s32 r2, r3, q7 |
| [^>]*> ee99 2f2e vaddlva.s32 r2, r3, q7 |
| [^>]*> eea9 2f00 vaddlv.s32 r2, r5, q0 |
| [^>]*> eea9 2f20 vaddlva.s32 r2, r5, q0 |
| [^>]*> eea9 2f02 vaddlv.s32 r2, r5, q1 |
| [^>]*> eea9 2f22 vaddlva.s32 r2, r5, q1 |
| [^>]*> eea9 2f04 vaddlv.s32 r2, r5, q2 |
| [^>]*> eea9 2f24 vaddlva.s32 r2, r5, q2 |
| [^>]*> eea9 2f08 vaddlv.s32 r2, r5, q4 |
| [^>]*> eea9 2f28 vaddlva.s32 r2, r5, q4 |
| [^>]*> eea9 2f0e vaddlv.s32 r2, r5, q7 |
| [^>]*> eea9 2f2e vaddlva.s32 r2, r5, q7 |
| [^>]*> eeb9 2f00 vaddlv.s32 r2, r7, q0 |
| [^>]*> eeb9 2f20 vaddlva.s32 r2, r7, q0 |
| [^>]*> eeb9 2f02 vaddlv.s32 r2, r7, q1 |
| [^>]*> eeb9 2f22 vaddlva.s32 r2, r7, q1 |
| [^>]*> eeb9 2f04 vaddlv.s32 r2, r7, q2 |
| [^>]*> eeb9 2f24 vaddlva.s32 r2, r7, q2 |
| [^>]*> eeb9 2f08 vaddlv.s32 r2, r7, q4 |
| [^>]*> eeb9 2f28 vaddlva.s32 r2, r7, q4 |
| [^>]*> eeb9 2f0e vaddlv.s32 r2, r7, q7 |
| [^>]*> eeb9 2f2e vaddlva.s32 r2, r7, q7 |
| [^>]*> eec9 2f00 vaddlv.s32 r2, r9, q0 |
| [^>]*> eec9 2f20 vaddlva.s32 r2, r9, q0 |
| [^>]*> eec9 2f02 vaddlv.s32 r2, r9, q1 |
| [^>]*> eec9 2f22 vaddlva.s32 r2, r9, q1 |
| [^>]*> eec9 2f04 vaddlv.s32 r2, r9, q2 |
| [^>]*> eec9 2f24 vaddlva.s32 r2, r9, q2 |
| [^>]*> eec9 2f08 vaddlv.s32 r2, r9, q4 |
| [^>]*> eec9 2f28 vaddlva.s32 r2, r9, q4 |
| [^>]*> eec9 2f0e vaddlv.s32 r2, r9, q7 |
| [^>]*> eec9 2f2e vaddlva.s32 r2, r9, q7 |
| [^>]*> eed9 2f00 vaddlv.s32 r2, fp, q0 |
| [^>]*> eed9 2f20 vaddlva.s32 r2, fp, q0 |
| [^>]*> eed9 2f02 vaddlv.s32 r2, fp, q1 |
| [^>]*> eed9 2f22 vaddlva.s32 r2, fp, q1 |
| [^>]*> eed9 2f04 vaddlv.s32 r2, fp, q2 |
| [^>]*> eed9 2f24 vaddlva.s32 r2, fp, q2 |
| [^>]*> eed9 2f08 vaddlv.s32 r2, fp, q4 |
| [^>]*> eed9 2f28 vaddlva.s32 r2, fp, q4 |
| [^>]*> eed9 2f0e vaddlv.s32 r2, fp, q7 |
| [^>]*> eed9 2f2e vaddlva.s32 r2, fp, q7 |
| [^>]*> ee89 4f00 vaddlv.s32 r4, r1, q0 |
| [^>]*> ee89 4f20 vaddlva.s32 r4, r1, q0 |
| [^>]*> ee89 4f02 vaddlv.s32 r4, r1, q1 |
| [^>]*> ee89 4f22 vaddlva.s32 r4, r1, q1 |
| [^>]*> ee89 4f04 vaddlv.s32 r4, r1, q2 |
| [^>]*> ee89 4f24 vaddlva.s32 r4, r1, q2 |
| [^>]*> ee89 4f08 vaddlv.s32 r4, r1, q4 |
| [^>]*> ee89 4f28 vaddlva.s32 r4, r1, q4 |
| [^>]*> ee89 4f0e vaddlv.s32 r4, r1, q7 |
| [^>]*> ee89 4f2e vaddlva.s32 r4, r1, q7 |
| [^>]*> ee99 4f00 vaddlv.s32 r4, r3, q0 |
| [^>]*> ee99 4f20 vaddlva.s32 r4, r3, q0 |
| [^>]*> ee99 4f02 vaddlv.s32 r4, r3, q1 |
| [^>]*> ee99 4f22 vaddlva.s32 r4, r3, q1 |
| [^>]*> ee99 4f04 vaddlv.s32 r4, r3, q2 |
| [^>]*> ee99 4f24 vaddlva.s32 r4, r3, q2 |
| [^>]*> ee99 4f08 vaddlv.s32 r4, r3, q4 |
| [^>]*> ee99 4f28 vaddlva.s32 r4, r3, q4 |
| [^>]*> ee99 4f0e vaddlv.s32 r4, r3, q7 |
| [^>]*> ee99 4f2e vaddlva.s32 r4, r3, q7 |
| [^>]*> eea9 4f00 vaddlv.s32 r4, r5, q0 |
| [^>]*> eea9 4f20 vaddlva.s32 r4, r5, q0 |
| [^>]*> eea9 4f02 vaddlv.s32 r4, r5, q1 |
| [^>]*> eea9 4f22 vaddlva.s32 r4, r5, q1 |
| [^>]*> eea9 4f04 vaddlv.s32 r4, r5, q2 |
| [^>]*> eea9 4f24 vaddlva.s32 r4, r5, q2 |
| [^>]*> eea9 4f08 vaddlv.s32 r4, r5, q4 |
| [^>]*> eea9 4f28 vaddlva.s32 r4, r5, q4 |
| [^>]*> eea9 4f0e vaddlv.s32 r4, r5, q7 |
| [^>]*> eea9 4f2e vaddlva.s32 r4, r5, q7 |
| [^>]*> eeb9 4f00 vaddlv.s32 r4, r7, q0 |
| [^>]*> eeb9 4f20 vaddlva.s32 r4, r7, q0 |
| [^>]*> eeb9 4f02 vaddlv.s32 r4, r7, q1 |
| [^>]*> eeb9 4f22 vaddlva.s32 r4, r7, q1 |
| [^>]*> eeb9 4f04 vaddlv.s32 r4, r7, q2 |
| [^>]*> eeb9 4f24 vaddlva.s32 r4, r7, q2 |
| [^>]*> eeb9 4f08 vaddlv.s32 r4, r7, q4 |
| [^>]*> eeb9 4f28 vaddlva.s32 r4, r7, q4 |
| [^>]*> eeb9 4f0e vaddlv.s32 r4, r7, q7 |
| [^>]*> eeb9 4f2e vaddlva.s32 r4, r7, q7 |
| [^>]*> eec9 4f00 vaddlv.s32 r4, r9, q0 |
| [^>]*> eec9 4f20 vaddlva.s32 r4, r9, q0 |
| [^>]*> eec9 4f02 vaddlv.s32 r4, r9, q1 |
| [^>]*> eec9 4f22 vaddlva.s32 r4, r9, q1 |
| [^>]*> eec9 4f04 vaddlv.s32 r4, r9, q2 |
| [^>]*> eec9 4f24 vaddlva.s32 r4, r9, q2 |
| [^>]*> eec9 4f08 vaddlv.s32 r4, r9, q4 |
| [^>]*> eec9 4f28 vaddlva.s32 r4, r9, q4 |
| [^>]*> eec9 4f0e vaddlv.s32 r4, r9, q7 |
| [^>]*> eec9 4f2e vaddlva.s32 r4, r9, q7 |
| [^>]*> eed9 4f00 vaddlv.s32 r4, fp, q0 |
| [^>]*> eed9 4f20 vaddlva.s32 r4, fp, q0 |
| [^>]*> eed9 4f02 vaddlv.s32 r4, fp, q1 |
| [^>]*> eed9 4f22 vaddlva.s32 r4, fp, q1 |
| [^>]*> eed9 4f04 vaddlv.s32 r4, fp, q2 |
| [^>]*> eed9 4f24 vaddlva.s32 r4, fp, q2 |
| [^>]*> eed9 4f08 vaddlv.s32 r4, fp, q4 |
| [^>]*> eed9 4f28 vaddlva.s32 r4, fp, q4 |
| [^>]*> eed9 4f0e vaddlv.s32 r4, fp, q7 |
| [^>]*> eed9 4f2e vaddlva.s32 r4, fp, q7 |
| [^>]*> ee89 8f00 vaddlv.s32 r8, r1, q0 |
| [^>]*> ee89 8f20 vaddlva.s32 r8, r1, q0 |
| [^>]*> ee89 8f02 vaddlv.s32 r8, r1, q1 |
| [^>]*> ee89 8f22 vaddlva.s32 r8, r1, q1 |
| [^>]*> ee89 8f04 vaddlv.s32 r8, r1, q2 |
| [^>]*> ee89 8f24 vaddlva.s32 r8, r1, q2 |
| [^>]*> ee89 8f08 vaddlv.s32 r8, r1, q4 |
| [^>]*> ee89 8f28 vaddlva.s32 r8, r1, q4 |
| [^>]*> ee89 8f0e vaddlv.s32 r8, r1, q7 |
| [^>]*> ee89 8f2e vaddlva.s32 r8, r1, q7 |
| [^>]*> ee99 8f00 vaddlv.s32 r8, r3, q0 |
| [^>]*> ee99 8f20 vaddlva.s32 r8, r3, q0 |
| [^>]*> ee99 8f02 vaddlv.s32 r8, r3, q1 |
| [^>]*> ee99 8f22 vaddlva.s32 r8, r3, q1 |
| [^>]*> ee99 8f04 vaddlv.s32 r8, r3, q2 |
| [^>]*> ee99 8f24 vaddlva.s32 r8, r3, q2 |
| [^>]*> ee99 8f08 vaddlv.s32 r8, r3, q4 |
| [^>]*> ee99 8f28 vaddlva.s32 r8, r3, q4 |
| [^>]*> ee99 8f0e vaddlv.s32 r8, r3, q7 |
| [^>]*> ee99 8f2e vaddlva.s32 r8, r3, q7 |
| [^>]*> eea9 8f00 vaddlv.s32 r8, r5, q0 |
| [^>]*> eea9 8f20 vaddlva.s32 r8, r5, q0 |
| [^>]*> eea9 8f02 vaddlv.s32 r8, r5, q1 |
| [^>]*> eea9 8f22 vaddlva.s32 r8, r5, q1 |
| [^>]*> eea9 8f04 vaddlv.s32 r8, r5, q2 |
| [^>]*> eea9 8f24 vaddlva.s32 r8, r5, q2 |
| [^>]*> eea9 8f08 vaddlv.s32 r8, r5, q4 |
| [^>]*> eea9 8f28 vaddlva.s32 r8, r5, q4 |
| [^>]*> eea9 8f0e vaddlv.s32 r8, r5, q7 |
| [^>]*> eea9 8f2e vaddlva.s32 r8, r5, q7 |
| [^>]*> eeb9 8f00 vaddlv.s32 r8, r7, q0 |
| [^>]*> eeb9 8f20 vaddlva.s32 r8, r7, q0 |
| [^>]*> eeb9 8f02 vaddlv.s32 r8, r7, q1 |
| [^>]*> eeb9 8f22 vaddlva.s32 r8, r7, q1 |
| [^>]*> eeb9 8f04 vaddlv.s32 r8, r7, q2 |
| [^>]*> eeb9 8f24 vaddlva.s32 r8, r7, q2 |
| [^>]*> eeb9 8f08 vaddlv.s32 r8, r7, q4 |
| [^>]*> eeb9 8f28 vaddlva.s32 r8, r7, q4 |
| [^>]*> eeb9 8f0e vaddlv.s32 r8, r7, q7 |
| [^>]*> eeb9 8f2e vaddlva.s32 r8, r7, q7 |
| [^>]*> eec9 8f00 vaddlv.s32 r8, r9, q0 |
| [^>]*> eec9 8f20 vaddlva.s32 r8, r9, q0 |
| [^>]*> eec9 8f02 vaddlv.s32 r8, r9, q1 |
| [^>]*> eec9 8f22 vaddlva.s32 r8, r9, q1 |
| [^>]*> eec9 8f04 vaddlv.s32 r8, r9, q2 |
| [^>]*> eec9 8f24 vaddlva.s32 r8, r9, q2 |
| [^>]*> eec9 8f08 vaddlv.s32 r8, r9, q4 |
| [^>]*> eec9 8f28 vaddlva.s32 r8, r9, q4 |
| [^>]*> eec9 8f0e vaddlv.s32 r8, r9, q7 |
| [^>]*> eec9 8f2e vaddlva.s32 r8, r9, q7 |
| [^>]*> eed9 8f00 vaddlv.s32 r8, fp, q0 |
| [^>]*> eed9 8f20 vaddlva.s32 r8, fp, q0 |
| [^>]*> eed9 8f02 vaddlv.s32 r8, fp, q1 |
| [^>]*> eed9 8f22 vaddlva.s32 r8, fp, q1 |
| [^>]*> eed9 8f04 vaddlv.s32 r8, fp, q2 |
| [^>]*> eed9 8f24 vaddlva.s32 r8, fp, q2 |
| [^>]*> eed9 8f08 vaddlv.s32 r8, fp, q4 |
| [^>]*> eed9 8f28 vaddlva.s32 r8, fp, q4 |
| [^>]*> eed9 8f0e vaddlv.s32 r8, fp, q7 |
| [^>]*> eed9 8f2e vaddlva.s32 r8, fp, q7 |
| [^>]*> ee89 af00 vaddlv.s32 sl, r1, q0 |
| [^>]*> ee89 af20 vaddlva.s32 sl, r1, q0 |
| [^>]*> ee89 af02 vaddlv.s32 sl, r1, q1 |
| [^>]*> ee89 af22 vaddlva.s32 sl, r1, q1 |
| [^>]*> ee89 af04 vaddlv.s32 sl, r1, q2 |
| [^>]*> ee89 af24 vaddlva.s32 sl, r1, q2 |
| [^>]*> ee89 af08 vaddlv.s32 sl, r1, q4 |
| [^>]*> ee89 af28 vaddlva.s32 sl, r1, q4 |
| [^>]*> ee89 af0e vaddlv.s32 sl, r1, q7 |
| [^>]*> ee89 af2e vaddlva.s32 sl, r1, q7 |
| [^>]*> ee99 af00 vaddlv.s32 sl, r3, q0 |
| [^>]*> ee99 af20 vaddlva.s32 sl, r3, q0 |
| [^>]*> ee99 af02 vaddlv.s32 sl, r3, q1 |
| [^>]*> ee99 af22 vaddlva.s32 sl, r3, q1 |
| [^>]*> ee99 af04 vaddlv.s32 sl, r3, q2 |
| [^>]*> ee99 af24 vaddlva.s32 sl, r3, q2 |
| [^>]*> ee99 af08 vaddlv.s32 sl, r3, q4 |
| [^>]*> ee99 af28 vaddlva.s32 sl, r3, q4 |
| [^>]*> ee99 af0e vaddlv.s32 sl, r3, q7 |
| [^>]*> ee99 af2e vaddlva.s32 sl, r3, q7 |
| [^>]*> eea9 af00 vaddlv.s32 sl, r5, q0 |
| [^>]*> eea9 af20 vaddlva.s32 sl, r5, q0 |
| [^>]*> eea9 af02 vaddlv.s32 sl, r5, q1 |
| [^>]*> eea9 af22 vaddlva.s32 sl, r5, q1 |
| [^>]*> eea9 af04 vaddlv.s32 sl, r5, q2 |
| [^>]*> eea9 af24 vaddlva.s32 sl, r5, q2 |
| [^>]*> eea9 af08 vaddlv.s32 sl, r5, q4 |
| [^>]*> eea9 af28 vaddlva.s32 sl, r5, q4 |
| [^>]*> eea9 af0e vaddlv.s32 sl, r5, q7 |
| [^>]*> eea9 af2e vaddlva.s32 sl, r5, q7 |
| [^>]*> eeb9 af00 vaddlv.s32 sl, r7, q0 |
| [^>]*> eeb9 af20 vaddlva.s32 sl, r7, q0 |
| [^>]*> eeb9 af02 vaddlv.s32 sl, r7, q1 |
| [^>]*> eeb9 af22 vaddlva.s32 sl, r7, q1 |
| [^>]*> eeb9 af04 vaddlv.s32 sl, r7, q2 |
| [^>]*> eeb9 af24 vaddlva.s32 sl, r7, q2 |
| [^>]*> eeb9 af08 vaddlv.s32 sl, r7, q4 |
| [^>]*> eeb9 af28 vaddlva.s32 sl, r7, q4 |
| [^>]*> eeb9 af0e vaddlv.s32 sl, r7, q7 |
| [^>]*> eeb9 af2e vaddlva.s32 sl, r7, q7 |
| [^>]*> eec9 af00 vaddlv.s32 sl, r9, q0 |
| [^>]*> eec9 af20 vaddlva.s32 sl, r9, q0 |
| [^>]*> eec9 af02 vaddlv.s32 sl, r9, q1 |
| [^>]*> eec9 af22 vaddlva.s32 sl, r9, q1 |
| [^>]*> eec9 af04 vaddlv.s32 sl, r9, q2 |
| [^>]*> eec9 af24 vaddlva.s32 sl, r9, q2 |
| [^>]*> eec9 af08 vaddlv.s32 sl, r9, q4 |
| [^>]*> eec9 af28 vaddlva.s32 sl, r9, q4 |
| [^>]*> eec9 af0e vaddlv.s32 sl, r9, q7 |
| [^>]*> eec9 af2e vaddlva.s32 sl, r9, q7 |
| [^>]*> eed9 af00 vaddlv.s32 sl, fp, q0 |
| [^>]*> eed9 af20 vaddlva.s32 sl, fp, q0 |
| [^>]*> eed9 af02 vaddlv.s32 sl, fp, q1 |
| [^>]*> eed9 af22 vaddlva.s32 sl, fp, q1 |
| [^>]*> eed9 af04 vaddlv.s32 sl, fp, q2 |
| [^>]*> eed9 af24 vaddlva.s32 sl, fp, q2 |
| [^>]*> eed9 af08 vaddlv.s32 sl, fp, q4 |
| [^>]*> eed9 af28 vaddlva.s32 sl, fp, q4 |
| [^>]*> eed9 af0e vaddlv.s32 sl, fp, q7 |
| [^>]*> eed9 af2e vaddlva.s32 sl, fp, q7 |
| [^>]*> ee89 cf00 vaddlv.s32 ip, r1, q0 |
| [^>]*> ee89 cf20 vaddlva.s32 ip, r1, q0 |
| [^>]*> ee89 cf02 vaddlv.s32 ip, r1, q1 |
| [^>]*> ee89 cf22 vaddlva.s32 ip, r1, q1 |
| [^>]*> ee89 cf04 vaddlv.s32 ip, r1, q2 |
| [^>]*> ee89 cf24 vaddlva.s32 ip, r1, q2 |
| [^>]*> ee89 cf08 vaddlv.s32 ip, r1, q4 |
| [^>]*> ee89 cf28 vaddlva.s32 ip, r1, q4 |
| [^>]*> ee89 cf0e vaddlv.s32 ip, r1, q7 |
| [^>]*> ee89 cf2e vaddlva.s32 ip, r1, q7 |
| [^>]*> ee99 cf00 vaddlv.s32 ip, r3, q0 |
| [^>]*> ee99 cf20 vaddlva.s32 ip, r3, q0 |
| [^>]*> ee99 cf02 vaddlv.s32 ip, r3, q1 |
| [^>]*> ee99 cf22 vaddlva.s32 ip, r3, q1 |
| [^>]*> ee99 cf04 vaddlv.s32 ip, r3, q2 |
| [^>]*> ee99 cf24 vaddlva.s32 ip, r3, q2 |
| [^>]*> ee99 cf08 vaddlv.s32 ip, r3, q4 |
| [^>]*> ee99 cf28 vaddlva.s32 ip, r3, q4 |
| [^>]*> ee99 cf0e vaddlv.s32 ip, r3, q7 |
| [^>]*> ee99 cf2e vaddlva.s32 ip, r3, q7 |
| [^>]*> eea9 cf00 vaddlv.s32 ip, r5, q0 |
| [^>]*> eea9 cf20 vaddlva.s32 ip, r5, q0 |
| [^>]*> eea9 cf02 vaddlv.s32 ip, r5, q1 |
| [^>]*> eea9 cf22 vaddlva.s32 ip, r5, q1 |
| [^>]*> eea9 cf04 vaddlv.s32 ip, r5, q2 |
| [^>]*> eea9 cf24 vaddlva.s32 ip, r5, q2 |
| [^>]*> eea9 cf08 vaddlv.s32 ip, r5, q4 |
| [^>]*> eea9 cf28 vaddlva.s32 ip, r5, q4 |
| [^>]*> eea9 cf0e vaddlv.s32 ip, r5, q7 |
| [^>]*> eea9 cf2e vaddlva.s32 ip, r5, q7 |
| [^>]*> eeb9 cf00 vaddlv.s32 ip, r7, q0 |
| [^>]*> eeb9 cf20 vaddlva.s32 ip, r7, q0 |
| [^>]*> eeb9 cf02 vaddlv.s32 ip, r7, q1 |
| [^>]*> eeb9 cf22 vaddlva.s32 ip, r7, q1 |
| [^>]*> eeb9 cf04 vaddlv.s32 ip, r7, q2 |
| [^>]*> eeb9 cf24 vaddlva.s32 ip, r7, q2 |
| [^>]*> eeb9 cf08 vaddlv.s32 ip, r7, q4 |
| [^>]*> eeb9 cf28 vaddlva.s32 ip, r7, q4 |
| [^>]*> eeb9 cf0e vaddlv.s32 ip, r7, q7 |
| [^>]*> eeb9 cf2e vaddlva.s32 ip, r7, q7 |
| [^>]*> eec9 cf00 vaddlv.s32 ip, r9, q0 |
| [^>]*> eec9 cf20 vaddlva.s32 ip, r9, q0 |
| [^>]*> eec9 cf02 vaddlv.s32 ip, r9, q1 |
| [^>]*> eec9 cf22 vaddlva.s32 ip, r9, q1 |
| [^>]*> eec9 cf04 vaddlv.s32 ip, r9, q2 |
| [^>]*> eec9 cf24 vaddlva.s32 ip, r9, q2 |
| [^>]*> eec9 cf08 vaddlv.s32 ip, r9, q4 |
| [^>]*> eec9 cf28 vaddlva.s32 ip, r9, q4 |
| [^>]*> eec9 cf0e vaddlv.s32 ip, r9, q7 |
| [^>]*> eec9 cf2e vaddlva.s32 ip, r9, q7 |
| [^>]*> eed9 cf00 vaddlv.s32 ip, fp, q0 |
| [^>]*> eed9 cf20 vaddlva.s32 ip, fp, q0 |
| [^>]*> eed9 cf02 vaddlv.s32 ip, fp, q1 |
| [^>]*> eed9 cf22 vaddlva.s32 ip, fp, q1 |
| [^>]*> eed9 cf04 vaddlv.s32 ip, fp, q2 |
| [^>]*> eed9 cf24 vaddlva.s32 ip, fp, q2 |
| [^>]*> eed9 cf08 vaddlv.s32 ip, fp, q4 |
| [^>]*> eed9 cf28 vaddlva.s32 ip, fp, q4 |
| [^>]*> eed9 cf0e vaddlv.s32 ip, fp, q7 |
| [^>]*> eed9 cf2e vaddlva.s32 ip, fp, q7 |
| [^>]*> ee89 ef00 vaddlv.s32 lr, r1, q0 |
| [^>]*> ee89 ef20 vaddlva.s32 lr, r1, q0 |
| [^>]*> ee89 ef02 vaddlv.s32 lr, r1, q1 |
| [^>]*> ee89 ef22 vaddlva.s32 lr, r1, q1 |
| [^>]*> ee89 ef04 vaddlv.s32 lr, r1, q2 |
| [^>]*> ee89 ef24 vaddlva.s32 lr, r1, q2 |
| [^>]*> ee89 ef08 vaddlv.s32 lr, r1, q4 |
| [^>]*> ee89 ef28 vaddlva.s32 lr, r1, q4 |
| [^>]*> ee89 ef0e vaddlv.s32 lr, r1, q7 |
| [^>]*> ee89 ef2e vaddlva.s32 lr, r1, q7 |
| [^>]*> ee99 ef00 vaddlv.s32 lr, r3, q0 |
| [^>]*> ee99 ef20 vaddlva.s32 lr, r3, q0 |
| [^>]*> ee99 ef02 vaddlv.s32 lr, r3, q1 |
| [^>]*> ee99 ef22 vaddlva.s32 lr, r3, q1 |
| [^>]*> ee99 ef04 vaddlv.s32 lr, r3, q2 |
| [^>]*> ee99 ef24 vaddlva.s32 lr, r3, q2 |
| [^>]*> ee99 ef08 vaddlv.s32 lr, r3, q4 |
| [^>]*> ee99 ef28 vaddlva.s32 lr, r3, q4 |
| [^>]*> ee99 ef0e vaddlv.s32 lr, r3, q7 |
| [^>]*> ee99 ef2e vaddlva.s32 lr, r3, q7 |
| [^>]*> eea9 ef00 vaddlv.s32 lr, r5, q0 |
| [^>]*> eea9 ef20 vaddlva.s32 lr, r5, q0 |
| [^>]*> eea9 ef02 vaddlv.s32 lr, r5, q1 |
| [^>]*> eea9 ef22 vaddlva.s32 lr, r5, q1 |
| [^>]*> eea9 ef04 vaddlv.s32 lr, r5, q2 |
| [^>]*> eea9 ef24 vaddlva.s32 lr, r5, q2 |
| [^>]*> eea9 ef08 vaddlv.s32 lr, r5, q4 |
| [^>]*> eea9 ef28 vaddlva.s32 lr, r5, q4 |
| [^>]*> eea9 ef0e vaddlv.s32 lr, r5, q7 |
| [^>]*> eea9 ef2e vaddlva.s32 lr, r5, q7 |
| [^>]*> eeb9 ef00 vaddlv.s32 lr, r7, q0 |
| [^>]*> eeb9 ef20 vaddlva.s32 lr, r7, q0 |
| [^>]*> eeb9 ef02 vaddlv.s32 lr, r7, q1 |
| [^>]*> eeb9 ef22 vaddlva.s32 lr, r7, q1 |
| [^>]*> eeb9 ef04 vaddlv.s32 lr, r7, q2 |
| [^>]*> eeb9 ef24 vaddlva.s32 lr, r7, q2 |
| [^>]*> eeb9 ef08 vaddlv.s32 lr, r7, q4 |
| [^>]*> eeb9 ef28 vaddlva.s32 lr, r7, q4 |
| [^>]*> eeb9 ef0e vaddlv.s32 lr, r7, q7 |
| [^>]*> eeb9 ef2e vaddlva.s32 lr, r7, q7 |
| [^>]*> eec9 ef00 vaddlv.s32 lr, r9, q0 |
| [^>]*> eec9 ef20 vaddlva.s32 lr, r9, q0 |
| [^>]*> eec9 ef02 vaddlv.s32 lr, r9, q1 |
| [^>]*> eec9 ef22 vaddlva.s32 lr, r9, q1 |
| [^>]*> eec9 ef04 vaddlv.s32 lr, r9, q2 |
| [^>]*> eec9 ef24 vaddlva.s32 lr, r9, q2 |
| [^>]*> eec9 ef08 vaddlv.s32 lr, r9, q4 |
| [^>]*> eec9 ef28 vaddlva.s32 lr, r9, q4 |
| [^>]*> eec9 ef0e vaddlv.s32 lr, r9, q7 |
| [^>]*> eec9 ef2e vaddlva.s32 lr, r9, q7 |
| [^>]*> eed9 ef00 vaddlv.s32 lr, fp, q0 |
| [^>]*> eed9 ef20 vaddlva.s32 lr, fp, q0 |
| [^>]*> eed9 ef02 vaddlv.s32 lr, fp, q1 |
| [^>]*> eed9 ef22 vaddlva.s32 lr, fp, q1 |
| [^>]*> eed9 ef04 vaddlv.s32 lr, fp, q2 |
| [^>]*> eed9 ef24 vaddlva.s32 lr, fp, q2 |
| [^>]*> eed9 ef08 vaddlv.s32 lr, fp, q4 |
| [^>]*> eed9 ef28 vaddlva.s32 lr, fp, q4 |
| [^>]*> eed9 ef0e vaddlv.s32 lr, fp, q7 |
| [^>]*> eed9 ef2e vaddlva.s32 lr, fp, q7 |
| [^>]*> fe89 0f00 vaddlv.u32 r0, r1, q0 |
| [^>]*> fe89 0f20 vaddlva.u32 r0, r1, q0 |
| [^>]*> fe89 0f02 vaddlv.u32 r0, r1, q1 |
| [^>]*> fe89 0f22 vaddlva.u32 r0, r1, q1 |
| [^>]*> fe89 0f04 vaddlv.u32 r0, r1, q2 |
| [^>]*> fe89 0f24 vaddlva.u32 r0, r1, q2 |
| [^>]*> fe89 0f08 vaddlv.u32 r0, r1, q4 |
| [^>]*> fe89 0f28 vaddlva.u32 r0, r1, q4 |
| [^>]*> fe89 0f0e vaddlv.u32 r0, r1, q7 |
| [^>]*> fe89 0f2e vaddlva.u32 r0, r1, q7 |
| [^>]*> fe99 0f00 vaddlv.u32 r0, r3, q0 |
| [^>]*> fe99 0f20 vaddlva.u32 r0, r3, q0 |
| [^>]*> fe99 0f02 vaddlv.u32 r0, r3, q1 |
| [^>]*> fe99 0f22 vaddlva.u32 r0, r3, q1 |
| [^>]*> fe99 0f04 vaddlv.u32 r0, r3, q2 |
| [^>]*> fe99 0f24 vaddlva.u32 r0, r3, q2 |
| [^>]*> fe99 0f08 vaddlv.u32 r0, r3, q4 |
| [^>]*> fe99 0f28 vaddlva.u32 r0, r3, q4 |
| [^>]*> fe99 0f0e vaddlv.u32 r0, r3, q7 |
| [^>]*> fe99 0f2e vaddlva.u32 r0, r3, q7 |
| [^>]*> fea9 0f00 vaddlv.u32 r0, r5, q0 |
| [^>]*> fea9 0f20 vaddlva.u32 r0, r5, q0 |
| [^>]*> fea9 0f02 vaddlv.u32 r0, r5, q1 |
| [^>]*> fea9 0f22 vaddlva.u32 r0, r5, q1 |
| [^>]*> fea9 0f04 vaddlv.u32 r0, r5, q2 |
| [^>]*> fea9 0f24 vaddlva.u32 r0, r5, q2 |
| [^>]*> fea9 0f08 vaddlv.u32 r0, r5, q4 |
| [^>]*> fea9 0f28 vaddlva.u32 r0, r5, q4 |
| [^>]*> fea9 0f0e vaddlv.u32 r0, r5, q7 |
| [^>]*> fea9 0f2e vaddlva.u32 r0, r5, q7 |
| [^>]*> feb9 0f00 vaddlv.u32 r0, r7, q0 |
| [^>]*> feb9 0f20 vaddlva.u32 r0, r7, q0 |
| [^>]*> feb9 0f02 vaddlv.u32 r0, r7, q1 |
| [^>]*> feb9 0f22 vaddlva.u32 r0, r7, q1 |
| [^>]*> feb9 0f04 vaddlv.u32 r0, r7, q2 |
| [^>]*> feb9 0f24 vaddlva.u32 r0, r7, q2 |
| [^>]*> feb9 0f08 vaddlv.u32 r0, r7, q4 |
| [^>]*> feb9 0f28 vaddlva.u32 r0, r7, q4 |
| [^>]*> feb9 0f0e vaddlv.u32 r0, r7, q7 |
| [^>]*> feb9 0f2e vaddlva.u32 r0, r7, q7 |
| [^>]*> fec9 0f00 vaddlv.u32 r0, r9, q0 |
| [^>]*> fec9 0f20 vaddlva.u32 r0, r9, q0 |
| [^>]*> fec9 0f02 vaddlv.u32 r0, r9, q1 |
| [^>]*> fec9 0f22 vaddlva.u32 r0, r9, q1 |
| [^>]*> fec9 0f04 vaddlv.u32 r0, r9, q2 |
| [^>]*> fec9 0f24 vaddlva.u32 r0, r9, q2 |
| [^>]*> fec9 0f08 vaddlv.u32 r0, r9, q4 |
| [^>]*> fec9 0f28 vaddlva.u32 r0, r9, q4 |
| [^>]*> fec9 0f0e vaddlv.u32 r0, r9, q7 |
| [^>]*> fec9 0f2e vaddlva.u32 r0, r9, q7 |
| [^>]*> fed9 0f00 vaddlv.u32 r0, fp, q0 |
| [^>]*> fed9 0f20 vaddlva.u32 r0, fp, q0 |
| [^>]*> fed9 0f02 vaddlv.u32 r0, fp, q1 |
| [^>]*> fed9 0f22 vaddlva.u32 r0, fp, q1 |
| [^>]*> fed9 0f04 vaddlv.u32 r0, fp, q2 |
| [^>]*> fed9 0f24 vaddlva.u32 r0, fp, q2 |
| [^>]*> fed9 0f08 vaddlv.u32 r0, fp, q4 |
| [^>]*> fed9 0f28 vaddlva.u32 r0, fp, q4 |
| [^>]*> fed9 0f0e vaddlv.u32 r0, fp, q7 |
| [^>]*> fed9 0f2e vaddlva.u32 r0, fp, q7 |
| [^>]*> fe89 2f00 vaddlv.u32 r2, r1, q0 |
| [^>]*> fe89 2f20 vaddlva.u32 r2, r1, q0 |
| [^>]*> fe89 2f02 vaddlv.u32 r2, r1, q1 |
| [^>]*> fe89 2f22 vaddlva.u32 r2, r1, q1 |
| [^>]*> fe89 2f04 vaddlv.u32 r2, r1, q2 |
| [^>]*> fe89 2f24 vaddlva.u32 r2, r1, q2 |
| [^>]*> fe89 2f08 vaddlv.u32 r2, r1, q4 |
| [^>]*> fe89 2f28 vaddlva.u32 r2, r1, q4 |
| [^>]*> fe89 2f0e vaddlv.u32 r2, r1, q7 |
| [^>]*> fe89 2f2e vaddlva.u32 r2, r1, q7 |
| [^>]*> fe99 2f00 vaddlv.u32 r2, r3, q0 |
| [^>]*> fe99 2f20 vaddlva.u32 r2, r3, q0 |
| [^>]*> fe99 2f02 vaddlv.u32 r2, r3, q1 |
| [^>]*> fe99 2f22 vaddlva.u32 r2, r3, q1 |
| [^>]*> fe99 2f04 vaddlv.u32 r2, r3, q2 |
| [^>]*> fe99 2f24 vaddlva.u32 r2, r3, q2 |
| [^>]*> fe99 2f08 vaddlv.u32 r2, r3, q4 |
| [^>]*> fe99 2f28 vaddlva.u32 r2, r3, q4 |
| [^>]*> fe99 2f0e vaddlv.u32 r2, r3, q7 |
| [^>]*> fe99 2f2e vaddlva.u32 r2, r3, q7 |
| [^>]*> fea9 2f00 vaddlv.u32 r2, r5, q0 |
| [^>]*> fea9 2f20 vaddlva.u32 r2, r5, q0 |
| [^>]*> fea9 2f02 vaddlv.u32 r2, r5, q1 |
| [^>]*> fea9 2f22 vaddlva.u32 r2, r5, q1 |
| [^>]*> fea9 2f04 vaddlv.u32 r2, r5, q2 |
| [^>]*> fea9 2f24 vaddlva.u32 r2, r5, q2 |
| [^>]*> fea9 2f08 vaddlv.u32 r2, r5, q4 |
| [^>]*> fea9 2f28 vaddlva.u32 r2, r5, q4 |
| [^>]*> fea9 2f0e vaddlv.u32 r2, r5, q7 |
| [^>]*> fea9 2f2e vaddlva.u32 r2, r5, q7 |
| [^>]*> feb9 2f00 vaddlv.u32 r2, r7, q0 |
| [^>]*> feb9 2f20 vaddlva.u32 r2, r7, q0 |
| [^>]*> feb9 2f02 vaddlv.u32 r2, r7, q1 |
| [^>]*> feb9 2f22 vaddlva.u32 r2, r7, q1 |
| [^>]*> feb9 2f04 vaddlv.u32 r2, r7, q2 |
| [^>]*> feb9 2f24 vaddlva.u32 r2, r7, q2 |
| [^>]*> feb9 2f08 vaddlv.u32 r2, r7, q4 |
| [^>]*> feb9 2f28 vaddlva.u32 r2, r7, q4 |
| [^>]*> feb9 2f0e vaddlv.u32 r2, r7, q7 |
| [^>]*> feb9 2f2e vaddlva.u32 r2, r7, q7 |
| [^>]*> fec9 2f00 vaddlv.u32 r2, r9, q0 |
| [^>]*> fec9 2f20 vaddlva.u32 r2, r9, q0 |
| [^>]*> fec9 2f02 vaddlv.u32 r2, r9, q1 |
| [^>]*> fec9 2f22 vaddlva.u32 r2, r9, q1 |
| [^>]*> fec9 2f04 vaddlv.u32 r2, r9, q2 |
| [^>]*> fec9 2f24 vaddlva.u32 r2, r9, q2 |
| [^>]*> fec9 2f08 vaddlv.u32 r2, r9, q4 |
| [^>]*> fec9 2f28 vaddlva.u32 r2, r9, q4 |
| [^>]*> fec9 2f0e vaddlv.u32 r2, r9, q7 |
| [^>]*> fec9 2f2e vaddlva.u32 r2, r9, q7 |
| [^>]*> fed9 2f00 vaddlv.u32 r2, fp, q0 |
| [^>]*> fed9 2f20 vaddlva.u32 r2, fp, q0 |
| [^>]*> fed9 2f02 vaddlv.u32 r2, fp, q1 |
| [^>]*> fed9 2f22 vaddlva.u32 r2, fp, q1 |
| [^>]*> fed9 2f04 vaddlv.u32 r2, fp, q2 |
| [^>]*> fed9 2f24 vaddlva.u32 r2, fp, q2 |
| [^>]*> fed9 2f08 vaddlv.u32 r2, fp, q4 |
| [^>]*> fed9 2f28 vaddlva.u32 r2, fp, q4 |
| [^>]*> fed9 2f0e vaddlv.u32 r2, fp, q7 |
| [^>]*> fed9 2f2e vaddlva.u32 r2, fp, q7 |
| [^>]*> fe89 4f00 vaddlv.u32 r4, r1, q0 |
| [^>]*> fe89 4f20 vaddlva.u32 r4, r1, q0 |
| [^>]*> fe89 4f02 vaddlv.u32 r4, r1, q1 |
| [^>]*> fe89 4f22 vaddlva.u32 r4, r1, q1 |
| [^>]*> fe89 4f04 vaddlv.u32 r4, r1, q2 |
| [^>]*> fe89 4f24 vaddlva.u32 r4, r1, q2 |
| [^>]*> fe89 4f08 vaddlv.u32 r4, r1, q4 |
| [^>]*> fe89 4f28 vaddlva.u32 r4, r1, q4 |
| [^>]*> fe89 4f0e vaddlv.u32 r4, r1, q7 |
| [^>]*> fe89 4f2e vaddlva.u32 r4, r1, q7 |
| [^>]*> fe99 4f00 vaddlv.u32 r4, r3, q0 |
| [^>]*> fe99 4f20 vaddlva.u32 r4, r3, q0 |
| [^>]*> fe99 4f02 vaddlv.u32 r4, r3, q1 |
| [^>]*> fe99 4f22 vaddlva.u32 r4, r3, q1 |
| [^>]*> fe99 4f04 vaddlv.u32 r4, r3, q2 |
| [^>]*> fe99 4f24 vaddlva.u32 r4, r3, q2 |
| [^>]*> fe99 4f08 vaddlv.u32 r4, r3, q4 |
| [^>]*> fe99 4f28 vaddlva.u32 r4, r3, q4 |
| [^>]*> fe99 4f0e vaddlv.u32 r4, r3, q7 |
| [^>]*> fe99 4f2e vaddlva.u32 r4, r3, q7 |
| [^>]*> fea9 4f00 vaddlv.u32 r4, r5, q0 |
| [^>]*> fea9 4f20 vaddlva.u32 r4, r5, q0 |
| [^>]*> fea9 4f02 vaddlv.u32 r4, r5, q1 |
| [^>]*> fea9 4f22 vaddlva.u32 r4, r5, q1 |
| [^>]*> fea9 4f04 vaddlv.u32 r4, r5, q2 |
| [^>]*> fea9 4f24 vaddlva.u32 r4, r5, q2 |
| [^>]*> fea9 4f08 vaddlv.u32 r4, r5, q4 |
| [^>]*> fea9 4f28 vaddlva.u32 r4, r5, q4 |
| [^>]*> fea9 4f0e vaddlv.u32 r4, r5, q7 |
| [^>]*> fea9 4f2e vaddlva.u32 r4, r5, q7 |
| [^>]*> feb9 4f00 vaddlv.u32 r4, r7, q0 |
| [^>]*> feb9 4f20 vaddlva.u32 r4, r7, q0 |
| [^>]*> feb9 4f02 vaddlv.u32 r4, r7, q1 |
| [^>]*> feb9 4f22 vaddlva.u32 r4, r7, q1 |
| [^>]*> feb9 4f04 vaddlv.u32 r4, r7, q2 |
| [^>]*> feb9 4f24 vaddlva.u32 r4, r7, q2 |
| [^>]*> feb9 4f08 vaddlv.u32 r4, r7, q4 |
| [^>]*> feb9 4f28 vaddlva.u32 r4, r7, q4 |
| [^>]*> feb9 4f0e vaddlv.u32 r4, r7, q7 |
| [^>]*> feb9 4f2e vaddlva.u32 r4, r7, q7 |
| [^>]*> fec9 4f00 vaddlv.u32 r4, r9, q0 |
| [^>]*> fec9 4f20 vaddlva.u32 r4, r9, q0 |
| [^>]*> fec9 4f02 vaddlv.u32 r4, r9, q1 |
| [^>]*> fec9 4f22 vaddlva.u32 r4, r9, q1 |
| [^>]*> fec9 4f04 vaddlv.u32 r4, r9, q2 |
| [^>]*> fec9 4f24 vaddlva.u32 r4, r9, q2 |
| [^>]*> fec9 4f08 vaddlv.u32 r4, r9, q4 |
| [^>]*> fec9 4f28 vaddlva.u32 r4, r9, q4 |
| [^>]*> fec9 4f0e vaddlv.u32 r4, r9, q7 |
| [^>]*> fec9 4f2e vaddlva.u32 r4, r9, q7 |
| [^>]*> fed9 4f00 vaddlv.u32 r4, fp, q0 |
| [^>]*> fed9 4f20 vaddlva.u32 r4, fp, q0 |
| [^>]*> fed9 4f02 vaddlv.u32 r4, fp, q1 |
| [^>]*> fed9 4f22 vaddlva.u32 r4, fp, q1 |
| [^>]*> fed9 4f04 vaddlv.u32 r4, fp, q2 |
| [^>]*> fed9 4f24 vaddlva.u32 r4, fp, q2 |
| [^>]*> fed9 4f08 vaddlv.u32 r4, fp, q4 |
| [^>]*> fed9 4f28 vaddlva.u32 r4, fp, q4 |
| [^>]*> fed9 4f0e vaddlv.u32 r4, fp, q7 |
| [^>]*> fed9 4f2e vaddlva.u32 r4, fp, q7 |
| [^>]*> fe89 8f00 vaddlv.u32 r8, r1, q0 |
| [^>]*> fe89 8f20 vaddlva.u32 r8, r1, q0 |
| [^>]*> fe89 8f02 vaddlv.u32 r8, r1, q1 |
| [^>]*> fe89 8f22 vaddlva.u32 r8, r1, q1 |
| [^>]*> fe89 8f04 vaddlv.u32 r8, r1, q2 |
| [^>]*> fe89 8f24 vaddlva.u32 r8, r1, q2 |
| [^>]*> fe89 8f08 vaddlv.u32 r8, r1, q4 |
| [^>]*> fe89 8f28 vaddlva.u32 r8, r1, q4 |
| [^>]*> fe89 8f0e vaddlv.u32 r8, r1, q7 |
| [^>]*> fe89 8f2e vaddlva.u32 r8, r1, q7 |
| [^>]*> fe99 8f00 vaddlv.u32 r8, r3, q0 |
| [^>]*> fe99 8f20 vaddlva.u32 r8, r3, q0 |
| [^>]*> fe99 8f02 vaddlv.u32 r8, r3, q1 |
| [^>]*> fe99 8f22 vaddlva.u32 r8, r3, q1 |
| [^>]*> fe99 8f04 vaddlv.u32 r8, r3, q2 |
| [^>]*> fe99 8f24 vaddlva.u32 r8, r3, q2 |
| [^>]*> fe99 8f08 vaddlv.u32 r8, r3, q4 |
| [^>]*> fe99 8f28 vaddlva.u32 r8, r3, q4 |
| [^>]*> fe99 8f0e vaddlv.u32 r8, r3, q7 |
| [^>]*> fe99 8f2e vaddlva.u32 r8, r3, q7 |
| [^>]*> fea9 8f00 vaddlv.u32 r8, r5, q0 |
| [^>]*> fea9 8f20 vaddlva.u32 r8, r5, q0 |
| [^>]*> fea9 8f02 vaddlv.u32 r8, r5, q1 |
| [^>]*> fea9 8f22 vaddlva.u32 r8, r5, q1 |
| [^>]*> fea9 8f04 vaddlv.u32 r8, r5, q2 |
| [^>]*> fea9 8f24 vaddlva.u32 r8, r5, q2 |
| [^>]*> fea9 8f08 vaddlv.u32 r8, r5, q4 |
| [^>]*> fea9 8f28 vaddlva.u32 r8, r5, q4 |
| [^>]*> fea9 8f0e vaddlv.u32 r8, r5, q7 |
| [^>]*> fea9 8f2e vaddlva.u32 r8, r5, q7 |
| [^>]*> feb9 8f00 vaddlv.u32 r8, r7, q0 |
| [^>]*> feb9 8f20 vaddlva.u32 r8, r7, q0 |
| [^>]*> feb9 8f02 vaddlv.u32 r8, r7, q1 |
| [^>]*> feb9 8f22 vaddlva.u32 r8, r7, q1 |
| [^>]*> feb9 8f04 vaddlv.u32 r8, r7, q2 |
| [^>]*> feb9 8f24 vaddlva.u32 r8, r7, q2 |
| [^>]*> feb9 8f08 vaddlv.u32 r8, r7, q4 |
| [^>]*> feb9 8f28 vaddlva.u32 r8, r7, q4 |
| [^>]*> feb9 8f0e vaddlv.u32 r8, r7, q7 |
| [^>]*> feb9 8f2e vaddlva.u32 r8, r7, q7 |
| [^>]*> fec9 8f00 vaddlv.u32 r8, r9, q0 |
| [^>]*> fec9 8f20 vaddlva.u32 r8, r9, q0 |
| [^>]*> fec9 8f02 vaddlv.u32 r8, r9, q1 |
| [^>]*> fec9 8f22 vaddlva.u32 r8, r9, q1 |
| [^>]*> fec9 8f04 vaddlv.u32 r8, r9, q2 |
| [^>]*> fec9 8f24 vaddlva.u32 r8, r9, q2 |
| [^>]*> fec9 8f08 vaddlv.u32 r8, r9, q4 |
| [^>]*> fec9 8f28 vaddlva.u32 r8, r9, q4 |
| [^>]*> fec9 8f0e vaddlv.u32 r8, r9, q7 |
| [^>]*> fec9 8f2e vaddlva.u32 r8, r9, q7 |
| [^>]*> fed9 8f00 vaddlv.u32 r8, fp, q0 |
| [^>]*> fed9 8f20 vaddlva.u32 r8, fp, q0 |
| [^>]*> fed9 8f02 vaddlv.u32 r8, fp, q1 |
| [^>]*> fed9 8f22 vaddlva.u32 r8, fp, q1 |
| [^>]*> fed9 8f04 vaddlv.u32 r8, fp, q2 |
| [^>]*> fed9 8f24 vaddlva.u32 r8, fp, q2 |
| [^>]*> fed9 8f08 vaddlv.u32 r8, fp, q4 |
| [^>]*> fed9 8f28 vaddlva.u32 r8, fp, q4 |
| [^>]*> fed9 8f0e vaddlv.u32 r8, fp, q7 |
| [^>]*> fed9 8f2e vaddlva.u32 r8, fp, q7 |
| [^>]*> fe89 af00 vaddlv.u32 sl, r1, q0 |
| [^>]*> fe89 af20 vaddlva.u32 sl, r1, q0 |
| [^>]*> fe89 af02 vaddlv.u32 sl, r1, q1 |
| [^>]*> fe89 af22 vaddlva.u32 sl, r1, q1 |
| [^>]*> fe89 af04 vaddlv.u32 sl, r1, q2 |
| [^>]*> fe89 af24 vaddlva.u32 sl, r1, q2 |
| [^>]*> fe89 af08 vaddlv.u32 sl, r1, q4 |
| [^>]*> fe89 af28 vaddlva.u32 sl, r1, q4 |
| [^>]*> fe89 af0e vaddlv.u32 sl, r1, q7 |
| [^>]*> fe89 af2e vaddlva.u32 sl, r1, q7 |
| [^>]*> fe99 af00 vaddlv.u32 sl, r3, q0 |
| [^>]*> fe99 af20 vaddlva.u32 sl, r3, q0 |
| [^>]*> fe99 af02 vaddlv.u32 sl, r3, q1 |
| [^>]*> fe99 af22 vaddlva.u32 sl, r3, q1 |
| [^>]*> fe99 af04 vaddlv.u32 sl, r3, q2 |
| [^>]*> fe99 af24 vaddlva.u32 sl, r3, q2 |
| [^>]*> fe99 af08 vaddlv.u32 sl, r3, q4 |
| [^>]*> fe99 af28 vaddlva.u32 sl, r3, q4 |
| [^>]*> fe99 af0e vaddlv.u32 sl, r3, q7 |
| [^>]*> fe99 af2e vaddlva.u32 sl, r3, q7 |
| [^>]*> fea9 af00 vaddlv.u32 sl, r5, q0 |
| [^>]*> fea9 af20 vaddlva.u32 sl, r5, q0 |
| [^>]*> fea9 af02 vaddlv.u32 sl, r5, q1 |
| [^>]*> fea9 af22 vaddlva.u32 sl, r5, q1 |
| [^>]*> fea9 af04 vaddlv.u32 sl, r5, q2 |
| [^>]*> fea9 af24 vaddlva.u32 sl, r5, q2 |
| [^>]*> fea9 af08 vaddlv.u32 sl, r5, q4 |
| [^>]*> fea9 af28 vaddlva.u32 sl, r5, q4 |
| [^>]*> fea9 af0e vaddlv.u32 sl, r5, q7 |
| [^>]*> fea9 af2e vaddlva.u32 sl, r5, q7 |
| [^>]*> feb9 af00 vaddlv.u32 sl, r7, q0 |
| [^>]*> feb9 af20 vaddlva.u32 sl, r7, q0 |
| [^>]*> feb9 af02 vaddlv.u32 sl, r7, q1 |
| [^>]*> feb9 af22 vaddlva.u32 sl, r7, q1 |
| [^>]*> feb9 af04 vaddlv.u32 sl, r7, q2 |
| [^>]*> feb9 af24 vaddlva.u32 sl, r7, q2 |
| [^>]*> feb9 af08 vaddlv.u32 sl, r7, q4 |
| [^>]*> feb9 af28 vaddlva.u32 sl, r7, q4 |
| [^>]*> feb9 af0e vaddlv.u32 sl, r7, q7 |
| [^>]*> feb9 af2e vaddlva.u32 sl, r7, q7 |
| [^>]*> fec9 af00 vaddlv.u32 sl, r9, q0 |
| [^>]*> fec9 af20 vaddlva.u32 sl, r9, q0 |
| [^>]*> fec9 af02 vaddlv.u32 sl, r9, q1 |
| [^>]*> fec9 af22 vaddlva.u32 sl, r9, q1 |
| [^>]*> fec9 af04 vaddlv.u32 sl, r9, q2 |
| [^>]*> fec9 af24 vaddlva.u32 sl, r9, q2 |
| [^>]*> fec9 af08 vaddlv.u32 sl, r9, q4 |
| [^>]*> fec9 af28 vaddlva.u32 sl, r9, q4 |
| [^>]*> fec9 af0e vaddlv.u32 sl, r9, q7 |
| [^>]*> fec9 af2e vaddlva.u32 sl, r9, q7 |
| [^>]*> fed9 af00 vaddlv.u32 sl, fp, q0 |
| [^>]*> fed9 af20 vaddlva.u32 sl, fp, q0 |
| [^>]*> fed9 af02 vaddlv.u32 sl, fp, q1 |
| [^>]*> fed9 af22 vaddlva.u32 sl, fp, q1 |
| [^>]*> fed9 af04 vaddlv.u32 sl, fp, q2 |
| [^>]*> fed9 af24 vaddlva.u32 sl, fp, q2 |
| [^>]*> fed9 af08 vaddlv.u32 sl, fp, q4 |
| [^>]*> fed9 af28 vaddlva.u32 sl, fp, q4 |
| [^>]*> fed9 af0e vaddlv.u32 sl, fp, q7 |
| [^>]*> fed9 af2e vaddlva.u32 sl, fp, q7 |
| [^>]*> fe89 cf00 vaddlv.u32 ip, r1, q0 |
| [^>]*> fe89 cf20 vaddlva.u32 ip, r1, q0 |
| [^>]*> fe89 cf02 vaddlv.u32 ip, r1, q1 |
| [^>]*> fe89 cf22 vaddlva.u32 ip, r1, q1 |
| [^>]*> fe89 cf04 vaddlv.u32 ip, r1, q2 |
| [^>]*> fe89 cf24 vaddlva.u32 ip, r1, q2 |
| [^>]*> fe89 cf08 vaddlv.u32 ip, r1, q4 |
| [^>]*> fe89 cf28 vaddlva.u32 ip, r1, q4 |
| [^>]*> fe89 cf0e vaddlv.u32 ip, r1, q7 |
| [^>]*> fe89 cf2e vaddlva.u32 ip, r1, q7 |
| [^>]*> fe99 cf00 vaddlv.u32 ip, r3, q0 |
| [^>]*> fe99 cf20 vaddlva.u32 ip, r3, q0 |
| [^>]*> fe99 cf02 vaddlv.u32 ip, r3, q1 |
| [^>]*> fe99 cf22 vaddlva.u32 ip, r3, q1 |
| [^>]*> fe99 cf04 vaddlv.u32 ip, r3, q2 |
| [^>]*> fe99 cf24 vaddlva.u32 ip, r3, q2 |
| [^>]*> fe99 cf08 vaddlv.u32 ip, r3, q4 |
| [^>]*> fe99 cf28 vaddlva.u32 ip, r3, q4 |
| [^>]*> fe99 cf0e vaddlv.u32 ip, r3, q7 |
| [^>]*> fe99 cf2e vaddlva.u32 ip, r3, q7 |
| [^>]*> fea9 cf00 vaddlv.u32 ip, r5, q0 |
| [^>]*> fea9 cf20 vaddlva.u32 ip, r5, q0 |
| [^>]*> fea9 cf02 vaddlv.u32 ip, r5, q1 |
| [^>]*> fea9 cf22 vaddlva.u32 ip, r5, q1 |
| [^>]*> fea9 cf04 vaddlv.u32 ip, r5, q2 |
| [^>]*> fea9 cf24 vaddlva.u32 ip, r5, q2 |
| [^>]*> fea9 cf08 vaddlv.u32 ip, r5, q4 |
| [^>]*> fea9 cf28 vaddlva.u32 ip, r5, q4 |
| [^>]*> fea9 cf0e vaddlv.u32 ip, r5, q7 |
| [^>]*> fea9 cf2e vaddlva.u32 ip, r5, q7 |
| [^>]*> feb9 cf00 vaddlv.u32 ip, r7, q0 |
| [^>]*> feb9 cf20 vaddlva.u32 ip, r7, q0 |
| [^>]*> feb9 cf02 vaddlv.u32 ip, r7, q1 |
| [^>]*> feb9 cf22 vaddlva.u32 ip, r7, q1 |
| [^>]*> feb9 cf04 vaddlv.u32 ip, r7, q2 |
| [^>]*> feb9 cf24 vaddlva.u32 ip, r7, q2 |
| [^>]*> feb9 cf08 vaddlv.u32 ip, r7, q4 |
| [^>]*> feb9 cf28 vaddlva.u32 ip, r7, q4 |
| [^>]*> feb9 cf0e vaddlv.u32 ip, r7, q7 |
| [^>]*> feb9 cf2e vaddlva.u32 ip, r7, q7 |
| [^>]*> fec9 cf00 vaddlv.u32 ip, r9, q0 |
| [^>]*> fec9 cf20 vaddlva.u32 ip, r9, q0 |
| [^>]*> fec9 cf02 vaddlv.u32 ip, r9, q1 |
| [^>]*> fec9 cf22 vaddlva.u32 ip, r9, q1 |
| [^>]*> fec9 cf04 vaddlv.u32 ip, r9, q2 |
| [^>]*> fec9 cf24 vaddlva.u32 ip, r9, q2 |
| [^>]*> fec9 cf08 vaddlv.u32 ip, r9, q4 |
| [^>]*> fec9 cf28 vaddlva.u32 ip, r9, q4 |
| [^>]*> fec9 cf0e vaddlv.u32 ip, r9, q7 |
| [^>]*> fec9 cf2e vaddlva.u32 ip, r9, q7 |
| [^>]*> fed9 cf00 vaddlv.u32 ip, fp, q0 |
| [^>]*> fed9 cf20 vaddlva.u32 ip, fp, q0 |
| [^>]*> fed9 cf02 vaddlv.u32 ip, fp, q1 |
| [^>]*> fed9 cf22 vaddlva.u32 ip, fp, q1 |
| [^>]*> fed9 cf04 vaddlv.u32 ip, fp, q2 |
| [^>]*> fed9 cf24 vaddlva.u32 ip, fp, q2 |
| [^>]*> fed9 cf08 vaddlv.u32 ip, fp, q4 |
| [^>]*> fed9 cf28 vaddlva.u32 ip, fp, q4 |
| [^>]*> fed9 cf0e vaddlv.u32 ip, fp, q7 |
| [^>]*> fed9 cf2e vaddlva.u32 ip, fp, q7 |
| [^>]*> fe89 ef00 vaddlv.u32 lr, r1, q0 |
| [^>]*> fe89 ef20 vaddlva.u32 lr, r1, q0 |
| [^>]*> fe89 ef02 vaddlv.u32 lr, r1, q1 |
| [^>]*> fe89 ef22 vaddlva.u32 lr, r1, q1 |
| [^>]*> fe89 ef04 vaddlv.u32 lr, r1, q2 |
| [^>]*> fe89 ef24 vaddlva.u32 lr, r1, q2 |
| [^>]*> fe89 ef08 vaddlv.u32 lr, r1, q4 |
| [^>]*> fe89 ef28 vaddlva.u32 lr, r1, q4 |
| [^>]*> fe89 ef0e vaddlv.u32 lr, r1, q7 |
| [^>]*> fe89 ef2e vaddlva.u32 lr, r1, q7 |
| [^>]*> fe99 ef00 vaddlv.u32 lr, r3, q0 |
| [^>]*> fe99 ef20 vaddlva.u32 lr, r3, q0 |
| [^>]*> fe99 ef02 vaddlv.u32 lr, r3, q1 |
| [^>]*> fe99 ef22 vaddlva.u32 lr, r3, q1 |
| [^>]*> fe99 ef04 vaddlv.u32 lr, r3, q2 |
| [^>]*> fe99 ef24 vaddlva.u32 lr, r3, q2 |
| [^>]*> fe99 ef08 vaddlv.u32 lr, r3, q4 |
| [^>]*> fe99 ef28 vaddlva.u32 lr, r3, q4 |
| [^>]*> fe99 ef0e vaddlv.u32 lr, r3, q7 |
| [^>]*> fe99 ef2e vaddlva.u32 lr, r3, q7 |
| [^>]*> fea9 ef00 vaddlv.u32 lr, r5, q0 |
| [^>]*> fea9 ef20 vaddlva.u32 lr, r5, q0 |
| [^>]*> fea9 ef02 vaddlv.u32 lr, r5, q1 |
| [^>]*> fea9 ef22 vaddlva.u32 lr, r5, q1 |
| [^>]*> fea9 ef04 vaddlv.u32 lr, r5, q2 |
| [^>]*> fea9 ef24 vaddlva.u32 lr, r5, q2 |
| [^>]*> fea9 ef08 vaddlv.u32 lr, r5, q4 |
| [^>]*> fea9 ef28 vaddlva.u32 lr, r5, q4 |
| [^>]*> fea9 ef0e vaddlv.u32 lr, r5, q7 |
| [^>]*> fea9 ef2e vaddlva.u32 lr, r5, q7 |
| [^>]*> feb9 ef00 vaddlv.u32 lr, r7, q0 |
| [^>]*> feb9 ef20 vaddlva.u32 lr, r7, q0 |
| [^>]*> feb9 ef02 vaddlv.u32 lr, r7, q1 |
| [^>]*> feb9 ef22 vaddlva.u32 lr, r7, q1 |
| [^>]*> feb9 ef04 vaddlv.u32 lr, r7, q2 |
| [^>]*> feb9 ef24 vaddlva.u32 lr, r7, q2 |
| [^>]*> feb9 ef08 vaddlv.u32 lr, r7, q4 |
| [^>]*> feb9 ef28 vaddlva.u32 lr, r7, q4 |
| [^>]*> feb9 ef0e vaddlv.u32 lr, r7, q7 |
| [^>]*> feb9 ef2e vaddlva.u32 lr, r7, q7 |
| [^>]*> fec9 ef00 vaddlv.u32 lr, r9, q0 |
| [^>]*> fec9 ef20 vaddlva.u32 lr, r9, q0 |
| [^>]*> fec9 ef02 vaddlv.u32 lr, r9, q1 |
| [^>]*> fec9 ef22 vaddlva.u32 lr, r9, q1 |
| [^>]*> fec9 ef04 vaddlv.u32 lr, r9, q2 |
| [^>]*> fec9 ef24 vaddlva.u32 lr, r9, q2 |
| [^>]*> fec9 ef08 vaddlv.u32 lr, r9, q4 |
| [^>]*> fec9 ef28 vaddlva.u32 lr, r9, q4 |
| [^>]*> fec9 ef0e vaddlv.u32 lr, r9, q7 |
| [^>]*> fec9 ef2e vaddlva.u32 lr, r9, q7 |
| [^>]*> fed9 ef00 vaddlv.u32 lr, fp, q0 |
| [^>]*> fed9 ef20 vaddlva.u32 lr, fp, q0 |
| [^>]*> fed9 ef02 vaddlv.u32 lr, fp, q1 |
| [^>]*> fed9 ef22 vaddlva.u32 lr, fp, q1 |
| [^>]*> fed9 ef04 vaddlv.u32 lr, fp, q2 |
| [^>]*> fed9 ef24 vaddlva.u32 lr, fp, q2 |
| [^>]*> fed9 ef08 vaddlv.u32 lr, fp, q4 |
| [^>]*> fed9 ef28 vaddlva.u32 lr, fp, q4 |
| [^>]*> fed9 ef0e vaddlv.u32 lr, fp, q7 |
| [^>]*> fed9 ef2e vaddlva.u32 lr, fp, q7 |
| [^>]*> fe31 af4d vpsttee |
| [^>]*> ee89 0f00 vaddlvt.s32 r0, r1, q0 |
| [^>]*> ee89 0f20 vaddlvat.s32 r0, r1, q0 |
| [^>]*> fe89 0f00 vaddlve.u32 r0, r1, q0 |
| [^>]*> fe89 0f20 vaddlvae.u32 r0, r1, q0 |
