| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vcmul.i16 q0,q1,q2,#0' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vcmul.f64 q0,q1,q2,#0' |
| [^:]*:12: Error: immediate out of range -- `vcmul.f32 q0,q1,q2,#20' |
| [^:]*:13: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE |
| [^:]*:14: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0' |
| [^:]*:18: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0' |
| [^:]*:20: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0' |
| [^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vcmult.f32 q0,q1,q2,#0' |
| [^:]*:23: Error: instruction missing MVE vector predication code -- `vcmul.f32 q0,q1,q2,#0' |