| [^:]*: Assembler messages: |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Error: bad type in SIMD instruction -- `vcvt.f64.f16 q0,q1' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vcvt.f64.f32 q0,q1' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vcvt.f16.f64 q0,q1' |
| [^:]*:18: Error: bad type in SIMD instruction -- `vcvt.f32.f64 q0,q1' |
| [^:]*:20: Error: syntax error -- `vcvtteq.f16.f32 q0,q1' |
| [^:]*:21: Error: syntax error -- `vcvtteq.f16.f32 q0,q1' |
| [^:]*:23: Error: syntax error -- `vcvtteq.f16.f32 q0,q1' |
| [^:]*:24: Error: vector predicated instruction should be in VPT/VPST block -- `vcvttt.f16.f32 q0,q1' |
| [^:]*:26: Error: instruction missing MVE vector predication code -- `vcvtt.f16.f32 q0,q1' |
| [^:]*:28: Error: syntax error -- `vcvtbeq.f16.f32 q0,q1' |
| [^:]*:29: Error: syntax error -- `vcvtbeq.f16.f32 q0,q1' |
| [^:]*:31: Error: syntax error -- `vcvtbeq.f16.f32 q0,q1' |
| [^:]*:32: Error: vector predicated instruction should be in VPT/VPST block -- `vcvtbt.f16.f32 q0,q1' |
| [^:]*:34: Error: instruction missing MVE vector predication code -- `vcvtb.f16.f32 q0,q1' |