| # name: MVE vdup instructions |
| # as: -march=armv8.1-m.main+mve.fp |
| # objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main |
| |
| .*: +file format .*arm.* |
| |
| Disassembly of section .text: |
| [^>]*> eee0 0b10 vdup.8 q0, r0 |
| [^>]*> eee0 1b10 vdup.8 q0, r1 |
| [^>]*> eee0 2b10 vdup.8 q0, r2 |
| [^>]*> eee0 4b10 vdup.8 q0, r4 |
| [^>]*> eee0 7b10 vdup.8 q0, r7 |
| [^>]*> eee0 8b10 vdup.8 q0, r8 |
| [^>]*> eee0 ab10 vdup.8 q0, sl |
| [^>]*> eee0 bb10 vdup.8 q0, fp |
| [^>]*> eee0 cb10 vdup.8 q0, ip |
| [^>]*> eee0 eb10 vdup.8 q0, lr |
| [^>]*> eee2 0b10 vdup.8 q1, r0 |
| [^>]*> eee2 1b10 vdup.8 q1, r1 |
| [^>]*> eee2 2b10 vdup.8 q1, r2 |
| [^>]*> eee2 4b10 vdup.8 q1, r4 |
| [^>]*> eee2 7b10 vdup.8 q1, r7 |
| [^>]*> eee2 8b10 vdup.8 q1, r8 |
| [^>]*> eee2 ab10 vdup.8 q1, sl |
| [^>]*> eee2 bb10 vdup.8 q1, fp |
| [^>]*> eee2 cb10 vdup.8 q1, ip |
| [^>]*> eee2 eb10 vdup.8 q1, lr |
| [^>]*> eee4 0b10 vdup.8 q2, r0 |
| [^>]*> eee4 1b10 vdup.8 q2, r1 |
| [^>]*> eee4 2b10 vdup.8 q2, r2 |
| [^>]*> eee4 4b10 vdup.8 q2, r4 |
| [^>]*> eee4 7b10 vdup.8 q2, r7 |
| [^>]*> eee4 8b10 vdup.8 q2, r8 |
| [^>]*> eee4 ab10 vdup.8 q2, sl |
| [^>]*> eee4 bb10 vdup.8 q2, fp |
| [^>]*> eee4 cb10 vdup.8 q2, ip |
| [^>]*> eee4 eb10 vdup.8 q2, lr |
| [^>]*> eee8 0b10 vdup.8 q4, r0 |
| [^>]*> eee8 1b10 vdup.8 q4, r1 |
| [^>]*> eee8 2b10 vdup.8 q4, r2 |
| [^>]*> eee8 4b10 vdup.8 q4, r4 |
| [^>]*> eee8 7b10 vdup.8 q4, r7 |
| [^>]*> eee8 8b10 vdup.8 q4, r8 |
| [^>]*> eee8 ab10 vdup.8 q4, sl |
| [^>]*> eee8 bb10 vdup.8 q4, fp |
| [^>]*> eee8 cb10 vdup.8 q4, ip |
| [^>]*> eee8 eb10 vdup.8 q4, lr |
| [^>]*> eeee 0b10 vdup.8 q7, r0 |
| [^>]*> eeee 1b10 vdup.8 q7, r1 |
| [^>]*> eeee 2b10 vdup.8 q7, r2 |
| [^>]*> eeee 4b10 vdup.8 q7, r4 |
| [^>]*> eeee 7b10 vdup.8 q7, r7 |
| [^>]*> eeee 8b10 vdup.8 q7, r8 |
| [^>]*> eeee ab10 vdup.8 q7, sl |
| [^>]*> eeee bb10 vdup.8 q7, fp |
| [^>]*> eeee cb10 vdup.8 q7, ip |
| [^>]*> eeee eb10 vdup.8 q7, lr |
| [^>]*> eea0 0b30 vdup.16 q0, r0 |
| [^>]*> eea0 1b30 vdup.16 q0, r1 |
| [^>]*> eea0 2b30 vdup.16 q0, r2 |
| [^>]*> eea0 4b30 vdup.16 q0, r4 |
| [^>]*> eea0 7b30 vdup.16 q0, r7 |
| [^>]*> eea0 8b30 vdup.16 q0, r8 |
| [^>]*> eea0 ab30 vdup.16 q0, sl |
| [^>]*> eea0 bb30 vdup.16 q0, fp |
| [^>]*> eea0 cb30 vdup.16 q0, ip |
| [^>]*> eea0 eb30 vdup.16 q0, lr |
| [^>]*> eea2 0b30 vdup.16 q1, r0 |
| [^>]*> eea2 1b30 vdup.16 q1, r1 |
| [^>]*> eea2 2b30 vdup.16 q1, r2 |
| [^>]*> eea2 4b30 vdup.16 q1, r4 |
| [^>]*> eea2 7b30 vdup.16 q1, r7 |
| [^>]*> eea2 8b30 vdup.16 q1, r8 |
| [^>]*> eea2 ab30 vdup.16 q1, sl |
| [^>]*> eea2 bb30 vdup.16 q1, fp |
| [^>]*> eea2 cb30 vdup.16 q1, ip |
| [^>]*> eea2 eb30 vdup.16 q1, lr |
| [^>]*> eea4 0b30 vdup.16 q2, r0 |
| [^>]*> eea4 1b30 vdup.16 q2, r1 |
| [^>]*> eea4 2b30 vdup.16 q2, r2 |
| [^>]*> eea4 4b30 vdup.16 q2, r4 |
| [^>]*> eea4 7b30 vdup.16 q2, r7 |
| [^>]*> eea4 8b30 vdup.16 q2, r8 |
| [^>]*> eea4 ab30 vdup.16 q2, sl |
| [^>]*> eea4 bb30 vdup.16 q2, fp |
| [^>]*> eea4 cb30 vdup.16 q2, ip |
| [^>]*> eea4 eb30 vdup.16 q2, lr |
| [^>]*> eea8 0b30 vdup.16 q4, r0 |
| [^>]*> eea8 1b30 vdup.16 q4, r1 |
| [^>]*> eea8 2b30 vdup.16 q4, r2 |
| [^>]*> eea8 4b30 vdup.16 q4, r4 |
| [^>]*> eea8 7b30 vdup.16 q4, r7 |
| [^>]*> eea8 8b30 vdup.16 q4, r8 |
| [^>]*> eea8 ab30 vdup.16 q4, sl |
| [^>]*> eea8 bb30 vdup.16 q4, fp |
| [^>]*> eea8 cb30 vdup.16 q4, ip |
| [^>]*> eea8 eb30 vdup.16 q4, lr |
| [^>]*> eeae 0b30 vdup.16 q7, r0 |
| [^>]*> eeae 1b30 vdup.16 q7, r1 |
| [^>]*> eeae 2b30 vdup.16 q7, r2 |
| [^>]*> eeae 4b30 vdup.16 q7, r4 |
| [^>]*> eeae 7b30 vdup.16 q7, r7 |
| [^>]*> eeae 8b30 vdup.16 q7, r8 |
| [^>]*> eeae ab30 vdup.16 q7, sl |
| [^>]*> eeae bb30 vdup.16 q7, fp |
| [^>]*> eeae cb30 vdup.16 q7, ip |
| [^>]*> eeae eb30 vdup.16 q7, lr |
| [^>]*> eea0 0b10 vdup.32 q0, r0 |
| [^>]*> eea0 1b10 vdup.32 q0, r1 |
| [^>]*> eea0 2b10 vdup.32 q0, r2 |
| [^>]*> eea0 4b10 vdup.32 q0, r4 |
| [^>]*> eea0 7b10 vdup.32 q0, r7 |
| [^>]*> eea0 8b10 vdup.32 q0, r8 |
| [^>]*> eea0 ab10 vdup.32 q0, sl |
| [^>]*> eea0 bb10 vdup.32 q0, fp |
| [^>]*> eea0 cb10 vdup.32 q0, ip |
| [^>]*> eea0 eb10 vdup.32 q0, lr |
| [^>]*> eea2 0b10 vdup.32 q1, r0 |
| [^>]*> eea2 1b10 vdup.32 q1, r1 |
| [^>]*> eea2 2b10 vdup.32 q1, r2 |
| [^>]*> eea2 4b10 vdup.32 q1, r4 |
| [^>]*> eea2 7b10 vdup.32 q1, r7 |
| [^>]*> eea2 8b10 vdup.32 q1, r8 |
| [^>]*> eea2 ab10 vdup.32 q1, sl |
| [^>]*> eea2 bb10 vdup.32 q1, fp |
| [^>]*> eea2 cb10 vdup.32 q1, ip |
| [^>]*> eea2 eb10 vdup.32 q1, lr |
| [^>]*> eea4 0b10 vdup.32 q2, r0 |
| [^>]*> eea4 1b10 vdup.32 q2, r1 |
| [^>]*> eea4 2b10 vdup.32 q2, r2 |
| [^>]*> eea4 4b10 vdup.32 q2, r4 |
| [^>]*> eea4 7b10 vdup.32 q2, r7 |
| [^>]*> eea4 8b10 vdup.32 q2, r8 |
| [^>]*> eea4 ab10 vdup.32 q2, sl |
| [^>]*> eea4 bb10 vdup.32 q2, fp |
| [^>]*> eea4 cb10 vdup.32 q2, ip |
| [^>]*> eea4 eb10 vdup.32 q2, lr |
| [^>]*> eea8 0b10 vdup.32 q4, r0 |
| [^>]*> eea8 1b10 vdup.32 q4, r1 |
| [^>]*> eea8 2b10 vdup.32 q4, r2 |
| [^>]*> eea8 4b10 vdup.32 q4, r4 |
| [^>]*> eea8 7b10 vdup.32 q4, r7 |
| [^>]*> eea8 8b10 vdup.32 q4, r8 |
| [^>]*> eea8 ab10 vdup.32 q4, sl |
| [^>]*> eea8 bb10 vdup.32 q4, fp |
| [^>]*> eea8 cb10 vdup.32 q4, ip |
| [^>]*> eea8 eb10 vdup.32 q4, lr |
| [^>]*> eeae 0b10 vdup.32 q7, r0 |
| [^>]*> eeae 1b10 vdup.32 q7, r1 |
| [^>]*> eeae 2b10 vdup.32 q7, r2 |
| [^>]*> eeae 4b10 vdup.32 q7, r4 |
| [^>]*> eeae 7b10 vdup.32 q7, r7 |
| [^>]*> eeae 8b10 vdup.32 q7, r8 |
| [^>]*> eeae ab10 vdup.32 q7, sl |
| [^>]*> eeae bb10 vdup.32 q7, fp |
| [^>]*> eeae cb10 vdup.32 q7, ip |
| [^>]*> eeae eb10 vdup.32 q7, lr |
| [^>]*> fe71 ef4d vpstete |
| [^>]*> eee0 1b10 vdupt.8 q0, r1 |
| [^>]*> eeae 0b30 vdupe.16 q7, r0 |
| [^>]*> eea0 eb10 vdupt.32 q0, lr |
| [^>]*> eea6 2b10 vdupe.32 q3, r2 |
