| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vhcadd.u8 q0,q1,q2,#90' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vhcadd.i8 q0,q1,q2,#90' |
| [^:]*:12: Error: bad type in SIMD instruction -- `vhcadd.s64 q0,q1,q2,#90' |
| [^:]*:13: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#0' |
| [^:]*:14: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#180' |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90' |
| [^:]*:18: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90' |
| [^:]*:20: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90' |
| [^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vhcaddt.s8 q0,q1,q2,#90' |
| [^:]*:23: Error: instruction missing MVE vector predication code -- `vhcadd.s8 q0,q1,q2,#90' |
