blob: 17d5c74602151bc387d082a95cc050d5ab3e565f [file] [log] [blame]
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmax.s64 q0,q1,q2'
[^:]*:11: Error: selected FPU does not support instruction -- `vmax.f16 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vmax.u64 q0,q1,q2'
[^:]*:13: Error: selected FPU does not support instruction -- `vmax.f32 q0,q1,q2'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'
[^:]*:18: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'
[^:]*:20: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'
[^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vmaxt.s16 q0,q1,q2'
[^:]*:23: Error: instruction missing MVE vector predication code -- `vmax.s16 q0,q1,q2'
[^:]*:25: Error: syntax error -- `vmineq.u32 q0,q1,q2'
[^:]*:26: Error: syntax error -- `vmineq.u32 q0,q1,q2'
[^:]*:28: Error: syntax error -- `vmineq.u32 q0,q1,q2'
[^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vmint.u32 q0,q1,q2'
[^:]*:31: Error: instruction missing MVE vector predication code -- `vmin.u32 q0,q1,q2'