| # name: MVE vmaxv and vminv instructions |
| # as: -march=armv8.1-m.main+mve.fp |
| # objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main |
| |
| .*: +file format .*arm.* |
| |
| Disassembly of section .text: |
| [^>]*> fee2 0f00 vmaxv.u8 r0, q0 |
| [^>]*> fee2 0f02 vmaxv.u8 r0, q1 |
| [^>]*> fee2 0f04 vmaxv.u8 r0, q2 |
| [^>]*> fee2 0f08 vmaxv.u8 r0, q4 |
| [^>]*> fee2 0f0e vmaxv.u8 r0, q7 |
| [^>]*> fee2 1f00 vmaxv.u8 r1, q0 |
| [^>]*> fee2 1f02 vmaxv.u8 r1, q1 |
| [^>]*> fee2 1f04 vmaxv.u8 r1, q2 |
| [^>]*> fee2 1f08 vmaxv.u8 r1, q4 |
| [^>]*> fee2 1f0e vmaxv.u8 r1, q7 |
| [^>]*> fee2 2f00 vmaxv.u8 r2, q0 |
| [^>]*> fee2 2f02 vmaxv.u8 r2, q1 |
| [^>]*> fee2 2f04 vmaxv.u8 r2, q2 |
| [^>]*> fee2 2f08 vmaxv.u8 r2, q4 |
| [^>]*> fee2 2f0e vmaxv.u8 r2, q7 |
| [^>]*> fee2 4f00 vmaxv.u8 r4, q0 |
| [^>]*> fee2 4f02 vmaxv.u8 r4, q1 |
| [^>]*> fee2 4f04 vmaxv.u8 r4, q2 |
| [^>]*> fee2 4f08 vmaxv.u8 r4, q4 |
| [^>]*> fee2 4f0e vmaxv.u8 r4, q7 |
| [^>]*> fee2 7f00 vmaxv.u8 r7, q0 |
| [^>]*> fee2 7f02 vmaxv.u8 r7, q1 |
| [^>]*> fee2 7f04 vmaxv.u8 r7, q2 |
| [^>]*> fee2 7f08 vmaxv.u8 r7, q4 |
| [^>]*> fee2 7f0e vmaxv.u8 r7, q7 |
| [^>]*> fee2 8f00 vmaxv.u8 r8, q0 |
| [^>]*> fee2 8f02 vmaxv.u8 r8, q1 |
| [^>]*> fee2 8f04 vmaxv.u8 r8, q2 |
| [^>]*> fee2 8f08 vmaxv.u8 r8, q4 |
| [^>]*> fee2 8f0e vmaxv.u8 r8, q7 |
| [^>]*> fee2 af00 vmaxv.u8 sl, q0 |
| [^>]*> fee2 af02 vmaxv.u8 sl, q1 |
| [^>]*> fee2 af04 vmaxv.u8 sl, q2 |
| [^>]*> fee2 af08 vmaxv.u8 sl, q4 |
| [^>]*> fee2 af0e vmaxv.u8 sl, q7 |
| [^>]*> fee2 ef00 vmaxv.u8 lr, q0 |
| [^>]*> fee2 ef02 vmaxv.u8 lr, q1 |
| [^>]*> fee2 ef04 vmaxv.u8 lr, q2 |
| [^>]*> fee2 ef08 vmaxv.u8 lr, q4 |
| [^>]*> fee2 ef0e vmaxv.u8 lr, q7 |
| [^>]*> fee2 0f80 vminv.u8 r0, q0 |
| [^>]*> fee2 0f82 vminv.u8 r0, q1 |
| [^>]*> fee2 0f84 vminv.u8 r0, q2 |
| [^>]*> fee2 0f88 vminv.u8 r0, q4 |
| [^>]*> fee2 0f8e vminv.u8 r0, q7 |
| [^>]*> fee2 1f80 vminv.u8 r1, q0 |
| [^>]*> fee2 1f82 vminv.u8 r1, q1 |
| [^>]*> fee2 1f84 vminv.u8 r1, q2 |
| [^>]*> fee2 1f88 vminv.u8 r1, q4 |
| [^>]*> fee2 1f8e vminv.u8 r1, q7 |
| [^>]*> fee2 2f80 vminv.u8 r2, q0 |
| [^>]*> fee2 2f82 vminv.u8 r2, q1 |
| [^>]*> fee2 2f84 vminv.u8 r2, q2 |
| [^>]*> fee2 2f88 vminv.u8 r2, q4 |
| [^>]*> fee2 2f8e vminv.u8 r2, q7 |
| [^>]*> fee2 4f80 vminv.u8 r4, q0 |
| [^>]*> fee2 4f82 vminv.u8 r4, q1 |
| [^>]*> fee2 4f84 vminv.u8 r4, q2 |
| [^>]*> fee2 4f88 vminv.u8 r4, q4 |
| [^>]*> fee2 4f8e vminv.u8 r4, q7 |
| [^>]*> fee2 7f80 vminv.u8 r7, q0 |
| [^>]*> fee2 7f82 vminv.u8 r7, q1 |
| [^>]*> fee2 7f84 vminv.u8 r7, q2 |
| [^>]*> fee2 7f88 vminv.u8 r7, q4 |
| [^>]*> fee2 7f8e vminv.u8 r7, q7 |
| [^>]*> fee2 8f80 vminv.u8 r8, q0 |
| [^>]*> fee2 8f82 vminv.u8 r8, q1 |
| [^>]*> fee2 8f84 vminv.u8 r8, q2 |
| [^>]*> fee2 8f88 vminv.u8 r8, q4 |
| [^>]*> fee2 8f8e vminv.u8 r8, q7 |
| [^>]*> fee2 af80 vminv.u8 sl, q0 |
| [^>]*> fee2 af82 vminv.u8 sl, q1 |
| [^>]*> fee2 af84 vminv.u8 sl, q2 |
| [^>]*> fee2 af88 vminv.u8 sl, q4 |
| [^>]*> fee2 af8e vminv.u8 sl, q7 |
| [^>]*> fee2 ef80 vminv.u8 lr, q0 |
| [^>]*> fee2 ef82 vminv.u8 lr, q1 |
| [^>]*> fee2 ef84 vminv.u8 lr, q2 |
| [^>]*> fee2 ef88 vminv.u8 lr, q4 |
| [^>]*> fee2 ef8e vminv.u8 lr, q7 |
| [^>]*> eee2 0f00 vmaxv.s8 r0, q0 |
| [^>]*> eee2 0f02 vmaxv.s8 r0, q1 |
| [^>]*> eee2 0f04 vmaxv.s8 r0, q2 |
| [^>]*> eee2 0f08 vmaxv.s8 r0, q4 |
| [^>]*> eee2 0f0e vmaxv.s8 r0, q7 |
| [^>]*> eee2 1f00 vmaxv.s8 r1, q0 |
| [^>]*> eee2 1f02 vmaxv.s8 r1, q1 |
| [^>]*> eee2 1f04 vmaxv.s8 r1, q2 |
| [^>]*> eee2 1f08 vmaxv.s8 r1, q4 |
| [^>]*> eee2 1f0e vmaxv.s8 r1, q7 |
| [^>]*> eee2 2f00 vmaxv.s8 r2, q0 |
| [^>]*> eee2 2f02 vmaxv.s8 r2, q1 |
| [^>]*> eee2 2f04 vmaxv.s8 r2, q2 |
| [^>]*> eee2 2f08 vmaxv.s8 r2, q4 |
| [^>]*> eee2 2f0e vmaxv.s8 r2, q7 |
| [^>]*> eee2 4f00 vmaxv.s8 r4, q0 |
| [^>]*> eee2 4f02 vmaxv.s8 r4, q1 |
| [^>]*> eee2 4f04 vmaxv.s8 r4, q2 |
| [^>]*> eee2 4f08 vmaxv.s8 r4, q4 |
| [^>]*> eee2 4f0e vmaxv.s8 r4, q7 |
| [^>]*> eee2 7f00 vmaxv.s8 r7, q0 |
| [^>]*> eee2 7f02 vmaxv.s8 r7, q1 |
| [^>]*> eee2 7f04 vmaxv.s8 r7, q2 |
| [^>]*> eee2 7f08 vmaxv.s8 r7, q4 |
| [^>]*> eee2 7f0e vmaxv.s8 r7, q7 |
| [^>]*> eee2 8f00 vmaxv.s8 r8, q0 |
| [^>]*> eee2 8f02 vmaxv.s8 r8, q1 |
| [^>]*> eee2 8f04 vmaxv.s8 r8, q2 |
| [^>]*> eee2 8f08 vmaxv.s8 r8, q4 |
| [^>]*> eee2 8f0e vmaxv.s8 r8, q7 |
| [^>]*> eee2 af00 vmaxv.s8 sl, q0 |
| [^>]*> eee2 af02 vmaxv.s8 sl, q1 |
| [^>]*> eee2 af04 vmaxv.s8 sl, q2 |
| [^>]*> eee2 af08 vmaxv.s8 sl, q4 |
| [^>]*> eee2 af0e vmaxv.s8 sl, q7 |
| [^>]*> eee2 ef00 vmaxv.s8 lr, q0 |
| [^>]*> eee2 ef02 vmaxv.s8 lr, q1 |
| [^>]*> eee2 ef04 vmaxv.s8 lr, q2 |
| [^>]*> eee2 ef08 vmaxv.s8 lr, q4 |
| [^>]*> eee2 ef0e vmaxv.s8 lr, q7 |
| [^>]*> eee2 0f80 vminv.s8 r0, q0 |
| [^>]*> eee2 0f82 vminv.s8 r0, q1 |
| [^>]*> eee2 0f84 vminv.s8 r0, q2 |
| [^>]*> eee2 0f88 vminv.s8 r0, q4 |
| [^>]*> eee2 0f8e vminv.s8 r0, q7 |
| [^>]*> eee2 1f80 vminv.s8 r1, q0 |
| [^>]*> eee2 1f82 vminv.s8 r1, q1 |
| [^>]*> eee2 1f84 vminv.s8 r1, q2 |
| [^>]*> eee2 1f88 vminv.s8 r1, q4 |
| [^>]*> eee2 1f8e vminv.s8 r1, q7 |
| [^>]*> eee2 2f80 vminv.s8 r2, q0 |
| [^>]*> eee2 2f82 vminv.s8 r2, q1 |
| [^>]*> eee2 2f84 vminv.s8 r2, q2 |
| [^>]*> eee2 2f88 vminv.s8 r2, q4 |
| [^>]*> eee2 2f8e vminv.s8 r2, q7 |
| [^>]*> eee2 4f80 vminv.s8 r4, q0 |
| [^>]*> eee2 4f82 vminv.s8 r4, q1 |
| [^>]*> eee2 4f84 vminv.s8 r4, q2 |
| [^>]*> eee2 4f88 vminv.s8 r4, q4 |
| [^>]*> eee2 4f8e vminv.s8 r4, q7 |
| [^>]*> eee2 7f80 vminv.s8 r7, q0 |
| [^>]*> eee2 7f82 vminv.s8 r7, q1 |
| [^>]*> eee2 7f84 vminv.s8 r7, q2 |
| [^>]*> eee2 7f88 vminv.s8 r7, q4 |
| [^>]*> eee2 7f8e vminv.s8 r7, q7 |
| [^>]*> eee2 8f80 vminv.s8 r8, q0 |
| [^>]*> eee2 8f82 vminv.s8 r8, q1 |
| [^>]*> eee2 8f84 vminv.s8 r8, q2 |
| [^>]*> eee2 8f88 vminv.s8 r8, q4 |
| [^>]*> eee2 8f8e vminv.s8 r8, q7 |
| [^>]*> eee2 af80 vminv.s8 sl, q0 |
| [^>]*> eee2 af82 vminv.s8 sl, q1 |
| [^>]*> eee2 af84 vminv.s8 sl, q2 |
| [^>]*> eee2 af88 vminv.s8 sl, q4 |
| [^>]*> eee2 af8e vminv.s8 sl, q7 |
| [^>]*> eee2 ef80 vminv.s8 lr, q0 |
| [^>]*> eee2 ef82 vminv.s8 lr, q1 |
| [^>]*> eee2 ef84 vminv.s8 lr, q2 |
| [^>]*> eee2 ef88 vminv.s8 lr, q4 |
| [^>]*> eee2 ef8e vminv.s8 lr, q7 |
| [^>]*> fee6 0f00 vmaxv.u16 r0, q0 |
| [^>]*> fee6 0f02 vmaxv.u16 r0, q1 |
| [^>]*> fee6 0f04 vmaxv.u16 r0, q2 |
| [^>]*> fee6 0f08 vmaxv.u16 r0, q4 |
| [^>]*> fee6 0f0e vmaxv.u16 r0, q7 |
| [^>]*> fee6 1f00 vmaxv.u16 r1, q0 |
| [^>]*> fee6 1f02 vmaxv.u16 r1, q1 |
| [^>]*> fee6 1f04 vmaxv.u16 r1, q2 |
| [^>]*> fee6 1f08 vmaxv.u16 r1, q4 |
| [^>]*> fee6 1f0e vmaxv.u16 r1, q7 |
| [^>]*> fee6 2f00 vmaxv.u16 r2, q0 |
| [^>]*> fee6 2f02 vmaxv.u16 r2, q1 |
| [^>]*> fee6 2f04 vmaxv.u16 r2, q2 |
| [^>]*> fee6 2f08 vmaxv.u16 r2, q4 |
| [^>]*> fee6 2f0e vmaxv.u16 r2, q7 |
| [^>]*> fee6 4f00 vmaxv.u16 r4, q0 |
| [^>]*> fee6 4f02 vmaxv.u16 r4, q1 |
| [^>]*> fee6 4f04 vmaxv.u16 r4, q2 |
| [^>]*> fee6 4f08 vmaxv.u16 r4, q4 |
| [^>]*> fee6 4f0e vmaxv.u16 r4, q7 |
| [^>]*> fee6 7f00 vmaxv.u16 r7, q0 |
| [^>]*> fee6 7f02 vmaxv.u16 r7, q1 |
| [^>]*> fee6 7f04 vmaxv.u16 r7, q2 |
| [^>]*> fee6 7f08 vmaxv.u16 r7, q4 |
| [^>]*> fee6 7f0e vmaxv.u16 r7, q7 |
| [^>]*> fee6 8f00 vmaxv.u16 r8, q0 |
| [^>]*> fee6 8f02 vmaxv.u16 r8, q1 |
| [^>]*> fee6 8f04 vmaxv.u16 r8, q2 |
| [^>]*> fee6 8f08 vmaxv.u16 r8, q4 |
| [^>]*> fee6 8f0e vmaxv.u16 r8, q7 |
| [^>]*> fee6 af00 vmaxv.u16 sl, q0 |
| [^>]*> fee6 af02 vmaxv.u16 sl, q1 |
| [^>]*> fee6 af04 vmaxv.u16 sl, q2 |
| [^>]*> fee6 af08 vmaxv.u16 sl, q4 |
| [^>]*> fee6 af0e vmaxv.u16 sl, q7 |
| [^>]*> fee6 ef00 vmaxv.u16 lr, q0 |
| [^>]*> fee6 ef02 vmaxv.u16 lr, q1 |
| [^>]*> fee6 ef04 vmaxv.u16 lr, q2 |
| [^>]*> fee6 ef08 vmaxv.u16 lr, q4 |
| [^>]*> fee6 ef0e vmaxv.u16 lr, q7 |
| [^>]*> fee6 0f80 vminv.u16 r0, q0 |
| [^>]*> fee6 0f82 vminv.u16 r0, q1 |
| [^>]*> fee6 0f84 vminv.u16 r0, q2 |
| [^>]*> fee6 0f88 vminv.u16 r0, q4 |
| [^>]*> fee6 0f8e vminv.u16 r0, q7 |
| [^>]*> fee6 1f80 vminv.u16 r1, q0 |
| [^>]*> fee6 1f82 vminv.u16 r1, q1 |
| [^>]*> fee6 1f84 vminv.u16 r1, q2 |
| [^>]*> fee6 1f88 vminv.u16 r1, q4 |
| [^>]*> fee6 1f8e vminv.u16 r1, q7 |
| [^>]*> fee6 2f80 vminv.u16 r2, q0 |
| [^>]*> fee6 2f82 vminv.u16 r2, q1 |
| [^>]*> fee6 2f84 vminv.u16 r2, q2 |
| [^>]*> fee6 2f88 vminv.u16 r2, q4 |
| [^>]*> fee6 2f8e vminv.u16 r2, q7 |
| [^>]*> fee6 4f80 vminv.u16 r4, q0 |
| [^>]*> fee6 4f82 vminv.u16 r4, q1 |
| [^>]*> fee6 4f84 vminv.u16 r4, q2 |
| [^>]*> fee6 4f88 vminv.u16 r4, q4 |
| [^>]*> fee6 4f8e vminv.u16 r4, q7 |
| [^>]*> fee6 7f80 vminv.u16 r7, q0 |
| [^>]*> fee6 7f82 vminv.u16 r7, q1 |
| [^>]*> fee6 7f84 vminv.u16 r7, q2 |
| [^>]*> fee6 7f88 vminv.u16 r7, q4 |
| [^>]*> fee6 7f8e vminv.u16 r7, q7 |
| [^>]*> fee6 8f80 vminv.u16 r8, q0 |
| [^>]*> fee6 8f82 vminv.u16 r8, q1 |
| [^>]*> fee6 8f84 vminv.u16 r8, q2 |
| [^>]*> fee6 8f88 vminv.u16 r8, q4 |
| [^>]*> fee6 8f8e vminv.u16 r8, q7 |
| [^>]*> fee6 af80 vminv.u16 sl, q0 |
| [^>]*> fee6 af82 vminv.u16 sl, q1 |
| [^>]*> fee6 af84 vminv.u16 sl, q2 |
| [^>]*> fee6 af88 vminv.u16 sl, q4 |
| [^>]*> fee6 af8e vminv.u16 sl, q7 |
| [^>]*> fee6 ef80 vminv.u16 lr, q0 |
| [^>]*> fee6 ef82 vminv.u16 lr, q1 |
| [^>]*> fee6 ef84 vminv.u16 lr, q2 |
| [^>]*> fee6 ef88 vminv.u16 lr, q4 |
| [^>]*> fee6 ef8e vminv.u16 lr, q7 |
| [^>]*> eee6 0f00 vmaxv.s16 r0, q0 |
| [^>]*> eee6 0f02 vmaxv.s16 r0, q1 |
| [^>]*> eee6 0f04 vmaxv.s16 r0, q2 |
| [^>]*> eee6 0f08 vmaxv.s16 r0, q4 |
| [^>]*> eee6 0f0e vmaxv.s16 r0, q7 |
| [^>]*> eee6 1f00 vmaxv.s16 r1, q0 |
| [^>]*> eee6 1f02 vmaxv.s16 r1, q1 |
| [^>]*> eee6 1f04 vmaxv.s16 r1, q2 |
| [^>]*> eee6 1f08 vmaxv.s16 r1, q4 |
| [^>]*> eee6 1f0e vmaxv.s16 r1, q7 |
| [^>]*> eee6 2f00 vmaxv.s16 r2, q0 |
| [^>]*> eee6 2f02 vmaxv.s16 r2, q1 |
| [^>]*> eee6 2f04 vmaxv.s16 r2, q2 |
| [^>]*> eee6 2f08 vmaxv.s16 r2, q4 |
| [^>]*> eee6 2f0e vmaxv.s16 r2, q7 |
| [^>]*> eee6 4f00 vmaxv.s16 r4, q0 |
| [^>]*> eee6 4f02 vmaxv.s16 r4, q1 |
| [^>]*> eee6 4f04 vmaxv.s16 r4, q2 |
| [^>]*> eee6 4f08 vmaxv.s16 r4, q4 |
| [^>]*> eee6 4f0e vmaxv.s16 r4, q7 |
| [^>]*> eee6 7f00 vmaxv.s16 r7, q0 |
| [^>]*> eee6 7f02 vmaxv.s16 r7, q1 |
| [^>]*> eee6 7f04 vmaxv.s16 r7, q2 |
| [^>]*> eee6 7f08 vmaxv.s16 r7, q4 |
| [^>]*> eee6 7f0e vmaxv.s16 r7, q7 |
| [^>]*> eee6 8f00 vmaxv.s16 r8, q0 |
| [^>]*> eee6 8f02 vmaxv.s16 r8, q1 |
| [^>]*> eee6 8f04 vmaxv.s16 r8, q2 |
| [^>]*> eee6 8f08 vmaxv.s16 r8, q4 |
| [^>]*> eee6 8f0e vmaxv.s16 r8, q7 |
| [^>]*> eee6 af00 vmaxv.s16 sl, q0 |
| [^>]*> eee6 af02 vmaxv.s16 sl, q1 |
| [^>]*> eee6 af04 vmaxv.s16 sl, q2 |
| [^>]*> eee6 af08 vmaxv.s16 sl, q4 |
| [^>]*> eee6 af0e vmaxv.s16 sl, q7 |
| [^>]*> eee6 ef00 vmaxv.s16 lr, q0 |
| [^>]*> eee6 ef02 vmaxv.s16 lr, q1 |
| [^>]*> eee6 ef04 vmaxv.s16 lr, q2 |
| [^>]*> eee6 ef08 vmaxv.s16 lr, q4 |
| [^>]*> eee6 ef0e vmaxv.s16 lr, q7 |
| [^>]*> eee6 0f80 vminv.s16 r0, q0 |
| [^>]*> eee6 0f82 vminv.s16 r0, q1 |
| [^>]*> eee6 0f84 vminv.s16 r0, q2 |
| [^>]*> eee6 0f88 vminv.s16 r0, q4 |
| [^>]*> eee6 0f8e vminv.s16 r0, q7 |
| [^>]*> eee6 1f80 vminv.s16 r1, q0 |
| [^>]*> eee6 1f82 vminv.s16 r1, q1 |
| [^>]*> eee6 1f84 vminv.s16 r1, q2 |
| [^>]*> eee6 1f88 vminv.s16 r1, q4 |
| [^>]*> eee6 1f8e vminv.s16 r1, q7 |
| [^>]*> eee6 2f80 vminv.s16 r2, q0 |
| [^>]*> eee6 2f82 vminv.s16 r2, q1 |
| [^>]*> eee6 2f84 vminv.s16 r2, q2 |
| [^>]*> eee6 2f88 vminv.s16 r2, q4 |
| [^>]*> eee6 2f8e vminv.s16 r2, q7 |
| [^>]*> eee6 4f80 vminv.s16 r4, q0 |
| [^>]*> eee6 4f82 vminv.s16 r4, q1 |
| [^>]*> eee6 4f84 vminv.s16 r4, q2 |
| [^>]*> eee6 4f88 vminv.s16 r4, q4 |
| [^>]*> eee6 4f8e vminv.s16 r4, q7 |
| [^>]*> eee6 7f80 vminv.s16 r7, q0 |
| [^>]*> eee6 7f82 vminv.s16 r7, q1 |
| [^>]*> eee6 7f84 vminv.s16 r7, q2 |
| [^>]*> eee6 7f88 vminv.s16 r7, q4 |
| [^>]*> eee6 7f8e vminv.s16 r7, q7 |
| [^>]*> eee6 8f80 vminv.s16 r8, q0 |
| [^>]*> eee6 8f82 vminv.s16 r8, q1 |
| [^>]*> eee6 8f84 vminv.s16 r8, q2 |
| [^>]*> eee6 8f88 vminv.s16 r8, q4 |
| [^>]*> eee6 8f8e vminv.s16 r8, q7 |
| [^>]*> eee6 af80 vminv.s16 sl, q0 |
| [^>]*> eee6 af82 vminv.s16 sl, q1 |
| [^>]*> eee6 af84 vminv.s16 sl, q2 |
| [^>]*> eee6 af88 vminv.s16 sl, q4 |
| [^>]*> eee6 af8e vminv.s16 sl, q7 |
| [^>]*> eee6 ef80 vminv.s16 lr, q0 |
| [^>]*> eee6 ef82 vminv.s16 lr, q1 |
| [^>]*> eee6 ef84 vminv.s16 lr, q2 |
| [^>]*> eee6 ef88 vminv.s16 lr, q4 |
| [^>]*> eee6 ef8e vminv.s16 lr, q7 |
| [^>]*> feea 0f00 vmaxv.u32 r0, q0 |
| [^>]*> feea 0f02 vmaxv.u32 r0, q1 |
| [^>]*> feea 0f04 vmaxv.u32 r0, q2 |
| [^>]*> feea 0f08 vmaxv.u32 r0, q4 |
| [^>]*> feea 0f0e vmaxv.u32 r0, q7 |
| [^>]*> feea 1f00 vmaxv.u32 r1, q0 |
| [^>]*> feea 1f02 vmaxv.u32 r1, q1 |
| [^>]*> feea 1f04 vmaxv.u32 r1, q2 |
| [^>]*> feea 1f08 vmaxv.u32 r1, q4 |
| [^>]*> feea 1f0e vmaxv.u32 r1, q7 |
| [^>]*> feea 2f00 vmaxv.u32 r2, q0 |
| [^>]*> feea 2f02 vmaxv.u32 r2, q1 |
| [^>]*> feea 2f04 vmaxv.u32 r2, q2 |
| [^>]*> feea 2f08 vmaxv.u32 r2, q4 |
| [^>]*> feea 2f0e vmaxv.u32 r2, q7 |
| [^>]*> feea 4f00 vmaxv.u32 r4, q0 |
| [^>]*> feea 4f02 vmaxv.u32 r4, q1 |
| [^>]*> feea 4f04 vmaxv.u32 r4, q2 |
| [^>]*> feea 4f08 vmaxv.u32 r4, q4 |
| [^>]*> feea 4f0e vmaxv.u32 r4, q7 |
| [^>]*> feea 7f00 vmaxv.u32 r7, q0 |
| [^>]*> feea 7f02 vmaxv.u32 r7, q1 |
| [^>]*> feea 7f04 vmaxv.u32 r7, q2 |
| [^>]*> feea 7f08 vmaxv.u32 r7, q4 |
| [^>]*> feea 7f0e vmaxv.u32 r7, q7 |
| [^>]*> feea 8f00 vmaxv.u32 r8, q0 |
| [^>]*> feea 8f02 vmaxv.u32 r8, q1 |
| [^>]*> feea 8f04 vmaxv.u32 r8, q2 |
| [^>]*> feea 8f08 vmaxv.u32 r8, q4 |
| [^>]*> feea 8f0e vmaxv.u32 r8, q7 |
| [^>]*> feea af00 vmaxv.u32 sl, q0 |
| [^>]*> feea af02 vmaxv.u32 sl, q1 |
| [^>]*> feea af04 vmaxv.u32 sl, q2 |
| [^>]*> feea af08 vmaxv.u32 sl, q4 |
| [^>]*> feea af0e vmaxv.u32 sl, q7 |
| [^>]*> feea ef00 vmaxv.u32 lr, q0 |
| [^>]*> feea ef02 vmaxv.u32 lr, q1 |
| [^>]*> feea ef04 vmaxv.u32 lr, q2 |
| [^>]*> feea ef08 vmaxv.u32 lr, q4 |
| [^>]*> feea ef0e vmaxv.u32 lr, q7 |
| [^>]*> feea 0f80 vminv.u32 r0, q0 |
| [^>]*> feea 0f82 vminv.u32 r0, q1 |
| [^>]*> feea 0f84 vminv.u32 r0, q2 |
| [^>]*> feea 0f88 vminv.u32 r0, q4 |
| [^>]*> feea 0f8e vminv.u32 r0, q7 |
| [^>]*> feea 1f80 vminv.u32 r1, q0 |
| [^>]*> feea 1f82 vminv.u32 r1, q1 |
| [^>]*> feea 1f84 vminv.u32 r1, q2 |
| [^>]*> feea 1f88 vminv.u32 r1, q4 |
| [^>]*> feea 1f8e vminv.u32 r1, q7 |
| [^>]*> feea 2f80 vminv.u32 r2, q0 |
| [^>]*> feea 2f82 vminv.u32 r2, q1 |
| [^>]*> feea 2f84 vminv.u32 r2, q2 |
| [^>]*> feea 2f88 vminv.u32 r2, q4 |
| [^>]*> feea 2f8e vminv.u32 r2, q7 |
| [^>]*> feea 4f80 vminv.u32 r4, q0 |
| [^>]*> feea 4f82 vminv.u32 r4, q1 |
| [^>]*> feea 4f84 vminv.u32 r4, q2 |
| [^>]*> feea 4f88 vminv.u32 r4, q4 |
| [^>]*> feea 4f8e vminv.u32 r4, q7 |
| [^>]*> feea 7f80 vminv.u32 r7, q0 |
| [^>]*> feea 7f82 vminv.u32 r7, q1 |
| [^>]*> feea 7f84 vminv.u32 r7, q2 |
| [^>]*> feea 7f88 vminv.u32 r7, q4 |
| [^>]*> feea 7f8e vminv.u32 r7, q7 |
| [^>]*> feea 8f80 vminv.u32 r8, q0 |
| [^>]*> feea 8f82 vminv.u32 r8, q1 |
| [^>]*> feea 8f84 vminv.u32 r8, q2 |
| [^>]*> feea 8f88 vminv.u32 r8, q4 |
| [^>]*> feea 8f8e vminv.u32 r8, q7 |
| [^>]*> feea af80 vminv.u32 sl, q0 |
| [^>]*> feea af82 vminv.u32 sl, q1 |
| [^>]*> feea af84 vminv.u32 sl, q2 |
| [^>]*> feea af88 vminv.u32 sl, q4 |
| [^>]*> feea af8e vminv.u32 sl, q7 |
| [^>]*> feea ef80 vminv.u32 lr, q0 |
| [^>]*> feea ef82 vminv.u32 lr, q1 |
| [^>]*> feea ef84 vminv.u32 lr, q2 |
| [^>]*> feea ef88 vminv.u32 lr, q4 |
| [^>]*> feea ef8e vminv.u32 lr, q7 |
| [^>]*> eeea 0f00 vmaxv.s32 r0, q0 |
| [^>]*> eeea 0f02 vmaxv.s32 r0, q1 |
| [^>]*> eeea 0f04 vmaxv.s32 r0, q2 |
| [^>]*> eeea 0f08 vmaxv.s32 r0, q4 |
| [^>]*> eeea 0f0e vmaxv.s32 r0, q7 |
| [^>]*> eeea 1f00 vmaxv.s32 r1, q0 |
| [^>]*> eeea 1f02 vmaxv.s32 r1, q1 |
| [^>]*> eeea 1f04 vmaxv.s32 r1, q2 |
| [^>]*> eeea 1f08 vmaxv.s32 r1, q4 |
| [^>]*> eeea 1f0e vmaxv.s32 r1, q7 |
| [^>]*> eeea 2f00 vmaxv.s32 r2, q0 |
| [^>]*> eeea 2f02 vmaxv.s32 r2, q1 |
| [^>]*> eeea 2f04 vmaxv.s32 r2, q2 |
| [^>]*> eeea 2f08 vmaxv.s32 r2, q4 |
| [^>]*> eeea 2f0e vmaxv.s32 r2, q7 |
| [^>]*> eeea 4f00 vmaxv.s32 r4, q0 |
| [^>]*> eeea 4f02 vmaxv.s32 r4, q1 |
| [^>]*> eeea 4f04 vmaxv.s32 r4, q2 |
| [^>]*> eeea 4f08 vmaxv.s32 r4, q4 |
| [^>]*> eeea 4f0e vmaxv.s32 r4, q7 |
| [^>]*> eeea 7f00 vmaxv.s32 r7, q0 |
| [^>]*> eeea 7f02 vmaxv.s32 r7, q1 |
| [^>]*> eeea 7f04 vmaxv.s32 r7, q2 |
| [^>]*> eeea 7f08 vmaxv.s32 r7, q4 |
| [^>]*> eeea 7f0e vmaxv.s32 r7, q7 |
| [^>]*> eeea 8f00 vmaxv.s32 r8, q0 |
| [^>]*> eeea 8f02 vmaxv.s32 r8, q1 |
| [^>]*> eeea 8f04 vmaxv.s32 r8, q2 |
| [^>]*> eeea 8f08 vmaxv.s32 r8, q4 |
| [^>]*> eeea 8f0e vmaxv.s32 r8, q7 |
| [^>]*> eeea af00 vmaxv.s32 sl, q0 |
| [^>]*> eeea af02 vmaxv.s32 sl, q1 |
| [^>]*> eeea af04 vmaxv.s32 sl, q2 |
| [^>]*> eeea af08 vmaxv.s32 sl, q4 |
| [^>]*> eeea af0e vmaxv.s32 sl, q7 |
| [^>]*> eeea ef00 vmaxv.s32 lr, q0 |
| [^>]*> eeea ef02 vmaxv.s32 lr, q1 |
| [^>]*> eeea ef04 vmaxv.s32 lr, q2 |
| [^>]*> eeea ef08 vmaxv.s32 lr, q4 |
| [^>]*> eeea ef0e vmaxv.s32 lr, q7 |
| [^>]*> eeea 0f80 vminv.s32 r0, q0 |
| [^>]*> eeea 0f82 vminv.s32 r0, q1 |
| [^>]*> eeea 0f84 vminv.s32 r0, q2 |
| [^>]*> eeea 0f88 vminv.s32 r0, q4 |
| [^>]*> eeea 0f8e vminv.s32 r0, q7 |
| [^>]*> eeea 1f80 vminv.s32 r1, q0 |
| [^>]*> eeea 1f82 vminv.s32 r1, q1 |
| [^>]*> eeea 1f84 vminv.s32 r1, q2 |
| [^>]*> eeea 1f88 vminv.s32 r1, q4 |
| [^>]*> eeea 1f8e vminv.s32 r1, q7 |
| [^>]*> eeea 2f80 vminv.s32 r2, q0 |
| [^>]*> eeea 2f82 vminv.s32 r2, q1 |
| [^>]*> eeea 2f84 vminv.s32 r2, q2 |
| [^>]*> eeea 2f88 vminv.s32 r2, q4 |
| [^>]*> eeea 2f8e vminv.s32 r2, q7 |
| [^>]*> eeea 4f80 vminv.s32 r4, q0 |
| [^>]*> eeea 4f82 vminv.s32 r4, q1 |
| [^>]*> eeea 4f84 vminv.s32 r4, q2 |
| [^>]*> eeea 4f88 vminv.s32 r4, q4 |
| [^>]*> eeea 4f8e vminv.s32 r4, q7 |
| [^>]*> eeea 7f80 vminv.s32 r7, q0 |
| [^>]*> eeea 7f82 vminv.s32 r7, q1 |
| [^>]*> eeea 7f84 vminv.s32 r7, q2 |
| [^>]*> eeea 7f88 vminv.s32 r7, q4 |
| [^>]*> eeea 7f8e vminv.s32 r7, q7 |
| [^>]*> eeea 8f80 vminv.s32 r8, q0 |
| [^>]*> eeea 8f82 vminv.s32 r8, q1 |
| [^>]*> eeea 8f84 vminv.s32 r8, q2 |
| [^>]*> eeea 8f88 vminv.s32 r8, q4 |
| [^>]*> eeea 8f8e vminv.s32 r8, q7 |
| [^>]*> eeea af80 vminv.s32 sl, q0 |
| [^>]*> eeea af82 vminv.s32 sl, q1 |
| [^>]*> eeea af84 vminv.s32 sl, q2 |
| [^>]*> eeea af88 vminv.s32 sl, q4 |
| [^>]*> eeea af8e vminv.s32 sl, q7 |
| [^>]*> eeea ef80 vminv.s32 lr, q0 |
| [^>]*> eeea ef82 vminv.s32 lr, q1 |
| [^>]*> eeea ef84 vminv.s32 lr, q2 |
| [^>]*> eeea ef88 vminv.s32 lr, q4 |
| [^>]*> eeea ef8e vminv.s32 lr, q7 |
| [^>]*> eee0 0f00 vmaxav.s8 r0, q0 |
| [^>]*> eee0 0f02 vmaxav.s8 r0, q1 |
| [^>]*> eee0 0f04 vmaxav.s8 r0, q2 |
| [^>]*> eee0 0f08 vmaxav.s8 r0, q4 |
| [^>]*> eee0 0f0e vmaxav.s8 r0, q7 |
| [^>]*> eee0 1f00 vmaxav.s8 r1, q0 |
| [^>]*> eee0 1f02 vmaxav.s8 r1, q1 |
| [^>]*> eee0 1f04 vmaxav.s8 r1, q2 |
| [^>]*> eee0 1f08 vmaxav.s8 r1, q4 |
| [^>]*> eee0 1f0e vmaxav.s8 r1, q7 |
| [^>]*> eee0 2f00 vmaxav.s8 r2, q0 |
| [^>]*> eee0 2f02 vmaxav.s8 r2, q1 |
| [^>]*> eee0 2f04 vmaxav.s8 r2, q2 |
| [^>]*> eee0 2f08 vmaxav.s8 r2, q4 |
| [^>]*> eee0 2f0e vmaxav.s8 r2, q7 |
| [^>]*> eee0 4f00 vmaxav.s8 r4, q0 |
| [^>]*> eee0 4f02 vmaxav.s8 r4, q1 |
| [^>]*> eee0 4f04 vmaxav.s8 r4, q2 |
| [^>]*> eee0 4f08 vmaxav.s8 r4, q4 |
| [^>]*> eee0 4f0e vmaxav.s8 r4, q7 |
| [^>]*> eee0 7f00 vmaxav.s8 r7, q0 |
| [^>]*> eee0 7f02 vmaxav.s8 r7, q1 |
| [^>]*> eee0 7f04 vmaxav.s8 r7, q2 |
| [^>]*> eee0 7f08 vmaxav.s8 r7, q4 |
| [^>]*> eee0 7f0e vmaxav.s8 r7, q7 |
| [^>]*> eee0 8f00 vmaxav.s8 r8, q0 |
| [^>]*> eee0 8f02 vmaxav.s8 r8, q1 |
| [^>]*> eee0 8f04 vmaxav.s8 r8, q2 |
| [^>]*> eee0 8f08 vmaxav.s8 r8, q4 |
| [^>]*> eee0 8f0e vmaxav.s8 r8, q7 |
| [^>]*> eee0 af00 vmaxav.s8 sl, q0 |
| [^>]*> eee0 af02 vmaxav.s8 sl, q1 |
| [^>]*> eee0 af04 vmaxav.s8 sl, q2 |
| [^>]*> eee0 af08 vmaxav.s8 sl, q4 |
| [^>]*> eee0 af0e vmaxav.s8 sl, q7 |
| [^>]*> eee0 ef00 vmaxav.s8 lr, q0 |
| [^>]*> eee0 ef02 vmaxav.s8 lr, q1 |
| [^>]*> eee0 ef04 vmaxav.s8 lr, q2 |
| [^>]*> eee0 ef08 vmaxav.s8 lr, q4 |
| [^>]*> eee0 ef0e vmaxav.s8 lr, q7 |
| [^>]*> eee0 0f80 vminav.s8 r0, q0 |
| [^>]*> eee0 0f82 vminav.s8 r0, q1 |
| [^>]*> eee0 0f84 vminav.s8 r0, q2 |
| [^>]*> eee0 0f88 vminav.s8 r0, q4 |
| [^>]*> eee0 0f8e vminav.s8 r0, q7 |
| [^>]*> eee0 1f80 vminav.s8 r1, q0 |
| [^>]*> eee0 1f82 vminav.s8 r1, q1 |
| [^>]*> eee0 1f84 vminav.s8 r1, q2 |
| [^>]*> eee0 1f88 vminav.s8 r1, q4 |
| [^>]*> eee0 1f8e vminav.s8 r1, q7 |
| [^>]*> eee0 2f80 vminav.s8 r2, q0 |
| [^>]*> eee0 2f82 vminav.s8 r2, q1 |
| [^>]*> eee0 2f84 vminav.s8 r2, q2 |
| [^>]*> eee0 2f88 vminav.s8 r2, q4 |
| [^>]*> eee0 2f8e vminav.s8 r2, q7 |
| [^>]*> eee0 4f80 vminav.s8 r4, q0 |
| [^>]*> eee0 4f82 vminav.s8 r4, q1 |
| [^>]*> eee0 4f84 vminav.s8 r4, q2 |
| [^>]*> eee0 4f88 vminav.s8 r4, q4 |
| [^>]*> eee0 4f8e vminav.s8 r4, q7 |
| [^>]*> eee0 7f80 vminav.s8 r7, q0 |
| [^>]*> eee0 7f82 vminav.s8 r7, q1 |
| [^>]*> eee0 7f84 vminav.s8 r7, q2 |
| [^>]*> eee0 7f88 vminav.s8 r7, q4 |
| [^>]*> eee0 7f8e vminav.s8 r7, q7 |
| [^>]*> eee0 8f80 vminav.s8 r8, q0 |
| [^>]*> eee0 8f82 vminav.s8 r8, q1 |
| [^>]*> eee0 8f84 vminav.s8 r8, q2 |
| [^>]*> eee0 8f88 vminav.s8 r8, q4 |
| [^>]*> eee0 8f8e vminav.s8 r8, q7 |
| [^>]*> eee0 af80 vminav.s8 sl, q0 |
| [^>]*> eee0 af82 vminav.s8 sl, q1 |
| [^>]*> eee0 af84 vminav.s8 sl, q2 |
| [^>]*> eee0 af88 vminav.s8 sl, q4 |
| [^>]*> eee0 af8e vminav.s8 sl, q7 |
| [^>]*> eee0 ef80 vminav.s8 lr, q0 |
| [^>]*> eee0 ef82 vminav.s8 lr, q1 |
| [^>]*> eee0 ef84 vminav.s8 lr, q2 |
| [^>]*> eee0 ef88 vminav.s8 lr, q4 |
| [^>]*> eee0 ef8e vminav.s8 lr, q7 |
| [^>]*> eee4 0f00 vmaxav.s16 r0, q0 |
| [^>]*> eee4 0f02 vmaxav.s16 r0, q1 |
| [^>]*> eee4 0f04 vmaxav.s16 r0, q2 |
| [^>]*> eee4 0f08 vmaxav.s16 r0, q4 |
| [^>]*> eee4 0f0e vmaxav.s16 r0, q7 |
| [^>]*> eee4 1f00 vmaxav.s16 r1, q0 |
| [^>]*> eee4 1f02 vmaxav.s16 r1, q1 |
| [^>]*> eee4 1f04 vmaxav.s16 r1, q2 |
| [^>]*> eee4 1f08 vmaxav.s16 r1, q4 |
| [^>]*> eee4 1f0e vmaxav.s16 r1, q7 |
| [^>]*> eee4 2f00 vmaxav.s16 r2, q0 |
| [^>]*> eee4 2f02 vmaxav.s16 r2, q1 |
| [^>]*> eee4 2f04 vmaxav.s16 r2, q2 |
| [^>]*> eee4 2f08 vmaxav.s16 r2, q4 |
| [^>]*> eee4 2f0e vmaxav.s16 r2, q7 |
| [^>]*> eee4 4f00 vmaxav.s16 r4, q0 |
| [^>]*> eee4 4f02 vmaxav.s16 r4, q1 |
| [^>]*> eee4 4f04 vmaxav.s16 r4, q2 |
| [^>]*> eee4 4f08 vmaxav.s16 r4, q4 |
| [^>]*> eee4 4f0e vmaxav.s16 r4, q7 |
| [^>]*> eee4 7f00 vmaxav.s16 r7, q0 |
| [^>]*> eee4 7f02 vmaxav.s16 r7, q1 |
| [^>]*> eee4 7f04 vmaxav.s16 r7, q2 |
| [^>]*> eee4 7f08 vmaxav.s16 r7, q4 |
| [^>]*> eee4 7f0e vmaxav.s16 r7, q7 |
| [^>]*> eee4 8f00 vmaxav.s16 r8, q0 |
| [^>]*> eee4 8f02 vmaxav.s16 r8, q1 |
| [^>]*> eee4 8f04 vmaxav.s16 r8, q2 |
| [^>]*> eee4 8f08 vmaxav.s16 r8, q4 |
| [^>]*> eee4 8f0e vmaxav.s16 r8, q7 |
| [^>]*> eee4 af00 vmaxav.s16 sl, q0 |
| [^>]*> eee4 af02 vmaxav.s16 sl, q1 |
| [^>]*> eee4 af04 vmaxav.s16 sl, q2 |
| [^>]*> eee4 af08 vmaxav.s16 sl, q4 |
| [^>]*> eee4 af0e vmaxav.s16 sl, q7 |
| [^>]*> eee4 ef00 vmaxav.s16 lr, q0 |
| [^>]*> eee4 ef02 vmaxav.s16 lr, q1 |
| [^>]*> eee4 ef04 vmaxav.s16 lr, q2 |
| [^>]*> eee4 ef08 vmaxav.s16 lr, q4 |
| [^>]*> eee4 ef0e vmaxav.s16 lr, q7 |
| [^>]*> eee4 0f80 vminav.s16 r0, q0 |
| [^>]*> eee4 0f82 vminav.s16 r0, q1 |
| [^>]*> eee4 0f84 vminav.s16 r0, q2 |
| [^>]*> eee4 0f88 vminav.s16 r0, q4 |
| [^>]*> eee4 0f8e vminav.s16 r0, q7 |
| [^>]*> eee4 1f80 vminav.s16 r1, q0 |
| [^>]*> eee4 1f82 vminav.s16 r1, q1 |
| [^>]*> eee4 1f84 vminav.s16 r1, q2 |
| [^>]*> eee4 1f88 vminav.s16 r1, q4 |
| [^>]*> eee4 1f8e vminav.s16 r1, q7 |
| [^>]*> eee4 2f80 vminav.s16 r2, q0 |
| [^>]*> eee4 2f82 vminav.s16 r2, q1 |
| [^>]*> eee4 2f84 vminav.s16 r2, q2 |
| [^>]*> eee4 2f88 vminav.s16 r2, q4 |
| [^>]*> eee4 2f8e vminav.s16 r2, q7 |
| [^>]*> eee4 4f80 vminav.s16 r4, q0 |
| [^>]*> eee4 4f82 vminav.s16 r4, q1 |
| [^>]*> eee4 4f84 vminav.s16 r4, q2 |
| [^>]*> eee4 4f88 vminav.s16 r4, q4 |
| [^>]*> eee4 4f8e vminav.s16 r4, q7 |
| [^>]*> eee4 7f80 vminav.s16 r7, q0 |
| [^>]*> eee4 7f82 vminav.s16 r7, q1 |
| [^>]*> eee4 7f84 vminav.s16 r7, q2 |
| [^>]*> eee4 7f88 vminav.s16 r7, q4 |
| [^>]*> eee4 7f8e vminav.s16 r7, q7 |
| [^>]*> eee4 8f80 vminav.s16 r8, q0 |
| [^>]*> eee4 8f82 vminav.s16 r8, q1 |
| [^>]*> eee4 8f84 vminav.s16 r8, q2 |
| [^>]*> eee4 8f88 vminav.s16 r8, q4 |
| [^>]*> eee4 8f8e vminav.s16 r8, q7 |
| [^>]*> eee4 af80 vminav.s16 sl, q0 |
| [^>]*> eee4 af82 vminav.s16 sl, q1 |
| [^>]*> eee4 af84 vminav.s16 sl, q2 |
| [^>]*> eee4 af88 vminav.s16 sl, q4 |
| [^>]*> eee4 af8e vminav.s16 sl, q7 |
| [^>]*> eee4 ef80 vminav.s16 lr, q0 |
| [^>]*> eee4 ef82 vminav.s16 lr, q1 |
| [^>]*> eee4 ef84 vminav.s16 lr, q2 |
| [^>]*> eee4 ef88 vminav.s16 lr, q4 |
| [^>]*> eee4 ef8e vminav.s16 lr, q7 |
| [^>]*> eee8 0f00 vmaxav.s32 r0, q0 |
| [^>]*> eee8 0f02 vmaxav.s32 r0, q1 |
| [^>]*> eee8 0f04 vmaxav.s32 r0, q2 |
| [^>]*> eee8 0f08 vmaxav.s32 r0, q4 |
| [^>]*> eee8 0f0e vmaxav.s32 r0, q7 |
| [^>]*> eee8 1f00 vmaxav.s32 r1, q0 |
| [^>]*> eee8 1f02 vmaxav.s32 r1, q1 |
| [^>]*> eee8 1f04 vmaxav.s32 r1, q2 |
| [^>]*> eee8 1f08 vmaxav.s32 r1, q4 |
| [^>]*> eee8 1f0e vmaxav.s32 r1, q7 |
| [^>]*> eee8 2f00 vmaxav.s32 r2, q0 |
| [^>]*> eee8 2f02 vmaxav.s32 r2, q1 |
| [^>]*> eee8 2f04 vmaxav.s32 r2, q2 |
| [^>]*> eee8 2f08 vmaxav.s32 r2, q4 |
| [^>]*> eee8 2f0e vmaxav.s32 r2, q7 |
| [^>]*> eee8 4f00 vmaxav.s32 r4, q0 |
| [^>]*> eee8 4f02 vmaxav.s32 r4, q1 |
| [^>]*> eee8 4f04 vmaxav.s32 r4, q2 |
| [^>]*> eee8 4f08 vmaxav.s32 r4, q4 |
| [^>]*> eee8 4f0e vmaxav.s32 r4, q7 |
| [^>]*> eee8 7f00 vmaxav.s32 r7, q0 |
| [^>]*> eee8 7f02 vmaxav.s32 r7, q1 |
| [^>]*> eee8 7f04 vmaxav.s32 r7, q2 |
| [^>]*> eee8 7f08 vmaxav.s32 r7, q4 |
| [^>]*> eee8 7f0e vmaxav.s32 r7, q7 |
| [^>]*> eee8 8f00 vmaxav.s32 r8, q0 |
| [^>]*> eee8 8f02 vmaxav.s32 r8, q1 |
| [^>]*> eee8 8f04 vmaxav.s32 r8, q2 |
| [^>]*> eee8 8f08 vmaxav.s32 r8, q4 |
| [^>]*> eee8 8f0e vmaxav.s32 r8, q7 |
| [^>]*> eee8 af00 vmaxav.s32 sl, q0 |
| [^>]*> eee8 af02 vmaxav.s32 sl, q1 |
| [^>]*> eee8 af04 vmaxav.s32 sl, q2 |
| [^>]*> eee8 af08 vmaxav.s32 sl, q4 |
| [^>]*> eee8 af0e vmaxav.s32 sl, q7 |
| [^>]*> eee8 ef00 vmaxav.s32 lr, q0 |
| [^>]*> eee8 ef02 vmaxav.s32 lr, q1 |
| [^>]*> eee8 ef04 vmaxav.s32 lr, q2 |
| [^>]*> eee8 ef08 vmaxav.s32 lr, q4 |
| [^>]*> eee8 ef0e vmaxav.s32 lr, q7 |
| [^>]*> eee8 0f80 vminav.s32 r0, q0 |
| [^>]*> eee8 0f82 vminav.s32 r0, q1 |
| [^>]*> eee8 0f84 vminav.s32 r0, q2 |
| [^>]*> eee8 0f88 vminav.s32 r0, q4 |
| [^>]*> eee8 0f8e vminav.s32 r0, q7 |
| [^>]*> eee8 1f80 vminav.s32 r1, q0 |
| [^>]*> eee8 1f82 vminav.s32 r1, q1 |
| [^>]*> eee8 1f84 vminav.s32 r1, q2 |
| [^>]*> eee8 1f88 vminav.s32 r1, q4 |
| [^>]*> eee8 1f8e vminav.s32 r1, q7 |
| [^>]*> eee8 2f80 vminav.s32 r2, q0 |
| [^>]*> eee8 2f82 vminav.s32 r2, q1 |
| [^>]*> eee8 2f84 vminav.s32 r2, q2 |
| [^>]*> eee8 2f88 vminav.s32 r2, q4 |
| [^>]*> eee8 2f8e vminav.s32 r2, q7 |
| [^>]*> eee8 4f80 vminav.s32 r4, q0 |
| [^>]*> eee8 4f82 vminav.s32 r4, q1 |
| [^>]*> eee8 4f84 vminav.s32 r4, q2 |
| [^>]*> eee8 4f88 vminav.s32 r4, q4 |
| [^>]*> eee8 4f8e vminav.s32 r4, q7 |
| [^>]*> eee8 7f80 vminav.s32 r7, q0 |
| [^>]*> eee8 7f82 vminav.s32 r7, q1 |
| [^>]*> eee8 7f84 vminav.s32 r7, q2 |
| [^>]*> eee8 7f88 vminav.s32 r7, q4 |
| [^>]*> eee8 7f8e vminav.s32 r7, q7 |
| [^>]*> eee8 8f80 vminav.s32 r8, q0 |
| [^>]*> eee8 8f82 vminav.s32 r8, q1 |
| [^>]*> eee8 8f84 vminav.s32 r8, q2 |
| [^>]*> eee8 8f88 vminav.s32 r8, q4 |
| [^>]*> eee8 8f8e vminav.s32 r8, q7 |
| [^>]*> eee8 af80 vminav.s32 sl, q0 |
| [^>]*> eee8 af82 vminav.s32 sl, q1 |
| [^>]*> eee8 af84 vminav.s32 sl, q2 |
| [^>]*> eee8 af88 vminav.s32 sl, q4 |
| [^>]*> eee8 af8e vminav.s32 sl, q7 |
| [^>]*> eee8 ef80 vminav.s32 lr, q0 |
| [^>]*> eee8 ef82 vminav.s32 lr, q1 |
| [^>]*> eee8 ef84 vminav.s32 lr, q2 |
| [^>]*> eee8 ef88 vminav.s32 lr, q4 |
| [^>]*> eee8 ef8e vminav.s32 lr, q7 |
| [^>]*> fe71 ef4d vpstete |
| [^>]*> fee2 0f0e vmaxvt.u8 r0, q7 |
| [^>]*> eee6 8f04 vmaxve.s16 r8, q2 |
| [^>]*> eee0 7f06 vmaxavt.s8 r7, q3 |
| [^>]*> eee4 8f04 vmaxave.s16 r8, q2 |
| [^>]*> fe71 ef4d vpstete |
| [^>]*> fee6 0f8e vminvt.u16 r0, q7 |
| [^>]*> eeea 8f84 vminve.s32 r8, q2 |
| [^>]*> eee4 7f86 vminavt.s16 r7, q3 |
| [^>]*> eee8 8f84 vminave.s32 r8, q2 |
