| [^:]*: Assembler messages: |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:14: Error: bad type in SIMD instruction -- `vmladav.s64 r0,q1,q2' |
| [^:]*:15: Error: bad type in SIMD instruction -- `vmladav.f32 r0,q1,q2' |
| [^:]*:16: Error: bad type in SIMD instruction -- `vmladava.s64 r0,q1,q2' |
| [^:]*:17: Error: bad type in SIMD instruction -- `vmladava.f32 r0,q1,q2' |
| [^:]*:18: Error: bad type in SIMD instruction -- `vmladavx.s64 r0,q1,q2' |
| [^:]*:19: Error: bad type in SIMD instruction -- `vmladavx.f32 r0,q1,q2' |
| [^:]*:20: Error: bad type in SIMD instruction -- `vmladavax.s64 r0,q1,q2' |
| [^:]*:21: Error: bad type in SIMD instruction -- `vmladavax.f32 r0,q1,q2' |
| [^:]*:22: Error: bad type in SIMD instruction -- `vmladavx.u32 r0,q1,q2' |
| [^:]*:23: Error: bad type in SIMD instruction -- `vmladavax.u16 r0,q1,q2' |
| [^:]*:25: Error: syntax error -- `vmladaveq.s32 r0,q1,q2' |
| [^:]*:26: Error: syntax error -- `vmladaveq.s32 r0,q1,q2' |
| [^:]*:28: Error: syntax error -- `vmladaveq.s32 r0,q1,q2' |
| [^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vmladavt.s32 r0,q1,q2' |
| [^:]*:31: Error: instruction missing MVE vector predication code -- `vmladav.s32 r0,q1,q2' |
| [^:]*:33: Error: syntax error -- `vmladavaeq.s32 r0,q1,q2' |
| [^:]*:34: Error: syntax error -- `vmladavaeq.s32 r0,q1,q2' |
| [^:]*:36: Error: syntax error -- `vmladavaeq.s32 r0,q1,q2' |
| [^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vmladavat.s32 r0,q1,q2' |
| [^:]*:39: Error: instruction missing MVE vector predication code -- `vmladava.s32 r0,q1,q2' |
| [^:]*:41: Error: syntax error -- `vmladavxeq.s32 r0,q1,q2' |
| [^:]*:42: Error: syntax error -- `vmladavxeq.s32 r0,q1,q2' |
| [^:]*:44: Error: syntax error -- `vmladavxeq.s32 r0,q1,q2' |
| [^:]*:45: Error: vector predicated instruction should be in VPT/VPST block -- `vmladavxt.s32 r0,q1,q2' |
| [^:]*:47: Error: instruction missing MVE vector predication code -- `vmladavx.s32 r0,q1,q2' |
| [^:]*:49: Error: syntax error -- `vmladavaxeq.s32 r0,q1,q2' |
| [^:]*:50: Error: syntax error -- `vmladavaxeq.s32 r0,q1,q2' |
| [^:]*:52: Error: syntax error -- `vmladavaxeq.s32 r0,q1,q2' |
| [^:]*:53: Error: vector predicated instruction should be in VPT/VPST block -- `vmladavaxt.s32 r0,q1,q2' |
| [^:]*:55: Error: instruction missing MVE vector predication code -- `vmladavax.s32 r0,q1,q2' |