| [^:]*: Assembler messages: |
| [^:]*:6: Error: syntax error -- `vpsteq' |
| [^:]*:9: Error: vector predicated instruction should be in VPT/VPST block -- `vaddt.i32 q0,q1,q2' |
| [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:15: Error: syntax error -- `vaddeq.i32 q0,q1,q2' |
| [^:]*:21: Error: instruction missing MVE vector predication code -- `vadd.i32 q0,q1,q2' |
| [^:]*:23: Error: syntax error -- `vaddeq.i32 q0,q1,q2' |
| [^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vaddt.i32 q0,q1,q2' |
| [^:]*:33: Error: bad instruction `addt r0,r0,r1' |
| [^:]*:37: Error: instruction not allowed in IT block -- `add r0,r0,r1' |
| [^:]*:40: Error: thumb conditional instruction should be in IT block -- `addeq r0,r0,r1' |
| [^:]*:43: Error: bad instruction `addt r0,r0,r1' |
| [^:]*:47: Warning: instruction is UNPREDICTABLE in a VPT block |
| [^:]*:49: Error: thumb conditional instruction should be in IT block -- `addeq r0,r0,r1' |
| [^:]*:51: Error: bad instruction `addt r0,r0,r1' |
| [^:]*:55: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:62: Error: incorrect condition in VPT/VPST block -- `vaddt.i32 q0,q1,q2' |
| [^:]*:65: Error: syntax error -- `vaddeq.i32 q0,q1,q2' |
| [^:]*:68: Warning: .* finished with an open VPT/VPST block. |
