| [^:]*: Assembler messages: |
| [^:]*:10: Error: bad type in SIMD instruction -- `vrshl.i16 q0,q1,q2' |
| [^:]*:11: Error: bad type in SIMD instruction -- `vrshl.i16 q0,r2' |
| [^:]*:12: Error: bad type in SIMD instruction -- `vrshl.s64 q0,q1,q2' |
| [^:]*:13: Error: bad type in SIMD instruction -- `vrshl.s64 q0,r2' |
| [^:]*:14: Warning: instruction is UNPREDICTABLE with SP operand |
| [^:]*:15: Warning: instruction is UNPREDICTABLE with PC operand |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block |
| [^:]*:19: Error: syntax error -- `vrshleq.s32 q0,q1,q2' |
| [^:]*:20: Error: syntax error -- `vrshleq.s32 q0,q1,q2' |
| [^:]*:22: Error: syntax error -- `vrshleq.s32 q0,q1,q2' |
| [^:]*:23: Error: vector predicated instruction should be in VPT/VPST block -- `vrshlt.s32 q0,q1,q2' |
| [^:]*:25: Error: instruction missing MVE vector predication code -- `vrshl.s32 q0,q1,q2' |
| [^:]*:27: Error: syntax error -- `vrshleq.s32 q0,r2' |
| [^:]*:28: Error: syntax error -- `vrshleq.s32 q0,r2' |
| [^:]*:30: Error: syntax error -- `vrshleq.s32 q0,r2' |
| [^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vrshlt.s32 q0,r2' |
| [^:]*:33: Error: instruction missing MVE vector predication code -- `vrshl.s32 q0,r2' |
