| commit | 6b84c098e533f87d7973fd6fe8a39ee97255ebdb | [log] [tgz] |
|---|---|---|
| author | Tsukasa OI <research_trasio@irq.a4lg.com> | Tue Jun 28 19:07:52 2022 +0900 |
| committer | Tsukasa OI <research_trasio@irq.a4lg.com> | Fri Oct 28 14:17:34 2022 +0000 |
| tree | ba56a5585518038f476d3a7e6a4b216e67f0be1e | |
| parent | 83029f7ff5d571dff0190e8d92c26e032c7acd76 [diff] |
RISC-V: Improve "bits undefined" diagnostics This commit improves internal error message "internal: bad RISC-V opcode (bits 0x%lx undefined): %s %s" to display actual unused bits (excluding non-instruction bits). gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Exclude non- instruction bits from displaying internal diagnostics. Change error message slightly.